- 27 3月, 2015 1 次提交
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由 Grygorii Strashko 提交于
Convert omap_gpio_is_input() to use GPIO offset instead of mask and, in such way, make code simpler and remove few lines of code. Tested-by: NTony Lindgren <tony@atomide.com> Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi> Acked-by: NSantosh Shilimkar <ssantosh@kernel.org> Acked-by: NJavier Martinez Canillas <javier@dowhile0.org> Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 3月, 2015 1 次提交
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由 Grygorii Strashko 提交于
GPIOLib core implemnts irqchip->irq_request/release_resources callbacks internally and these callbacks already contain clalls of gpiochip_lock/unlock_as_irq(). Hence, remove unnecessary call of gpiochip_unlock_as_irq() from omap_gpio_irq_shutdown(). Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 26 1月, 2015 1 次提交
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由 Tony Lindgren 提交于
Similar to omap_gpio_irq_type() let's make sure that the GPIO is usable as an interrupt if the platform init code did not call gpio_request(). Otherwise we can get invalid device access after setup_irq(): WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x214/0x340() 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4CFG (Idle): Data Access in Supervisor mode during Functional access ... [<c05f21e4>] (__irq_svc) from [<c05f1974>] (_raw_spin_unlock_irqrestore+0x34/0x44) [<c05f1974>] (_raw_spin_unlock_irqrestore) from [<c00914a8>] (__setup_irq+0x244/0x530) [<c00914a8>] (__setup_irq) from [<c00917d4>] (setup_irq+0x40/0x8c) [<c00917d4>] (setup_irq) from [<c0039c8c>] (omap_system_dma_probe+0x1d4/0x2b4) [<c0039c8c>] (omap_system_dma_probe) from [<c03b2200>] (platform_drv_probe+0x44/0xa4) ... We can fix this the same way omap_gpio_irq_type() is handling it. Note that the long term solution is to change the gpio-omap driver to handle the banks as separate driver instances. This will allow us to rely on just runtime PM for tracking the bank specific state. Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Kevin Hilman <khilman@kernel.org> Cc: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 04 12月, 2014 1 次提交
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由 Rafael J. Wysocki 提交于
After commit b2b49ccb (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is selected) PM_RUNTIME is always set if PM is set, so #ifdef blocks depending on CONFIG_PM_RUNTIME may now be changed to depend on CONFIG_PM. Replace CONFIG_PM_RUNTIME with CONFIG_PM in drivers/gpio/gpio-omap.c. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NAlexandre Courbot <acourbot@nvidia.com> Acked-by: NJavier Martinez Canillas <javier@dowhile0.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 10月, 2014 1 次提交
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由 Alexandre Courbot 提交于
This function actually operates on a gpio_chip, so its prefix should reflect that fact for consistency with other functions defined in gpio/driver.h. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 23 9月, 2014 2 次提交
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由 Nishanth Menon 提交于
When viewing the /proc/interrupts, there is no information about which GPIO bank a specific gpio interrupt is hooked on to. This is more than a bit irritating as such information can esily be provided back to the user and at times, can be crucial for debug. So, instead of displaying something like: 31: 0 0 GPIO 0 palmas 32: 0 0 GPIO 27 mmc0 Display the following with appropriate device name: 31: 0 0 4ae10000.gpio 0 palmas 32: 0 0 4805d000.gpio 27 mmc0 This requires that we create irq_chip instance specific for each GPIO bank which is trivial to achieve. Signed-off-by: NNishanth Menon <nm@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: NKevin Hilman <khilman@linaro.org> Acked-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Some drivers accidentally still use the return value from gpiochip_remove(). Get rid of them so we can simplify this function and get rid of the return value. Cc: Abdoulaye Berthe <berthe.ab@gmail.com> Acked-by: NAlexandre Courbot <acourbot@nvidia.com> Acked-by: NJavier Martinez Canillas <javier@dowhile0.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 7月, 2014 3 次提交
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由 Javier Martinez Canillas 提交于
The GPIO OMAP driver didn't have a consistent naming scheme for all its functions. Some of them had an omap prefix while others didn't. There are many advantages on having a separate namespace for driver functions so let's add an "omap" prefix to all of them. Signed-off-by: NJavier Martinez Canillas <jmartinez@softcrates.net> Acked-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
The <linux/irqchip/chained_irq.h> header is already included when selecting GPIOLIB_IRQCHIP so there is no need to do it in the driver. This is a left over from commit fb655f57 ("gpio: omap: convert driver to use gpiolib irqchip"). Signed-off-by: NJavier Martinez Canillas <jmartinez@softcrates.net> Acked-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
GPIO irqchips assign to the cascaded IRQs their own lock class in order to avoid warnings about lockdep recursions since that allow the lockdep core to keep track of things. Since commit e45d1c80 ("gpio: put GPIO IRQs into their own lock class") there is no need to do this in a driver if it's using the GPIO irqchip helpers since gpiolib already assigns a lockdep class. Signed-off-by: NJavier Martinez Canillas <jmartinez@softcrates.net> Acked-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 5月, 2014 1 次提交
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由 Rajendra Nayak 提交于
Replace the clk_enable()s with a clk_prepare_enable() and the clk_disables()s with a clk_disable_unprepare() This never showed issues due to the OMAP platform code (hwmod) leaving these clocks in clk_prepare()ed state by default. Reported-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com> Acked-by: NJavier Martinez Canillas <javier@dowhile0.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 04 5月, 2014 1 次提交
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由 Javier Martinez Canillas 提交于
Using the BIT() macro instead of shifting bits makes the code less error prone and also more readable. Signed-off-by: NJavier Martinez Canillas <javier@dowhile0.org> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 4月, 2014 4 次提交
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由 Yegor Yefremov 提交于
This patch implements gpio_chip's get_direction() routine, that lets other drivers get particular GPIOs direction using struct gpio_desc. Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com> Acked-by: NJavier Martinez Canillas <javier@dowhile0.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
Converts the GPIO OMAP driver to register its chained irq handler and irqchip using the helpers in the gpiolib core. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
The gpiochip_add() function can fail if the chip cannot be registered so the return value has to be checked and the error propagated in case it happens. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
The GPIO OMAP driver supports different OMAP SoC families and not all of them have the needed support to use the linear IRQ domain mapping like OMAP1 that use the legacy domain mapping. But this special check is not necessary since the simple IRQ domain mapping is able to handle both cases. Having a zero IRQ offset will be interpreted as a linear domain case while a non-zero value will be interpreted as a legacy domain case. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 24 2月, 2014 1 次提交
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由 Jingoo Han 提交于
Use devm_ioremap_resource() in order to make the code simpler, and remove redundant return value check of platform_get_resource() because the value is checked by devm_ioremap_resource(). Signed-off-by: NJingoo Han <jg1.han@samsung.com> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Acked-by: NKevin Hilman <khilman@linaro.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 25 11月, 2013 1 次提交
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由 Victor Kamensky 提交于
All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: NVictor Kamensky <victor.kamensky@linaro.org> Signed-off-by: NTaras Kondratiuk <taras.kondratiuk@linaro.org> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NKevin Hilman <khilman@linaro.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 10月, 2013 1 次提交
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由 Javier Martinez Canillas 提交于
The OMAP GPIO driver keeps track about GPIO pins that are used as IRQ lines for two reasons: 1) To prevent GPIO banks to be disabled while one of their GPIO pins are only used as an interrupt line. 2) To not allow another caller to set the GPIO pin as output. Now gpiolib has an API to mark GPIO pins as used as IRQ lines so the GPIO core only allows to set as output GPIO pins not tied to an IRQ. So there is no need to have custom code for 2). The IRQ usage still has to be maintained locally for 1) though. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 01 10月, 2013 2 次提交
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由 Javier Martinez Canillas 提交于
The OMAP GPIO controller HW requires a pin to be configured in GPIO input mode in order to operate as an interrupt input. Since drivers should not be aware of whether an interrupt pin is also a GPIO or not, the HW should be fully configured/enabled as an IRQ if a driver solely uses IRQ APIs such as request_irq(), and never calls any GPIO-related APIs. As such, add the missing HW setup to the OMAP GPIO controller's irq_chip driver. Since this bypasses the GPIO subsystem we have to ensure that another driver won't be able to request the same GPIO pin that is used as an IRQ and set its direction as output. Requesting the GPIO and setting its direction as input is allowed though. This fixes smsc911x ethernet support for tobi and igep OMAP3 boards and OMAP4 SDP SPI based ethernet that use a GPIO as an interrupt line. Cc: stable@vger.kernel.org Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NGeorge Cherian <george.cherian@ti.com> Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi> Tested-by: NLars Poeschel <poeschel@lemonage.de> Reviewed-by: NKevin Hilman <khilman@linaro.org> Tested-by: NKevin Hilman <khilman@linaro.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
The GPIO OMAP controller pins can be used as IRQ and GPIO independently so is necessary to keep track GPIO pins and IRQ lines usage separately to make sure that the bank will always be enabled while being used. Also move gpio_is_input() definition in preparation for the next patch that setups the controller's irq_chip driver when a caller requests an interrupt line. Cc: stable@vger.kernel.org Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NGeorge Cherian <george.cherian@ti.com> Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi> Tested-by: NLars Poeschel <poeschel@lemonage.de> Reviewed-by: NKevin Hilman <khilman@linaro.org> Tested-by: NKevin Hilman <khilman@linaro.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 8月, 2013 2 次提交
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由 Julia Lawall 提交于
Replace a comma between expression statements by a semicolon. This changes the semantics of the code, but given the current indentation appears to be what is intended. A simplified version of the semantic patch that performs this transformation is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r@ expression e1,e2,e; type T; identifier i; @@ e1 -, +; e2; // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Acked-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jingoo Han 提交于
Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 31 7月, 2013 3 次提交
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由 Linus Walleij 提交于
This reverts commit 0e970cec. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This reverts commit b4419e1a. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This reverts commit 949eb1a4. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 21 7月, 2013 3 次提交
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由 Javier Martinez Canillas 提交于
The OMAP GPIO driver check if the chip has an associated Device Tree node using the struct gpio_chip of_node member. But this is only build if CONFIG_OF_GPIO is defined which leads to the following error when using omap1_defconfig: linux/drivers/gpio/gpio-omap.c: In function 'omap_gpio_chip_init': linux/drivers/gpio/gpio-omap.c:1080:17: error: 'struct gpio_chip' has no member named 'of_node' linux/drivers/gpio/gpio-omap.c: In function 'omap_gpio_irq_map': linux/drivers/gpio/gpio-omap.c:1116:16: error: 'struct gpio_chip' has no member named 'of_node' Reported-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
When an OMAP GPIO is used as an IRQ line, a call to gpio_request() has to be made to initialize the OMAP GPIO bank before a driver request the IRQ. Otherwise the call to request_irq() fails. Drives should not be aware of this neither care wether an IRQ line is a GPIO or not. They should just request the IRQ and this has to be handled by the irq_chip driver. With the current OMAP GPIO DT binding, if we define: gpio6: gpio@49058000 { compatible = "ti,omap3-gpio"; reg = <0x49058000 0x200>; interrupts = <34>; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; interrupt-parent = <&gpio6>; interrupts = <16 8>; The GPIO is correctly mapped as an IRQ but a call to gpio_request() is never made. Since a call to the custom IRQ domain .map function handler is made for each GPIO used as an IRQ, the GPIO can be setup and configured as input there automatically. Changes since v3: - Use bank->chip.of_node instead of_have_populated_dt() to check DT or legacy boot as suggested by Jean-Christophe PLAGNIOL-VILLARD - Add a comment that this is just a temporary solution until and that it has to be removed once is handled by the IRQ core. Changes since v2: - Only make the call to gpio_request_one() conditional in the DT case as suggested by Grant Likely. Changes since v1: - Split the irq domain mapping function handler and the GPIO request in two different patches. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: NEnric Balletbo i Serra <eballetbo@gmail.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
When a GPIO is defined as an interrupt line using Device Tree, a call to irq_create_of_mapping() is made that calls irq_create_mapping(). So, is not necessary to do the mapping for all OMAP GPIO lines and explicitly call irq_create_mapping() on the driver probe() when booting with Device Tree. Add a custom IRQ domain .map function handler that will be called by irq_create_mapping() to map the GPIO lines used as IRQ. This also allows to execute needed setup code such as configuring a GPIO as input and enabling the GPIO bank. Changes since v3: - Use bank->chip.of_node instead of_have_populated_dt() to check DT or legacy boot as suggested by Jean-Christophe PLAGNIOL-VILLARD Changes since v2: - Unconditionally do the IRQ setup in the .map() function and only call irq_create_mapping() in the gpio chip init to avoid code duplication as suggested by Grant Likely. Changes since v1: - Split the addition of the .map function handler and the automatic gpio request in two different patches. - Add GPIO IRQ setup logic to the irq domain mapping function. - Only call irq_create_mapping for every GPIO on legacy boot. - Only setup a GPIO IRQ on the .map function for DeviceTree boot. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: NEnric Balletbo i Serra <eballetbo@gmail.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 26 6月, 2013 1 次提交
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由 Javier Martinez Canillas 提交于
Commit ede4d7a5 ("gpio/omap: convert gpio irq domain to linear mapping") converted the OMAP GPIO driver to use a linear mapping for the GPIO IRQ domain instead of using a legacy mapping. Not using a legacy mapping has a number of benefits but it requires the platform to support SPARSE_IRQ which currently is not supported on OMAP1. So this change caused a regression on OMAP1 platforms [1]. Since this issue is not present on all OMAP2+ platforms, there is no need to revert the driver to use legacy domain mapping for all the platforms. [1]: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg89005.htmlSigned-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 17 6月, 2013 1 次提交
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由 Arnd Bergmann 提交于
The bug fix 352a2d5b "gpio/omap: ensure gpio context is initialised" has caused a new warning for omap1_defconfig: drivers/gpio/gpio-omap.c:1465:13: warning: 'omap_gpio_init_context' defined but not used [-Wunused-function] static void omap_gpio_init_context(struct gpio_bank *p) {} ^ The solution is to mark the stub function as 'static inline' so it gets left out of the build when unused. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 14 5月, 2013 1 次提交
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由 Jon Hunter 提交于
Commit a2797bea (gpio/omap: force restore if context loss is not detectable) broke gpio support for OMAP when booting with device-tree because a restore of the gpio context being performed without ever initialising the gpio context. In other words, the context restored was bad. This problem could also occur in the non device-tree case, however, it is much less likely because when booting without device-tree we can detect context loss via a platform specific API and so context restore is performed less often. Nevertheless we should ensure that the gpio context is initialised on the first pm-runtime resume for gpio banks that could lose their state regardless of whether we are booting with device-tree or not. The context loss count was being initialised on the first pm-runtime suspend following a resume, by populating the get_count_loss_count() function pointer after the first pm-runtime resume. To make the code more readable and logical, initialise the context loss count on the first pm-runtime resume if the context is not yet valid. Reported-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com> Acked-by: Santosh Shilimkar<santosh.shilimkar@ti.com> Reviewed-by: NKevin Hilman <khilman@linaro.org> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 4月, 2013 4 次提交
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由 Jon Hunter 提交于
When booting with device-tree the function pointer for detecting context loss is not populated. Ideally, the pm_runtime framework should be enhanced to allow a means for reporting context/state loss and we could avoid populating such function pointers altogether. In the interim until a generic non-device specific solution is in place, force a restore of the gpio bank when enabling the gpio controller. Adds a new device-tree property for the OMAP GPIO controller to indicate if the GPIO controller is located in a power-domain that never loses power and hence will always maintain its logic state. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jon Hunter 提交于
The OMAP GPIO interrupt service routine is checking each bit in the GPIO interrupt status register to see which bits are set. It is not efficient to check every bit especially if only a few bits are set. Therefore, instead of checking every bit use the __ffs() function, which returns the location of the first set bit, to find all the set bits. This optimisation was suggested-by and developed in collaboration with Felipe Balbi. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Tarun Kanti DebBarma 提交于
68942edb (gpio/omap: fix wakeups on level-triggered GPIOs) already restores the fallingdetect and risingdetect contexts in *_runtime_resume(). These registers were modified in *_runtime_suspend() to include even those configured as level-triggered since only edge-triggered gpios can generate wakeup events. Therefore, the old context restores of the same registers present later in the code is not needed any more. Remove them. Signed-off-by: NTarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jon Hunter 提交于
Currently the IRQ domain is not freed once allocated, in the case where omap_gpio_probe() fails. Therefore, ensure we free the domain if the probe does fail. Furthermore, the local variable "ret" is not needed and so remove this. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 3月, 2013 2 次提交
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由 Laurent Navet 提交于
Fix : gpio/gpio-omap.c:697: ERROR: space required before the open parenthesis '(' Signed-off-by: NLaurent Navet <laurent.navet@gmail.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Catalin Marinas 提交于
These functions have been introduced by commit 10a8c383 (irq: introduce entry and exit functions for chained handlers) in asm/mach/irq.h. This patch moves them to linux/irqchip/chained_irq.h so that generic irqchip drivers do not rely on architecture specific header files. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Tested-by: NMarc Zyngier <marc.zyngier@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rob Herring <rob.herring@calxeda.com>
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- 06 3月, 2013 2 次提交
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由 Jon Hunter 提交于
For OMAP devices, if a gpio is being used as an interrupt source but has not been requested by calling gpio_request(), a call to request_irq() may cause the kernel hang because the gpio bank may be disabled and hence the register access will fail. To prevent such hangs, test for this case and warn if this is detected. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NKevin Hilman <khilman@linaro.org> Tested-by: NJavier Martinez Canillas <javier@dowhile0.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Jon Hunter 提交于
Currently the OMAP GPIO driver uses a legacy mapping for the GPIO IRQ domain. This is not necessary because we do not need to assign a specific interrupt number to the GPIO IRQ domain. Therefore, convert the OMAP GPIO driver to use a linear mapping instead. Please note that this also allows to simplify the logic in the OMAP gpio_irq_handler() routine, by using irq_find_mapping() to obtain the virtual irq number from the GPIO bank and bank index. Reported-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NJon Hunter <jon-hunter@ti.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NKevin Hilman <khilman@linaro.org> Tested-by: NJavier Martinez Canillas <javier@dowhile0.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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