- 25 8月, 2020 3 次提交
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由 Igor Russkikh 提交于
Remove forcible recovery trigger and put it as a normal devlink callback. This allows user to enable/disable it via devlink health set pci/0000:03:00.0 reporter fw_fatal auto_recover false Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Acked-by: NJakub Kicinski <kuba@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
Here we return existing fw & mfw versions, we also fetch device's serial number: ~$ sudo ~/iproute2/devlink/devlink dev info pci/0000:01:00.1: driver qed board.serial_number REE1915E44552 versions: running: fw.app 8.42.2.0 stored: fw.mgmt 8.52.10.0 MFW and FW are different firmwares on device. Management is a firmware responsible for link configuration and various control plane features. Its permanent and resides in NVM. Running FW (or fastpath FW) is an embedded microprogram implementing all the packet processing, offloads, etc. This FW is being loaded on each start by the driver from FW binary blob. The base device specific structure (qed_dev_info) was not directly available to the base driver before. Thus, here we create and store a private copy of this structure in qed_dev root object to access the data. Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Reviewed-by: NJakub Kicinski <kuba@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
Devlink instance lifecycle was linked to qed_dev object, that caused devlink to be recreated on each recovery. Changing it by making higher level driver (qede) responsible for its life. This way devlink now survives recoveries. qede now stores devlink structure pointer as a part of its device object, devlink private data contains a linkage structure, qed_devlink. Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 7月, 2020 3 次提交
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由 Alexander Lobakin 提交于
Add all necessary code (NVM parsing, MFW and Ethtool reports etc.) to support extended speed and FEC modes. These new modes are supported by the new boards revisions and newer MFW versions. Misc: correct port type for MEDIA_KR. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Lobakin 提交于
Struct field qed_hw_info::port_mode isn't used anywhere in the code, so can be safely removed to prevent possible dead code addition. Also remove the enumeration QED_PORT_MODE orphaned after this deletion. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Lobakin 提交于
Reformat a few nvm_cfg* structures (and partly qed_dev) prior to adding new fields and definitions. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 7月, 2020 1 次提交
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由 Alexander Lobakin 提交于
When generating debug dump, driver firstly collects all data in binary form, and then performs per-feature formatting to human-readable if it is supported. For ethtool -d, this is roughly incorrect for two reasons. First of all, drivers should always provide only original raw dumps to Ethtool without any changes. The second, and more critical, is that Ethtool's output buffer size is strictly determined by ethtool_ops::get_regs_len(), and all data *must* fit in it. The current version of driver always returns the size of raw data, but the size of the formatted buffer exceeds it in most cases. This leads to out-of-bound writes and memory corruption. Address both issues by adding an option to return original, non-formatted debug data, and using it for Ethtool case. v2: - Expand commit message to make it more clear; - No functional changes. Fixes: c965db44 ("qed: Add support for debug data collection") Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 7月, 2020 2 次提交
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由 Alexander Lobakin 提交于
Set the actual copyright holder and years in all qed source files. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexander Lobakin 提交于
QLogic QED drivers source code is dual licensed under GPL-2.0/BSD-3-Clause. Remove all the boilerplates in the existing code and replace it with the correct SPDX tag. Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 15 5月, 2020 3 次提交
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由 Igor Russkikh 提交于
On different hardware events we have to respond differently, on some of hardware indications hw attention (error condition) should be cleared by the driver to continue normal functioning. Here we introduce attention clear flags, and put them on some important events (in aeu_descs). Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
Thats probably a legacy code had double declaration of some fields. Cleanup this, removing copy and fixing references. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
Here we introduce qed device error tracking flags and error types. qed_hw_err_notify is an entrace point to report errors. It'll notify higher level drivers (qede/qedr/etc) to handle and recover the error. List of posible errors comes from hardware interfaces, but could be extended in future. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 18 4月, 2020 1 次提交
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由 Sudarsana Reddy Kalluru 提交于
Management firmware (MFW) sends a notification whenever there is a change in the bandwidth values. Add driver support for sending this notification to the upper layer drivers (e.g., qedf). Link: https://lore.kernel.org/r/20200416084314.18851-6-skashyap@marvell.comSigned-off-by: NSudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: NSaurav Kashyap <skashyap@marvell.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 27 1月, 2020 6 次提交
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由 Michal Kalderon 提交于
Add to debug dump more information on the platform it was collected from (pci func, path id). Provide human readable reg fifo erros. Removed static debug arrays from HSI Functions, and move them to the hwfn. Some structures were slightly changed (removing reserved chip id for example) which lead to many long initializations being modified with one parameter less during initialization. This leads to some long diffs that don't really change anything. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
Part of the FW drop includes new debug capabilities implemented in the qed_debug file. This patch dumps additional information during ethtool -d for better debugging. The data dumped is the ilt (internal logical table) and information gathered by the management firmware incase there was a crash and driver was not able to extract the information (mdump). Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
This feature enables the FW to page out FW code when required Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
The number of BTB blocks was modified to be different between the two chip flavors supported (BB/K2) as a result, this lead to a re-write of selecting the default hsi value based on the chip. This patch creates a lookup table for hsi values per chip rather than ask again and again for every value. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
LL2 queues were a limited resource due to FW constraints. This FW introduced a new resource which is a context based ll2 queue (memory on host). The additional ll2 queues are required for RDMA SRIOV. The code refers to the previous ll2 queues as ram-based or legacy, and the new queues as ctx-based. This change decreased the "legacy" ram-based queues therefore the first ll2 queue used for iWARP was converted to the ctx-based ll2 queue. This feature also exposed a bug in the DIRECT_REG_WR64 macro implementation which didn't have an effect in other use cases. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
IRO stands for internal RAM offsets. Updating the FW binary produces different iro offsets. This file contains the different values, and a new representation of the values. Update the FW version Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 5月, 2019 2 次提交
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由 Michal Kalderon 提交于
The table currently contains a single parameter for configuring whether iWARP should be enabled on a 100g device. Enabling iWARP on a 100g device impacts L2 performance and is therefore not enabled by default. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
This patch refactors the current llh implementation. It exposes a hw resource called ppfid (port-pfid) and implements an API for configuring the resource. Default configuration which was used until now limited the number of filters per PF and did not support engine affinity per protocol. The new API enables allocating more filter rules per PF and enables affinitizing protocol packets to a certain engine which enables full 100g protocol offload support. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 15 4月, 2019 3 次提交
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由 Denis Bolotin 提交于
Separate the overflow handling from the hardware interrupt status analysis. The interrupt status is a single register and is common for all PFs. The first PF reading the register is not necessarily the one who overflowed. All PFs must check their overflow status on every attention. In this change we clear the sticky indication in the attention handler to allow doorbells to be processed again as soon as possible, but running the doorbell recovery is scheduled for the periodic handler to reduce the time spent in the attention handler. Checking the need for DORQ flush was changed to "db_bar_no_edpm" because qed_edpm_enabled()'s result could change dynamically and might have prevented a needed flush. Signed-off-by: NDenis Bolotin <dbolotin@marvell.com> Signed-off-by: NMichal Kalderon <mkalderon@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Denis Bolotin 提交于
When the DORQ (doorbell block) is overflowed, all PFs get attentions at the same time. If one PF finished handling the attention before another PF even started, the second PF might miss the DORQ's attention bit and not handle the attention at all. If the DORQ attention is missed and the issue is not resolved, another attention will not be sent, therefore each attention is treated as a potential DORQ attention. As a result, the attention callback is called more frequently so the debug print was moved to reduce its quantity. The number of periodic doorbell recovery handler schedules was reduced because it was the previous way to mitigating the missed attention issue. Signed-off-by: NDenis Bolotin <dbolotin@marvell.com> Signed-off-by: NMichal Kalderon <mkalderon@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Denis Bolotin 提交于
DB_REC_DRY_RUN (running doorbell recovery without sending doorbells) is never used. DB_REC_ONCE (send a single doorbell from the doorbell recovery) is not needed anymore because by running the periodic handler we make sure we check the overflow status later instead. This patch is needed because in the next patches, the only doorbell recovery type being used is DB_REC_REAL_DEAL, and the fixes are much cleaner without this enum. Signed-off-by: NDenis Bolotin <dbolotin@marvell.com> Signed-off-by: NMichal Kalderon <mkalderon@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 3月, 2019 1 次提交
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由 Sudarsana Reddy Kalluru 提交于
The patch introduces a new Multi-Function bit for cases where firmware shouldn't perform the insertion of vlan-0 tag. The new bit is defined to abstract the implementation from the actual MF mode. Signed-off-by: NSudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NMichal Kalderon <mkalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 2月, 2019 1 次提交
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由 Sudarsana Reddy Kalluru 提交于
Read port count from the shared memory instead of driver deriving this value. This change simplifies the driver implementation and also avoids any dependencies for finding the port-count. Signed-off-by: NSudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: NMichal Kalderon <mkalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 2月, 2019 1 次提交
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由 Manish Chopra 提交于
Version update for qed/qede modules. Signed-off-by: NManish Chopra <manishc@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 1月, 2019 2 次提交
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由 Tomer Tayar 提交于
This patch adds the detection and handling of a parity error ("process kill event"), including the update of the protocol drivers, and the prevention of any HW access that will lead to device access towards the host while recovery is in progress. It also provides the means for the protocol drivers to trigger a recovery process on their decision. Signed-off-by: NTomer Tayar <tomer.tayar@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomer Tayar 提交于
Initiating final cleanup after an ungraceful driver unload can lead to bad PCI accesses towards the host. This patch revises the load sequence so final cleanup is sent while the internal master enable is cleared, to prevent the host accesses, and clears the internal error indications just before enabling the internal master enable. Signed-off-by: NTomer Tayar <tomer.tayar@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 1月, 2019 1 次提交
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由 David S. Miller 提交于
This is new code and not bug fixes. This reverts all changes added by merge commit 8fb18be9Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 1月, 2019 2 次提交
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由 Tomer Tayar 提交于
This patch adds the detection and handling of a parity error ("process kill event"), including the update of the protocol drivers, and the prevention of any HW access that will lead to device access towards the host while recovery is in progress. It also provides the means for the protocol drivers to trigger a recovery process on their decision. Signed-off-by: NTomer Tayar <tomer.tayar@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomer Tayar 提交于
Initiating final cleanup after an ungraceful driver unload can lead to bad PCI accesses towards the host. This patch revises the load sequence so final cleanup is sent while the internal master enable is cleared, to prevent the host accesses, and clears the internal error indications just before enabling the internal master enable. Signed-off-by: NTomer Tayar <tomer.tayar@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 12月, 2018 2 次提交
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由 Ariel Elior 提交于
In case of an attention from the doorbell queue block, analyze the HW indications. In case of a doorbell overflow, execute a doorbell recovery. Since there can be spurious indications (race conditions between multiple PFs), schedule a periodic task for checking whether a doorbell overflow may have been missed. After a set time with no indications, terminate the periodic task. Signed-off-by: NAriel Elior <Ariel.Elior@cavium.com> Signed-off-by: NMichal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ariel Elior 提交于
Add the database used to register doorbelling entities, and APIs for adding and deleting entries, and logic for traversing the database and doorbelling once on behalf of all entities. Signed-off-by: NAriel Elior <Ariel.Elior@cavium.com> Signed-off-by: NMichal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 10月, 2018 1 次提交
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由 Rahul Verma 提交于
Align the use of local PTT to propagate through the qed_mcp* API's. Global ptt should not be used. Register access should be done through layers. Register address is mapped into a PTT, PF translation table. Several interface functions require a PTT to direct read/write into register. There is a pool of PTT maintained, and several PTT are used simultaneously to access device registers in different flows. Same PTT should not be used in flows that can run concurrently. To avoid running out of PTT resources, too many PTT should not be acquired without releasing them. Every PF has a global PTT, which is used throughout the life of PF, in most important flows for register access. Generic functions acquire the PTT locally and release after the use. This patch aligns the use of Global PTT and Local PTT accordingly. Signed-off-by: NRahul Verma <rahul.verma@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 9月, 2018 1 次提交
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由 Denis Bolotin 提交于
This patch adds a new qed firmware with fixes and support for new features. Fixes: - Fix a rare case of device crash with iWARP, iSCSI or FCoE offload. - Fix GRE tunneled traffic when iWARP offload is enabled. - Fix RoCE failure in ib_send_bw when using inline data. - Fix latency optimization flow for inline WQEs. - BigBear 100G fix RDMA: - Reduce task context size. - Application page sizes above 2GB support. - Performance improvements. ETH: - Tenant DCB support. - Replace RSS indirection table update interface. Misc: - Debug Tools changes. Signed-off-by: NDenis Bolotin <denis.bolotin@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 8月, 2018 2 次提交
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由 Denis Bolotin 提交于
RoCE qps use a pair of physical queues (pq) received from the Queue Manager (QM) - an offload queue (OFLD) and a low latency queue (LLT). The QM block creates a pq for each TC, and allows RoCE qps to ask for a pq with a specific TC. As a result, qps with different VLAN priorities can be mapped to different TCs, and employ features such as PFC and ETS. Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDenis Bolotin <denis.bolotin@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Denis Bolotin 提交于
Distinguish not set offload_tc from offload_tc 0 and add getters and setters. Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDenis Bolotin <denis.bolotin@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 7月, 2018 1 次提交
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由 Denis Bolotin 提交于
Configuration information read at driver load can become stale after it is updated. Mark information as not valid and re-populate when this happens. Signed-off-by: NDenis Bolotin <denis.bolotin@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 5月, 2018 1 次提交
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由 Sudarsana Reddy Kalluru 提交于
MFW requests the TLVs in interrupt context. Extracting of the required data from upper layers and populating of the TLVs require process context. The patch adds work-queues for processing the tlv requests. It also adds the implementation for requesting the tlv values from appropriate protocol driver. Signed-off-by: NSudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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