- 25 4月, 2013 12 次提交
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由 Alexander Clouter 提交于
This patch allows timeriomem_rng to be used via devicetree. Signed-off-by: NAlexander Clouter <alex@digriz.org.uk> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Alexander Clouter 提交于
timeriomem_rng only supports a single device instance. This patch enables multiple timeriomem_rng devices to coexist as well as adds some additional error checking. Signed-off-by: NAlexander Clouter <alex@digriz.org.uk> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Sandy Wu 提交于
Occurs when CONFIG_CRYPTO_CRC32C_INTEL=y and CONFIG_CRYPTO_CRC32C_INTEL=y. Older versions of bintuils do not support the pclmulqdq instruction. The PCLMULQDQ gas macro is used instead. Signed-off-by: NSandy Wu <sandyw@twitter.com> Cc: stable@vger.kernel.org # 3.8+ Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Lubomir Rintel 提交于
This adds a driver for random number generator present on Broadcom BCM2835 SoC, used in Raspberry Pi and Roku 2 devices. Signed-off-by: NDom Cobley <popcornmix@gmail.com> Signed-off-by: NLubomir Rintel <lkundrak@v3.sk> Tested-by: NStephen Warren <swarren@wwwdotorg.org> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Matt Mackall <mpm@selenic.com> Cc: linux-rpi-kernel@lists.infradead.org Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
checkstack reports report_deco_status(), report_ccb_status() as particularly excessive stack users. Move their lookup tables off the stack and put them in .rodata. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
commit 2af8f4a2 "crypto: caam - coccicheck fixes" added error return values yet neglected to change the type from unsigned. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tim Chen 提交于
crypto: sha512 - Create module providing optimized SHA512 routines using SSSE3, AVX or AVX2 instructions. We added glue code and config options to create crypto module that uses SSE/AVX/AVX2 optimized SHA512 x86_64 assembly routines. Signed-off-by: NTim Chen <tim.c.chen@linux.intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tim Chen 提交于
Provides SHA512 x86_64 assembly routine optimized with SSE, AVX and AVX2's RORX instructions. Speedup of 70% or more has been measured over the generic implementation. Signed-off-by: NTim Chen <tim.c.chen@linux.intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tim Chen 提交于
Provides SHA512 x86_64 assembly routine optimized with SSE and AVX instructions. Speedup of 60% or more has been measured over the generic implementation. Signed-off-by: NTim Chen <tim.c.chen@linux.intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tim Chen 提交于
Provides SHA512 x86_64 assembly routine optimized with SSSE3 instructions. Speedup of 40% or more has been measured over the generic implementation. Signed-off-by: NTim Chen <tim.c.chen@linux.intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tim Chen 提交于
Other SHA512 routines may need to use the generic routine when FPU is not available. Signed-off-by: NTim Chen <tim.c.chen@linux.intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tim Chen 提交于
crypto: sha256 - Create module providing optimized SHA256 routines using SSSE3, AVX or AVX2 instructions. We added glue code and config options to create crypto module that uses SSE/AVX/AVX2 optimized SHA256 x86_64 assembly routines. Signed-off-by: NTim Chen <tim.c.chen@linux.intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 03 4月, 2013 7 次提交
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由 Tim Chen 提交于
Provides SHA256 x86_64 assembly routine optimized with SSE, AVX and AVX2's RORX instructions. Speedup of 70% or more has been measured over the generic implementation. Signed-off-by: NTim Chen <tim.c.chen@linux.intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tim Chen 提交于
Provides SHA256 x86_64 assembly routine optimized with SSE and AVX instructions. Speedup of 60% or more has been measured over the generic implementation. Signed-off-by: NTim Chen <tim.c.chen@linux.intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tim Chen 提交于
Provides SHA256 x86_64 assembly routine optimized with SSSE3 instructions. Speedup of 40% or more has been measured over the generic implementation. Signed-off-by: NTim Chen <tim.c.chen@linux.intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tim Chen 提交于
Other SHA256 routine may need to use the generic routine when FPU is not available. Signed-off-by: NTim Chen <tim.c.chen@linux.intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jussi Kivilinna 提交于
These modules require AVX support in assembler, so add new check to Makefile for this. Other option would be to use CONFIG_AS_AVX inside source files, but that would result dummy/empty/no-fuctionality modules being created. Signed-off-by: NJussi Kivilinna <jussi.kivilinna@iki.fi> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jussi Kivilinna 提交于
Signed-off-by: NJussi Kivilinna <jussi.kivilinna@iki.fi> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Wei Yongjun 提交于
Fix to return a negative error code from the error handling case instead of 0, as returned elsewhere in this function. Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 22 3月, 2013 5 次提交
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由 Sachin Kamat 提交于
This eliminates having an #ifdef returning NULL for the case when OF is disabled. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Acked-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Fabio Estevam 提交于
Using devm_ioremap_resource() can make the code cleaner and simpler. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Vakul Garg 提交于
Following AEAD algo templates are updated for '.type' initialization. (a) authenc(hmac(sha224),cbc(aes)) (b) authenc(hmac(sha384),cbc(aes)) (c) authenc(hmac(sha224),cbc(des3_ede)) (d) authenc(hmac(sha384),cbc(des3_ede)) (e) authenc(hmac(sha224),cbc(des)) (f) authenc(hmac(sha384),cbc(des)) Signed-off-by: NVakul Garg <vakul@freescale.com> Reviewed-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Vakul Garg 提交于
This change is required for post SEC-5.0 devices which have RNG4. Setting RDB in security configuration register allows CAAM to use the "Random Data Buffer" to be filled by a single request. The Random Data Buffer is large enough for ten packets to get their IVs from a single request. If the Random Data Buffer is not enabled, then each IV causes a separate request, and RNG4 hardware cannot keep up resulting in lower IPSEC throughput if random IVs are used. Signed-off-by: NVakul Garg <vakul@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jingoo Han 提交于
This patch adds CONFIG_PM_SLEEP to suspend/resume functions to fix the following build warning when CONFIG_PM_SLEEP is not selected. drivers/char/hw_random/exynos-rng.c:147:12: warning: 'exynos_rng_runtime_suspend' defined but not used [-Wunused-function] drivers/char/hw_random/exynos-rng.c:157:12: warning: 'exynos_rng_runtime_resume' defined but not used [-Wunused-function] Add CONFIG_PM_RUNTIME to suspend/resume functions to fix the build error. It is because UNIVERSAL_DEV_PM_OPS macro is related to both CONFIG_PM_SLEEP and CONFIG_PM_RUNTIME. drivers/char/hw_random/exynos-rng.c:167:8: error: 'exynos_rng_runtime_suspend' undeclared here (not in a function) drivers/char/hw_random/exynos-rng.c:167:8: error: 'exynos_rng_runtime_resume' undeclared here (not in a function) Signed-off-by: NJingoo Han <jg1.han@samsung.com> Reported-by: NDavid Rientjes <rientjes@google.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 21 3月, 2013 2 次提交
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由 Mihnea Dobrescu-Balaur 提交于
Signed-off-by: NMihnea Dobrescu-Balaur <mihneadb@gmail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Javier Martin 提交于
SAHARA2 HW module is included in the i.MX27 SoC from Freescale. It is capable of performing cipher algorithms such as AES, 3DES..., hashing and RNG too. This driver provides support for AES-CBC and AES-ECB by now. Reviewed-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 10 3月, 2013 13 次提交
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由 Tang Chen 提交于
Seeing from the comment, there should be three reasons for removing request_mem_region. Change the comment "two" to "three". Signed-off-by: NTang Chen <tangchen@cn.fujitsu.com> Acked-by: NRob Landley <rob@landley.net> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Paul Bolle 提交于
The Kconfig entry for CAAM's hash algorithm implementations has always selected CRYPTO_AHASH. But there's no corresponding Kconfig symbol. It seems it was intended to select CRYPTO_HASH, like other crypto drivers do. That would apparently (indirectly) select CRYPTO_HASH2, which would enable the ahash functionality this driver uses. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Reviewed-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Sachin Kamat 提交于
module_platform_driver() makes the code simpler by eliminating boilerplate code. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Sachin Kamat 提交于
module_platform_driver() makes the code simpler by eliminating boilerplate code. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Joel A Fernandes 提交于
After DMA is complete, the omap_aes_finish_req function is called as a part of the done_task tasklet. During this its atomic and any calls to pm functions should not assume they wont sleep. The patch replaces a call to pm_runtime_put_sync (which can sleep) with pm_runtime_put thus fixing a kernel panic observed on AM33xx SoC during AES operation. Tested on an AM33xx SoC device (beaglebone board). To reproduce the problem, I used the tcrypt kernel module as: modprobe tcrypt sec=2 mode=500 Signed-off-by: NJoel A Fernandes <joelagnel@ti.com> Cc: David S. Miller <davem@davemloft.net> Acked-by: NMark A. Greer <mgreer@animalcreek.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Joel A Fernandes 提交于
After DMA is complete, the omap_sham_finish_req function is called as a part of the done_task tasklet. During this its atomic and any calls to pm functions should not assume they wont sleep. The patch replaces a call to pm_runtime_put_sync (which can sleep) with pm_runtime_put thus fixing a kernel panic observed on AM33xx SoC during SHA operation. Tested on an AM33xx SoC device (beaglebone board). To reproduce the problem, used the tcrypt kernel module as: modprobe tcrypt sec=2 mode=403 Signed-off-by: NJoel A Fernandes <joelagnel@ti.com> Cc: David S. Miller <davem@davemloft.net> Acked-by: NMark A. Greer <mgreer@animalcreek.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Syam Sidhardhan 提交于
If we define dev_dbg(), then there is a possible NULL pointer dereference. Signed-off-by: NSyam Sidhardhan <s.syam@samsung.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Mathias Krause 提交于
There is no need to modify the netlink dispatch table at runtime and making it const even makes the resulting object file slightly smaller. Cc: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: NMathias Krause <minipli@googlemail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tim Chen 提交于
crypto: crc32c - Update the links to the white papers on CRC32C calculations with PCLMULQDQ instructions. Herbert, The following patch update the stale link to the CRC32C white paper that was referenced. Tim Signed-off-by: NTim Chen <tim.c.chen@linux.intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Nicolas Royer 提交于
Updates from IP release 0x320 to 0x400: - add DMA support (previous IP revision use PDC) - add DMA double input buffer support - add SHA224 support Update from IP release 0x400 to 0x410: - add SHA384 and SHA512 support Signed-off-by: NNicolas Royer <nicolas@eukrea.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NEric Bénard <eric@eukrea.com> Tested-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Nicolas Royer 提交于
Update from previous IP release (0x600): - add DMA support (previous IP release use PDC) Signed-off-by: NNicolas Royer <nicolas@eukrea.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NEric Bénard <eric@eukrea.com> Tested-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Nicolas Royer 提交于
Updates from previous IP release (0x120): - add cfb64 support - add DMA double input buffer support Signed-off-by: NNicolas Royer <nicolas@eukrea.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NEric Bénard <eric@eukrea.com> Tested-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Nicolas Royer 提交于
Only AES use DMA in AT91SAM9G45 (TDES and SHA use PDC). However latest Atmel TDES and SHA IP releases use DMA instead of PDC. --> Atmel TDES and SHA drivers need DMA platform data for those IP releases. Goal of this patch is to use the same platform data structure for all Atmel crypto peripherals. This structure contains information about DMA interface. Signed-off-by: NNicolas Royer <nicolas@eukrea.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NEric Bénard <eric@eukrea.com> Tested-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 26 2月, 2013 1 次提交
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由 Herbert Xu 提交于
This bool option can never be set to anything other than y. So let's just kill it. Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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