- 09 12月, 2020 2 次提交
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由 Simon Ser 提交于
As more checks are added, the indentation makes the code harder to read. Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NSimon Ser <contact@emersion.fr> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
To avoid a recently added warning: Bogus possible_crtcs: [ENCODER:65:TMDS-65] possible_crtcs=0xf (full crtc mask=0x7) WARNING: CPU: 3 PID: 439 at drivers/gpu/drm/drm_mode_config.c:617 drm_mode_config_validate+0x178/0x200 [drm] In this case the warning is harmless, but confusing to users. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=209123Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 12月, 2020 3 次提交
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由 Simon Ser 提交于
Replace the width check with a pitch check, which matches DM internals. Add a new check to make sure the pitch (in pixels) matches the width. Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NSimon Ser <contact@emersion.fr> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Simon Ser 提交于
Instead of relying on pitch (in pixels) == width, use the FB pitch. This is less confusing to readers, and works correctly if we ever support FBs with a pitch (in pixels) != width. This also makes the code symmetrical with fill_plane_buffer_attributes. Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NSimon Ser <contact@emersion.fr> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Simon Ser 提交于
Instead of silently failing the atomic check, explain what happened via a debug log. This makes it easier for user-space to figure out why something failed. Signed-off-by: NSimon Ser <contact@emersion.fr> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 12月, 2020 2 次提交
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由 Eryk Brol 提交于
[Why] Whenever DSC parameters are changed we need to perform full modeset to commit DSC changes to DC. [How] If dsc_force_changed is set, need to set mode_changed on new CRTC state Signed-off-by: NEryk Brol <eryk.brol@amd.com> Signed-off-by: NMikita Lipski <mikita.lipski@amd.com> Reviewed-by: NMikita Lipski <Mikita.Lipski@amd.com> Acked-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Aurabindo Pillai 提交于
[Why&How] Set dpms off on the connector that was unplugged, for the side effect of releasing some references held through deallocation of MST payload. This is the expected behaviour for non MST devices as well. Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: NEryk Brol <eryk.brol@amd.com> Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 25 11月, 2020 5 次提交
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由 Simon Ser 提交于
Setting any rotation on the cursor plane is ignored by amdgpu. Because of DCE/DCN design, it's not possible to rotate the cursor. Instead of displaying the wrong result, stop advertising the rotation property for the cursor plane. Now that we check all cursor plane properties in amdgpu_dm_atomic_check, remove the TODO. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NSimon Ser <contact@emersion.fr> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Simon Ser 提交于
Don't allow user-space to set different scaling parameters for the cursor plane and for the primary plane. Because of DCE/DCN design, it's not possible to have a mismatch. The old check in dm_update_plane_state is superseded by this new check. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NSimon Ser <contact@emersion.fr> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Simon Ser 提交于
Looking at handle_cursor_update, it doesn't seem like src_{x,y,w,h} are picked up by DC. I also tried to change these parameters via a test KMS client, and amdgpu ignored them. Instead of displaying the wrong result, reject the atomic commit. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NSimon Ser <contact@emersion.fr> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Simon Ser 提交于
This patch expands the cursor checks added in "drm/amd/display: add basic atomic check for cursor plane" to also include a FB size check. Without this patch, setting a FB smaller than max_cursor_size with an invalid width would result in amdgpu error messages and a fallback to a 64-byte width: [drm:hubp1_cursor_set_attributes [amdgpu]] *ERROR* Invalid cursor pitch of 100. Only 64/128/256 is supported on DCN. Note that DC uses the word "pitch" when actually checking the FB width. Indeed, the function handle_cursor_update does this: attributes.pitch = attributes.width; In my tests, the cursor FB actually had a pitch of 512 bytes. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NSimon Ser <contact@emersion.fr> Reported-by: NPierre-Loup A. Griffais <pgriffais@valvesoftware.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rodrigo Siqueira 提交于
The HDCP feature requires at least one connector attached to the device; however, some GPUs do not have a physical output, making the HDCP initialization irrelevant. This patch disables HDCP initialization when the graphic card does not have output. Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 19 11月, 2020 3 次提交
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由 Bhawanpreet Lakha 提交于
[Why] These comments are helpful in understanding which case each if statement handles. [How] Add comments for state transitions (9 possible cases) Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: NZhan Liu <zhan.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
[Why] We call add display multiple times because DESIRED->ENABLED cannot happen instantaneously. We can't compare the new_state/old_state to avoid this because on unplug we set the state to DESIRED and on hotplug the state will still be DESIRED. [How] Add a flag to dm_connector_state to keep track of when to enable or disable HDCP Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: NZhan Liu <zhan.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rodrigo Siqueira 提交于
We recently improved our display atomic commit and tail sequence to avoid some issues related to concurrency. One of the major changes consisted of moving the interrupt disable and the stream release from our atomic commit to our atomic tail (commit 6d90a208 ("drm/amd/display: Move disable interrupt into commit tail")) . However, the new code introduced inside our commit tail function was inserted right after the function drm_atomic_helper_update_legacy_modeset_state(), which has routines for updating internal data structs related to timestamps. As a result, in certain conditions, the display module can reach a situation where we update our constants and, after that, clean it. This situation generates the following warning: amdgpu 0000:03:00.0: drm_WARN_ON_ONCE(drm_drv_uses_atomic_modeset(dev)) WARNING: CPU: 6 PID: 1269 at drivers/gpu/drm/drm_vblank.c:722 drm_crtc_vblank_helper_get_vblank_timestamp_internal+0x32b/0x340 [drm] ... RIP: 0010:drm_crtc_vblank_helper_get_vblank_timestamp_internal+0x32b/0x340 [drm] ... Call Trace: ? dc_stream_get_vblank_counter+0x57/0x60 [amdgpu] drm_crtc_vblank_helper_get_vblank_timestamp+0x1c/0x20 [drm] drm_get_last_vbltimestamp+0xad/0xc0 [drm] drm_reset_vblank_timestamp+0x63/0xd0 [drm] drm_crtc_vblank_on+0x85/0x150 [drm] amdgpu_dm_atomic_commit_tail+0xaf1/0x2330 [amdgpu] commit_tail+0x99/0x130 [drm_kms_helper] drm_atomic_helper_commit+0x123/0x150 [drm_kms_helper] amdgpu_dm_atomic_commit+0x11/0x20 [amdgpu] drm_atomic_commit+0x4a/0x50 [drm] drm_atomic_helper_set_config+0x7c/0xc0 [drm_kms_helper] drm_mode_setcrtc+0x20b/0x7e0 [drm] ? tomoyo_path_number_perm+0x6f/0x200 ? drm_mode_getcrtc+0x190/0x190 [drm] drm_ioctl_kernel+0xae/0xf0 [drm] drm_ioctl+0x245/0x400 [drm] ? drm_mode_getcrtc+0x190/0x190 [drm] amdgpu_drm_ioctl+0x4e/0x80 [amdgpu] __x64_sys_ioctl+0x91/0xc0 do_syscall_64+0x38/0x90 entry_SYSCALL_64_after_hwframe+0x44/0xa9 ... For fixing this issue we rely upon a refactor introduced on drm_atomic_helper_update_legacy_modeset_state ("Remove the timestamping constant update from drm_atomic_helper_update_legacy_modeset_state()") which decouples constant values update from drm_atomic_helper_update_legacy_modeset_state to a new helper. Basically, this commit uses this new helper and place it right after our release module to avoid a situation where our CRTC struct gets wrong values. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1373Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 17 11月, 2020 1 次提交
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由 Wayne Lin 提交于
[Why] Instead of calculating CRC on whole frame, add flexibility to calculate CRC on specific frame region. [How] Add few crc window coordinate properties. By default, CRC is calculated on whole frame unless user space specifies the CRC calculation window. Signed-off-by: NWayne Lin <Wayne.Lin@amd.com> Acked-by: NBindu Ramamurthy <bindu.r@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 11月, 2020 1 次提交
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由 Bas Nieuwenhuizen 提交于
If we use DCC modifiers this can increase the number of planes from the initial 1 plane with metadata, so that we get a valid modifier from getfb2. Since the code didn't update the format_info getfb2 would only ever return 1 plane with a modifier for which userspace expects > 1. This moves the format lookup to amdgpu_display.c so we do not have issues when DC is not compiled. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 11 11月, 2020 3 次提交
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由 Bernard Zhao 提交于
In function amdgpu_dm_connector_get_modes, drm_edid_is_valid will check weather (!edid), no need to check again in the if branch. Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBernard Zhao <bernard@vivo.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Victor Lu 提交于
[why] On DCE, the cursor is not being disabled on commits where there is no CRTC or FB enabled. [how] Explicitly disable the cursor in the commit tail only if the pending commit disables the CRTC. Signed-off-by: NVictor Lu <victorchengchi.lu@amd.com> Acked-by: NBindu Ramamurthy <bindu.r@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Krunoslav Kovac 提交于
[Why & How] The intended use is to force PSR into active state and ignore all events until explicit EXIT. A new event force_static is added to power module. It is then sent to FW. Signed-off-by: NKrunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: NBindu Ramamurthy <bindu.r@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 11月, 2020 1 次提交
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由 Alex Deucher 提交于
Avoids confusion in configurations. v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled v3: rebase on latest code Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> (v1) Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 04 11月, 2020 2 次提交
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由 Alex Deucher 提交于
No need for a separate config option at this point. Reviewed-by: NLuben Tuikov <luben.tuikov@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Roman Li 提交于
Display Manager support for green_sardine Signed-off-by: NRoman Li <Roman.Li@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 11月, 2020 3 次提交
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由 Alex Deucher 提交于
Properly protect the relevant code with CONFIG_DRM_AMD_DC_DCN. Fixes: 0b08c54b ("drm/amd/display: Fix the display corruption issue on Navi10") Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Victor Lu 提交于
[why] There is a DRM_ERROR when the dc_sink is NULL and there should not be this warning when the connector is forced. [how] Do not warn if dc_sink is NULL if the connector is forced. Signed-off-by: NVictor Lu <victorchengchi.lu@amd.com> Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: NQingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Eryk Brol 提交于
[Why] We want to trigger atomic check on connector when DSC debugfs properties are changed. The previous method was reverted because it accessed connector properties unsafely and would also heavily impact performance. [How] Add a flag for forcing DSC update in CRTC state and add connector to the state if the flag is set. Signed-off-by: NEryk Brol <eryk.brol@amd.com> Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: NQingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 11月, 2020 1 次提交
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由 Maxime Ripard 提交于
The current atomic helpers have either their object state being passed as an argument or the full atomic state. The former is the pattern that was done at first, before switching to the latter for new hooks or when it was needed. Let's start convert all the remaining helpers to provide a consistent interface, starting with the CRTC's atomic_check. The conversion was done using the coccinelle script below, built tested on all the drivers and actually tested on vc4. virtual report @@ struct drm_crtc_helper_funcs *FUNCS; struct drm_crtc *crtc; struct drm_crtc_state *crtc_state; identifier dev, state; identifier ret, f; @@ f(struct drm_device *dev, struct drm_atomic_state *state) { <... - ret = FUNCS->atomic_check(crtc, crtc_state); + ret = FUNCS->atomic_check(crtc, state); ...> } @@ identifier crtc, new_state; @@ struct drm_crtc_helper_funcs { ... - int (*atomic_check)(struct drm_crtc *crtc, struct drm_crtc_state *new_state); + int (*atomic_check)(struct drm_crtc *crtc, struct drm_atomic_state *state); ... } @ crtc_atomic_func @ identifier helpers; identifier func; @@ static struct drm_crtc_helper_funcs helpers = { ..., .atomic_check = func, ..., }; @ ignores_new_state @ identifier crtc_atomic_func.func; identifier crtc, new_state; @@ int func(struct drm_crtc *crtc, struct drm_crtc_state *new_state) { ... when != new_state } @ adds_new_state depends on crtc_atomic_func && !ignores_new_state @ identifier crtc_atomic_func.func; identifier crtc, new_state; @@ int func(struct drm_crtc *crtc, struct drm_crtc_state *new_state) { + struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc); ... } @ depends on crtc_atomic_func @ identifier crtc_atomic_func.func; expression E; type T; @@ int func(...) { ... - T state = E; + T crtc_state = E; <+... - state + crtc_state ...+> } @ depends on crtc_atomic_func @ identifier crtc_atomic_func.func; type T; @@ int func(...) { ... - T state; + T crtc_state; <+... - state + crtc_state ...+> } @ depends on crtc_atomic_func @ identifier crtc_atomic_func.func; identifier new_state; identifier crtc; @@ int func(struct drm_crtc *crtc, - struct drm_crtc_state *new_state + struct drm_atomic_state *state ) { ... } @@ identifier new_state; identifier crtc; @@ int vmw_du_crtc_atomic_check(struct drm_crtc *crtc, - struct drm_crtc_state *new_state + struct drm_atomic_state *state ) { + struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc); ... } @@ identifier new_state; identifier crtc; @@ int vmw_du_crtc_atomic_check(struct drm_crtc *crtc, - struct drm_crtc_state *new_state + struct drm_atomic_state *state ); @ include depends on adds_new_state @ @@ #include <drm/drm_atomic.h> @ no_include depends on !include && adds_new_state @ @@ + #include <drm/drm_atomic.h> #include <drm/...> Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Acked-by: NThomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-1-maxime@cerno.tech
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- 31 10月, 2020 8 次提交
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由 Bas Nieuwenhuizen 提交于
We're unconditionally using modifiers internally for GFX9+ now. Signed-off-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bas Nieuwenhuizen 提交于
This expose modifier support on GFX9+. Only modifiers that can be rendered on the current GPU are added. This is to reduce the number of modifiers exposed. The HW could expose more, but the best mechanism to decide what to expose without an explosion in modifiers is still to be decided, and in the meantime this should not regress things from pre-modifiers and does not risk regressions as we make up our mind in the future. v2: - Added comment that D on Raven is only valid for 64bpp and will be filtered based on format later. - Removed D tiling modes that weren't useful for 64bpp on GFX10+. v4: Add AMDGPU_FAMILY_VGH case. Signed-off-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bas Nieuwenhuizen 提交于
For DCC we will use 2/3 planes to avoid X rendering to the frontbuffer with DCC compressed images. To make this work with the core KMS validation we need to add extra formats with the extra planes. However, due to flexibility we set bpp = 0 for the extra planes and do the validation ourselves. Signed-off-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bas Nieuwenhuizen 提交于
This sets the DC tiling options from the modifier, if modifiers are used for the FB. This patch by itself does not expose the support yet though. There is not much validation yet to limit the scope of this patch, but the current validation is at the same level as the BO metadata path. v2: Add modifier check to should_reset_plane. Signed-off-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bas Nieuwenhuizen 提交于
Prepare for inserting modifiers based configuration, while sharing a bunch of DCC validation & initializing the device-based configuration. Signed-off-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bas Nieuwenhuizen 提交于
This moves the tiling_flags to the framebuffer creation. This way the time of the "tiling" decision is the same as it would be with modifiers. Signed-off-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bas Nieuwenhuizen 提交于
With modifiers I'd like to support non-dedicated buffers for images. Signed-off-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Cc: stable@vger.kernel.org # 5.1.0 Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bas Nieuwenhuizen 提交于
Silently accepting it could result in corruption. Signed-off-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 30 10月, 2020 1 次提交
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由 Alex Deucher 提交于
No need for a separate config option at this point. Reviewed-by: NLuben Tuikov <luben.tuikov@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 29 10月, 2020 1 次提交
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由 Mauro Carvalho Chehab 提交于
dm_comressor_info -> dm_compressor_info The kernel-doc markup is right, but the struct itself and their references contain a typo. Signed-off-by: NMauro Carvalho Chehab <mchehab+huawei@kernel.org> Link: https://lore.kernel.org/r/9de495fa791596609eb2e73ba71cea99e09b2689.1603791716.git.mchehab+huawei@kernel.orgSigned-off-by: NJonathan Corbet <corbet@lwn.net>
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- 27 10月, 2020 3 次提交
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由 Rodrigo Siqueira 提交于
Debug amdgpu_dm could be a complicated task, therefore, this commit adds tracepoints in some convenient functions such as plane and connector check inside amdgpu_dm. Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rodrigo Siqueira 提交于
Our DC currently uses some of the tracepoint function inside a DC header, which means that many other files implicitly include part of the trace function. This situation limits how we can expand this feature for other parts of the driver by generating multiple compilation errors when we try to reuse some of the existing structures. This commit decouples part of the amdgpu_dm_trace from DC core to simplify the trace enlargement in future changes. Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nikola Cornij 提交于
[Why] Can be used for debug purposes [How] Add max target bpp override field and related handling Signed-off-by: NNikola Cornij <nikola.cornij@amd.com> Acked-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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