- 20 12月, 2011 5 次提交
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由 Kim Phillips 提交于
manual removal of double-spaces - no non-whitespace changes. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
this is the result of running unexpand -a on desc.h. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
SEC2/3 h/w doesn't have a dedicated interrupt for errors, and the only callsite for talitos_error has already done the type conversion, so simplify talitos_error to take a pointer to a struct device. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
As prescribed by Linus: https://lkml.org/lkml/2011/12/2/290Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
Fix a kfree to an invalid address which causes an oops when running on SEC v2.0 h/w (introduced in commit 702331b "crypto: talitos - add hmac algorithms"). Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 30 11月, 2011 1 次提交
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由 Axel Lin 提交于
This patch converts the drivers in drivers/crypto/* to use the module_platform_driver() macro which makes the code smaller and a bit simpler. Cc: James Hsiao <jhsiao@amcc.com> Cc: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: "David S. Miller" <davem@davemloft.net> Signed-off-by: NAxel Lin <axel.lin@gmail.com> Acked-by: NVladimir Zapolskiy <vzapolskiy@gmail.com> Acked-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 21 11月, 2011 5 次提交
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由 Kim Phillips 提交于
specifically, add these algorithm combinations: authenc-hmac-md5-cbc-aes-caam authenc-hmac-md5-cbc-des3_ede-caam authenc-hmac-md5-cbc-des-caam Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
Some later SEC v3.x are equipped with a second IRQ line. By correctly assigning IRQ affinity, this feature can be used to increase performance on dual core parts, like the MPC8572E and P2020E. The existence of the 2nd IRQ is determined from the device node's interrupt property. If present, the driver remaps two of four channels, which in turn makes those channels trigger their interrupts on the 2nd line instead of the first. To handle single- and dual-IRQ combinations efficiently, talitos gets two new interrupt handlers and back-half workers. [includes a fix to MCR_LO's address.] Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
Add a reg member to the channel struct and use it to access channels. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
talitos prints every algorithm it registers at module load time. Algorithms are being added that make for an excessively noisy console (latest HMACs patch makes an SEC 3.1 print 20 lines). Instead, display the SEC h/w version number, and inform the user of algorithm registration status in /proc/crypto, like so: talitos ffe30000.crypto: fsl,sec3.1 algorithms registered in /proc/crypto Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Lee Nipper 提交于
Add these hmac algorithms to talitos: hmac(md5), hmac(sha1), hmac(sha224), hmac(sha256), hmac(sha384), hmac(sha512). These are all type ahash. Signed-off-by: NLee Nipper <lee.nipper@gmail.com> Fixed up to not register HMAC algorithms on sec2.0 devices. Rationale (from Lee): on an 8349E Rev1.1, there's a problem with hmac for any talitos hmac sequence requiring an intermediate hash context (Pointer DWORD 1); the result is an incorrect hmac. An intermediate hash context is required for something longer than (65536-blocksize), and for other cases when update/finup/final are used inefficiently. Interestingly, a normal hash (without hmac) works perfectly when using an intermediate context. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 01 11月, 2011 1 次提交
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由 Paul Gortmaker 提交于
Part of the include cleanups means that the implicit inclusion of module.h via device.h is going away. So fix things up in advance. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
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- 21 10月, 2011 2 次提交
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由 Kim Phillips 提交于
The CDPR (Current Descriptor Pointer Register) can be unreliable when trying to locate an offending descriptor. Handle that case by (a) not OOPSing, and (b) reverting to the machine internal copy of the descriptor header in order to report the correct execution unit error. Note: printing all execution units' ISRs is not effective because it results in an internal time out (ITO) error and the EU resetting its ISR value (at least when specifying an invalid key length on an SEC 2.2/MPC8313E). Reported-by: NSven Schnelle <svens@stackframe.org> Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Richard Weinberger 提交于
hifn_795x works only on 32 bit, remove the detection while loading the module and catch non-32 bit systems at build time. Signed-off-by: NRichard Weinberger <richard@nod.at> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 20 10月, 2011 1 次提交
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由 Jamie Iles 提交于
The picoxcell crypto driver requires the clk API, but the platform in mainline does not currently support it. Add an explicit dependency on HAVE_CLK to avoid build breakage. Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 15 8月, 2011 1 次提交
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由 Thomas Meyer 提交于
Fix a get/put_cpu() imbalance in the error case when qp == NULL Signed-off-by: NThomas Meyer <thomas@m3y3r.de> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 10 8月, 2011 4 次提交
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由 Jamie Iles 提交于
The completion callback will free the request so we must remove it from the completion list before calling the callback. Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jamie Iles 提交于
Allow the crypto engines to be matched from device tree bindings. Cc: devicetree-discuss@lists.ozlabs.org Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jamie Iles 提交于
For using the device tree probing we use a connection ID for the clk_get() operation. Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jamie Iles 提交于
Use a platform ID table and a single platform_driver. It's neater and makes the device tree addition easier and more consistent. Rename the match values to be inline with what they'll be in the device tree bindings. There aren't any current in-tree users of the existing device names. Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 03 8月, 2011 1 次提交
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由 Jonathan Nieder 提交于
When loading aes via the module alias, a padlock module failing to load due to missing hardware is not particularly notable. With v2.6.27-rc1~1107^2~14 (crypto: padlock - Make module loading quieter when hardware isn't available, 2008-07-03), the padlock-aes module suppresses the relevant messages when the "quiet" flag is in use; but better to suppress this particular message completely, since the administrator can already distinguish such errors by the absence of a message indicating initialization failing or succeeding. This avoids occasional messages in syslog of the form padlock_aes: VIA PadLock not detected. Signed-off-by: NJonathan Nieder <jrnieder@gmail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 28 7月, 2011 1 次提交
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由 David S. Miller 提交于
A small modification was necessary since in the machine description for 'n2cp' and 'ncp' nodes, there no longer is an 'intr' property. That's OK because this property was always nothing more than an array of integers '1' ... 'nr_inos + 1' so we can just compute it in-place. Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 7月, 2011 1 次提交
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由 Al Viro 提交于
it will be replaced with S_IFREG anyway Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 15 7月, 2011 8 次提交
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由 Yuan Kang 提交于
caam now supports encrypt and decrypt for aes, des and 3des Signed-off-by: NYuan Kang <Yuan.Kang@freescale.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yuan Kang 提交于
Job descriptors only contain header and seq pointers. Other commands are stored in separate shared descriptors for encrypt, decrypt and givencrypt, stored as arrays in caam_ctx. This requires additional macros to create math commands to calculate assoclen and cryptlen. Signed-off-by: NYuan Kang <Yuan.Kang@freescale.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yuan Kang 提交于
caam_ctx.key_phys to key_dma caam_alg_template supports multiple algorithm types listed in union, which requires cases for different types in function caam_alg_alloc Signed-off-by: NYuan Kang <Yuan.Kang@freescale.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Yuan Kang 提交于
"aead_authenc" and "ipsec_esp" changed to "aead," except for function "ipsec_esp," which is changed to "init_aead_job." Variable name of aead_request structures changed to "req" and name of aead_givcrypt_request structure changed to "areq" Signed-off-by: NYuan Kang <Yuan.Kang@freescale.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
crypto/ablkcipher.c's setkey() has already checked against the min, max key sizes before it calls here, and all max_keysize assignments in the algorithm template array do not exceed TALITOS_MAX_KEY_SIZE. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
IRQ done notification is always set. Remove its explicit assignment from the hot path by including it in the descriptor header template assignment in talitos_cra_init. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
Assign single target channel per tfm in talitos_cra_init instead of performing channel scheduling dynamically during the encryption request. This changes the talitos_submit interface to accept a new channel number argument. Without this, rapid bursts of misc. sized requests could make it possible for IPsec packets to be encrypted out-of-order, which would result in packet drops due to sequence numbers falling outside the anti-reply window on a peer gateway. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 30 6月, 2011 9 次提交
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由 Josh Boyer 提交于
The Security function on the AMCC SoCs has multiple engines within a single MMIO range. The crypto driver currently enables the 3DES functionality by doing a blind write to the device control register. This can unintentionally disable other functions like the PKA or TRNG when the driver is loaded. Perform a read/modify/write to enable the 3DES function instead. Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
drivers/crypto/caam/ctrl.c: In function 'caam_probe': drivers/crypto/caam/ctrl.c:55:23: warning: unused variable 'perfmon' Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dmitry Kasatkin 提交于
Signed-off-by: NDmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dmitry Kasatkin 提交于
Signed-off-by: NDmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dmitry Kasatkin 提交于
Signed-off-by: NDmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dmitry Kasatkin 提交于
It could be a situation, that tasklet is executed twice because of certain delay between dma callback and irq handler execution. In that case, second tasklet execution could actually corrupt the data of the new started dma transactions. This patch improves tasklet logic and prevents above described cases. Signed-off-by: NDmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dmitry Kasatkin 提交于
Calling omap_sham_handle_queue from "done" tasklet should be done after irq scheduled tasklet completes. Having additional tasklet does not solve that issue because it might be execute before. So queue handling tasklet has been removed and functionality integrated into single tasklet. Signed-off-by: NDmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dmitry Kasatkin 提交于
Signed-off-by: NDmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dmitry Kasatkin 提交于
Couple of context flags have been moved to device flags. IRQ and tasklet handlers does not need to access request context anymore. Signed-off-by: NDmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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