- 06 10月, 2005 1 次提交
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由 Brett Russ 提交于
This should fix up lockups that people were seeing due to improper spinlock placement. Also, the start/stop DMA routines put guarded trust in the cached state of DMA. Signed-off-by: NBrett Russ <russb@emc.com> Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
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- 04 10月, 2005 1 次提交
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由 Brett Russ 提交于
This is my libata compatible low level driver for the Marvell SATA family. Currently it runs in DMA mode on a 6081 chip. The 5xxx series parts are not yet DMA capable in this driver because the registers have differences that haven't been accounted for yet. Basically, I'm focused on the 6xxx series right now. I apologize for those seeing problems on the 5xxx series, I've not had a chance to look at those problems yet. For those curious, the previous bug causing the SCSI timeout and subsequent panics was caused by an improper clear of hc_irq_cause in mv_host_intr(). This version is running well in my environment (6081 chips, with/without SW raid1) and is showing equal or better performance compared to the Marvell driver (mv_sata) in my initial tests (timed dd's of reads/writes to/from memory/disk). I still need to look at the causes of occasional problems such as this: ata11: translating stat 0x35 err 0x00 to sense ata11: status=0x35 { DeviceFault SeekComplete CorrectedError Error } SCSI error : <10 0 0 0> return code = 0x8000002 Current sda: sense key Hardware Error end_request: I/O error, dev sda, sector 3155010 and this, seen at init time: ATA: abnormal status 0x80 on port 0xE093911C but they aren't showstoppers. Signed-off-by: NBrett Russ <russb@emc.com> Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
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- 09 9月, 2005 1 次提交
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由 Jeff Garzik 提交于
* sata_mv: remove pci_intx(), now that the same function is in PCI core * sata_sis: fix variable initialization bug, trim trailing whitespace
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- 07 9月, 2005 2 次提交
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由 Jeff Garzik 提交于
This function will go away when pci_intx() finally makes it into the core PCI layer.
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由 Brett Russ 提交于
This is my libata compatible low level driver for the Marvell SATA family. Currently it successfully runs in PIO mode on a 6081 chip. EDMA support is in the works and should be done shortly. Review, testing (especially on other flavors of Marvell), comments welcome. Signed-off-by: NBrett Russ <russb@emc.com> Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
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