This follows the intc/clk changes and shuffles the PFC support code under
its own directory. This will facilitate better code sharing, and allow us
to trim down the exported interface by quite a margin.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The encoding is tightly packed, and future changes (such as
pinconf-generic support) can easily lead to a situation where we violate
the encoding constraints and trample data bit/reg bits. This plugs in
some sanity checks by way of a BUILD_BUG_ON() to blow up if we fail to
fit.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This implements some Kconfig knobs for ensuring that the PFC gpio chip
can be disabled or built as a module in the cases where it's optional, or
forcibly enabled in cases where it's not.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This implements a bit of rework for the PFC code, making the core itself
slightly more pluggable and moving out the gpio chip handling completely.

The API is preserved in such a way that platforms that depend on it for
early configuration are still able to do so, while making it possible to
migrate to alternate interfaces going forward.

This is the first step of chainsawing necessary to support the pinctrl
API, with the eventual goal being able to decouple pin function state
from the gpio API while retaining gpio chip tie-in for gpio pin functions
only, relying on the pinctrl/pinmux API for non-gpio function demux.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

At present reserving the IRLs in the IRQ bitmap in addition to the
dropping of the legacy IRQ pre-allocation prevent IRL IRQs from being
allocated for the x3proto board.

The only reason to permit reservations was to lock down possible hardware
vectors prior to dynamic IRQ scanning, but this doesn't matter much given
that the hardware controller configuration is sorted before we get around
to doing any dynamic IRQ allocation anyways. Beyond that, all of the
tables are __init annotated, so quite a bit more work would need to be
done to support reconfiguring things like IRL controllers on the fly,
much more than would ever make it worth the hassle.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This follows the MSTP clock change and implements variable access size
support for the rest of the CPG clocks, too. Upcoming SH-2A support has
need of this for 16-bit div4 clocks, while others will follow.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The bulk of the MSTP users require 32-bit access, but this isn't the case
for some of the SH-2A parts, so add in some basic infrastructure to let
the CPU define its required access size in preparation.
Requested-by: NPhil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

intc_ack_data is flagged as __init when it shouldn't be, causing section
mismatches in non-init paths like intc_set_ack_handle():

WARNING: drivers/built-in.o(.text+0x5d760):
Section mismatch in reference from the function
intc_set_ack_handle() to the function .init.text:intc_ack_data()
The function intc_set_ack_handle()
references the function __init intc_ack_data().
This is often because intc_set_ack_handle lacks a __init
annotation or the annotation of intc_ack_data is wrong.
Reported-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Convert the CPG code to use sh_clk_ops.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

SH intc has a compile time dependency on NR_IRQS. Make this dependency a
local define so that shmobile (and ARM in general) can have run-time
NR_IRQS setting.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

This ensures that the sense/prio lists are sorted at registration time,
enabling us to use a simple binary search for an optimized lookup
(something that had been on the TODO for some time).
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

intc_set_affinity() updates the cpumask in place, so there's no need for
the upper layer to do this itself.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This already gets handled via disable, as per the notes in linux/irq.h.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

It's possible to use IRQCHIP_SKIP_SET_WAKE to get the behaviour that
we're after, without having to bother with a dummy ->set_wake() callback
for the IRQ chip.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

No need to expose this globally since it's only used for core accounting.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Various problems will happen if clk parent was set up directly.
it should use clk_reparent()
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

When CONFIG_PM_RUNTIME is off, drivers/sh/pm_runtime.o still has to be
built on sh platforms, because then it provides means to statically
switch on device PM clocks.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

sh_clk_init_parent() are using clk->mapped_reg
which is mapped in clk_register()
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add PFC support for a 32-bit unlock register. Needed to
drive the r8a7779 PFC that comes with a funky PMMR register.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add support for variable config reg hardware by adding
the macro PINMUX_CFG_REG_VAR(). The width of each bitfield
needs to be passed to the macro, and the correct space must
be consumed by each bitfield in the enum table following the
macro. Data registers still need to have fixed bitfields.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add a helper function for shared config reg access
calculations. This allows us to reduce the amount
of duplicated code, and at the same time prepare
for a common place for future variable bitwidth
config reg support.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Update the way the PFC code is passing bitfield
selection between configure register functions.

Convert the code from using index only to bitfield
number and selected value. First step towards future
variable bitfield width support.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Introduce gpio_read_bit() for data register read access
and modify sh_gpio_get_value() to make use of the new
function instead of gpio_read_reg(). The purpose of
this change is to update the code to only use the
gpio_read_reg() function for config register access.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Since the SH7372's INTCS in included into syscore suspend/resume,
which causes the chip to be accessed when PM domains have been
turned off during system suspend, the A4R domain containing the
INTCS has to stay on during system sleep, which is suboptimal
from the power consumption point of view.

For this reason, add a new INTC flag, skip_syscore_suspend, to mark
the INTCS for intc_suspend() and intc_resume(), so that they don't
touch it.  This allows the A4R domain to be turned off during
system suspend and the INTCS state is resrored during system
resume by the A4R's "power on" code.
Suggested-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
Acked-by: NMagnus Damm <damm@opensource.se>

After all sysdev classes are ported to regular driver core entities, the
sysdev implementation will be entirely removed from the kernel.

Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: NKay Sievers <kay.sievers@vrfy.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Add support for non-entity mapped PFC registers through
the use of struct resource and ioremap()/iounmap().

The PFC main data structure gets updated with a pointer
to a struct resources array that point out all register
windows used by the PFC instance. The register definitions
are kept as physical addresses but the PFC code will do
transparent conversion into virtual addresses whenever
register windows are specified using with struct resource.

To introduce as little performance penalty as possible the
virtual address of each data register is cached in memory.
The virtual address of each configuration register is however
calculated during run time. This because the configuration
is considered slow path so focus is instead put on keeping
memory foot print as small as possible.

The PFC register access  code is in this patch updated from
__raw_readN() / __raw_writeN() into ioreadN() / iowriteN().

This patch is needed to support the PFC block in r8a7779.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Convert the CPG DIV6 helper code to use the new mapped_reg
together with ioread32() and iowrite32().
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Convert the CPG DIV4 helper code to use the new mapped_reg
together with ioread32() and iowrite32().
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Convert the CPG MSTP32 helper code to use the new mapped_reg
together with ioread32() and iowrite32().
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add a "mapped_reg" member to struct clk and use that
to keep the ioremapped register based on enable_reg.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Some clocks can select its parent clock by CPG register.
But it might have been modified by boot-loader or something.
This patch removed fixed initial parent clock,
and setup it from their current register settings.
It works on div6 reparent clocks for now.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This kills of the now unused runtime PM stub in favour of the generic
one.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Switch sh7723 to a runtime PM implementation, common with ARM-based
sh-mobile platforms.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Switch sh7722 to a runtime PM implementation, common with ARM-based
sh-mobile platforms.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Switch sh7724 to a runtime PM implementation, common with ARM-based
sh-mobile platforms.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Now that all of the named string association with clocks has been
migrated to clkdev lookups there's no meaningful named topology that can
be constructed for a debugfs tree view. Get rid of the left over bits,
and shrink struct clk a bit in the process.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The runtime PM platform support stub in use by ARM-based SH/R-Mobile
platforms contains nothing that's specifically ARM-related and instead of
wholly generic to anything using the clock framework.

The recent runtime PM changes interact rather badly with the lazy
disabling of clocks late in the boot process through the clock framework,
leading to situations where the runtime suspend/resume paths are entered
without a clock being actively driven due to having been lazily gated
off.

In order to correct this we can trivially tie in the aforementioned stub
as a general fallback for all SH platforms that don't presently have
their own runtime PM implementations (the corner case being SH-based
SH-Mobile platforms, which have their own stub through the hwblk API --
which in turn has bitrotted and will be subsequently adapted to use the
same stub as everyone else), regardless of whether the platforms choose
to define power domains of their own or not.

This fixes up regressions for clock framework users who also build in
runtime PM support without any specific power domains of their own, which
was previously causing the serial console to be lost when warring with
lazy clock disabling.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Enable IRQ_TYPE_EDGE_BOTH on all R/SH-Mobile ARM SoCs.
This hardware feature is supported by sh7367, sh7377,
sh7372 and sh73a0.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This provides a clk_rate_mult_range_round() helper for use by some of the
CPG PLL ranged multipliers, following the same approach as used by the
div ranges.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>