1. 13 9月, 2018 2 次提交
  2. 25 7月, 2018 1 次提交
  3. 05 7月, 2018 1 次提交
  4. 05 6月, 2018 1 次提交
  5. 26 4月, 2018 1 次提交
  6. 22 3月, 2018 1 次提交
  7. 20 3月, 2018 1 次提交
    • G
      net: phy: relax error checking when creating sysfs link netdev->phydev · 4414b3ed
      Grygorii Strashko 提交于
      Some ethernet drivers (like TI CPSW) may connect and manage >1 Net PHYs per
      one netdevice, as result such drivers will produce warning during system
      boot and fail to connect second phy to netdevice when PHYLIB framework
      will try to create sysfs link netdev->phydev for second PHY
      in phy_attach_direct(), because sysfs link with the same name has been
      created already for the first PHY. As result, second CPSW external
      port will became unusable.
      
      Fix it by relaxing error checking when PHYLIB framework is creating sysfs
      link netdev->phydev in phy_attach_direct(), suppressing warning by using
      sysfs_create_link_nowarn() and adding error message instead.
      After this change links (phy->netdev and netdev->phy) creation failure is not
      fatal any more and system can continue working, which fixes TI CPSW issue.
      
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Fixes: a3995460 ("net: phy: Relax error checking on sysfs_create_link()")
      Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4414b3ed
  8. 13 3月, 2018 1 次提交
  9. 28 2月, 2018 1 次提交
  10. 13 2月, 2018 1 次提交
  11. 17 1月, 2018 1 次提交
  12. 09 1月, 2018 1 次提交
  13. 04 1月, 2018 1 次提交
  14. 14 12月, 2017 2 次提交
    • R
      net: phy: fix resume handling · f5e64032
      Russell King 提交于
      When a PHY has the BMCR_PDOWN bit set, it may decide to ignore writes
      to other registers, or reset the registers to power-on defaults.
      Micrel PHYs do this for their interrupt registers.
      
      The current structure of phylib tries to enable interrupts before
      resuming (and releasing) the BMCR_PDOWN bit.  This fails, causing
      Micrel PHYs to stop working after a suspend/resume sequence if they
      are using interrupts.
      
      Fix this by ensuring that the PHY driver resume methods do not take
      the phydev->lock mutex themselves, but the callers of phy_resume()
      take that lock.  This then allows us to move the call to phy_resume()
      before we enable interrupts in phy_start().
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f5e64032
    • R
      phylib: add reset after clk enable support · a9668491
      Richard Leitner 提交于
      Some PHYs need the refclk to be a continuous clock. Therefore they don't
      allow turning it off and on again during operation. Nonetheless such a
      clock switching is performed by some ETH drivers (namely FEC [1]) for
      power saving reasons. An example for an affected PHY is the
      SMSC/Microchip LAN8720 in "REF_CLK In Mode".
      
      In order to provide a uniform method to overcome this problem this patch
      adds a new phy_driver flag (PHY_RST_AFTER_CLK_EN) and corresponding
      function phy_reset_after_clk_enable() to the phylib. These should be
      used to trigger reset of the PHY after the refclk is switched on again.
      
      [1] commit e8fcfcd5 ("net: fec: optimize the clock management to save power")
      Signed-off-by: NRichard Leitner <richard.leitner@skidata.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a9668491
  15. 06 12月, 2017 1 次提交
    • S
      phylib: Add device reset GPIO support · bafbdd52
      Sergei Shtylyov 提交于
      The PHY devices sometimes do have their reset signal (maybe even power
      supply?) tied to some GPIO and sometimes it also does happen that a boot
      loader does not leave it deasserted. So far this issue has been attacked
      from (as I believe) a wrong angle: by teaching the MAC driver to manipulate
      the GPIO in question; that solution, when applied to the device trees, led
      to adding the PHY reset GPIO properties to the MAC device node, with one
      exception: Cadence MACB driver which could handle the "reset-gpios" prop
      in a PHY device subnode. I believe that the correct approach is to teach
      the 'phylib' to get the MDIO device reset GPIO from the device tree node
      corresponding to this device -- which this patch is doing...
      
      Note that I had to modify the AT803x PHY driver as it would stop working
      otherwise -- it made use of the reset GPIO for its own purposes...
      Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
      Acked-by: NRob Herring <robh@kernel.org>
      [geert: Propagate actual errors from fwnode_get_named_gpiod()]
      [geert: Avoid destroying initial setup]
      [geert: Consolidate GPIO descriptor acquiring code]
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Tested-by: NRichard Leitner <richard.leitner@skidata.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      bafbdd52
  16. 02 12月, 2017 1 次提交
  17. 22 9月, 2017 1 次提交
  18. 06 9月, 2017 1 次提交
  19. 23 8月, 2017 1 次提交
    • F
      net: phy: Deal with unbound PHY driver in phy_attached_print() · fcd03e36
      Florian Fainelli 提交于
      Priit reported that stmmac was crashing with the trace below. This is because
      phy_attached_print() is called too early right after the PHY device has been
      found, but before it has a driver attached, since that is only done in
      phy_probe() which occurs later.
      
      Fix this by dealing with a possibly NULL phydev->drv point since that can
      happen here, but could also happen if we voluntarily did an unbind of the
      PHY device with the PHY driver.
      
      sun7i-dwmac 1c50000.ethernet: PTP uses main clock
      sun7i-dwmac 1c50000.ethernet: no reset control found
      sun7i-dwmac 1c50000.ethernet: no regulator found
      sun7i-dwmac 1c50000.ethernet: Ring mode enabled
      sun7i-dwmac 1c50000.ethernet: DMA HW capability register supported
      sun7i-dwmac 1c50000.ethernet: Normal descriptors
      libphy: stmmac: probed
      Unable to handle kernel NULL pointer dereference at virtual address 00000048
      pgd = c0004000
      [00000048] *pgd=00000000
      Internal error: Oops: 5 [#1] SMP ARM
      Modules linked in:
      CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.13.0-rc6-00318-g0065bd7fa384 #1
      Hardware name: Allwinner sun7i (A20) Family
      task: ee868000 task.stack: ee85c000
      PC is at phy_attached_print+0x1c/0x8c
      LR is at stmmac_mdio_register+0x12c/0x200
      pc : [<c04510ac>]    lr : [<c045e6b4>]    psr: 60000013
      sp : ee85ddc8  ip : 00000000  fp : c07dfb5c
      r10: ee981210  r9 : 00000001  r8 : eea73000
      r7 : eeaa6dd0  r6 : eeb49800  r5 : 00000000  r4 : 00000000
      r3 : 00000000  r2 : 00000000  r1 : 00000000  r0 : eeb49800
      Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
      Control: 10c5387d  Table: 4000406a  DAC: 00000051
      Process swapper/0 (pid: 1, stack limit = 0xee85c210)
      Stack: (0xee85ddc8 to 0xee85e000)
      ddc0:                   00000000 00000002 eeb49400 eea72000 00000000 eeb49400
      dde0: c045e6b4 00000000 ffffffff eeab0810 00000000 c08051f8 ee9292c0 c016d480
      de00: eea725c0 eea73000 eea72000 00000001 eea726c0 c0457d0c 00000040 00000020
      de20: 00000000 c045b850 00000001 00000000 ee981200 eeab0810 eeaa6ed0 ee981210
      de40: 00000000 c094a4a0 00000000 c0465180 eeaa7550 f08d0000 c9ffb90c 00000032
      de60: fffffffa 00000032 ee981210 ffffffed c0a46620 fffffdfb c0a46620 c03f7be8
      de80: ee981210 c0a9a388 00000000 00000000 c0a46620 c03f63e0 ee981210 c0a46620
      dea0: ee981244 00000000 00000007 000000c6 c094a4a0 c03f6534 00000000 c0a46620
      dec0: c03f6490 c03f49ec ee828a58 ee9217b4 c0a46620 eeaa4b00 c0a43230 c03f59fc
      dee0: c08051f8 c094a49c c0a46620 c0a46620 00000000 c091c668 c093783c c03f6dfc
      df00: ffffe000 00000000 c091c668 c010177c eefe0938 eefe0935 c085e200 000000c6
      df20: 00000005 c0136bc8 60000013 c080b3a4 00000006 00000006 c07ce7b4 00000000
      df40: c07d7ddc c07cef28 eefe0938 eefe093e c0a0b2f0 c0a641c0 c0a641c0 c0a641c0
      df60: c0937834 00000007 000000c6 c094a4a0 00000000 c0900d88 00000006 00000006
      df80: 00000000 c09005a8 00000000 c060ecf4 00000000 00000000 00000000 00000000
      dfa0: 00000000 c060ecfc 00000000 c0107738 00000000 00000000 00000000 00000000
      dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 ffdeffff ffffffff
      [<c04510ac>] (phy_attached_print) from [<c045e6b4>] (stmmac_mdio_register+0x12c/0x200)
      [<c045e6b4>] (stmmac_mdio_register) from [<c045b850>] (stmmac_dvr_probe+0x850/0x96c)
      [<c045b850>] (stmmac_dvr_probe) from [<c0465180>] (sun7i_gmac_probe+0x120/0x180)
      [<c0465180>] (sun7i_gmac_probe) from [<c03f7be8>] (platform_drv_probe+0x50/0xac)
      [<c03f7be8>] (platform_drv_probe) from [<c03f63e0>] (driver_probe_device+0x234/0x2e4)
      [<c03f63e0>] (driver_probe_device) from [<c03f6534>] (__driver_attach+0xa4/0xa8)
      [<c03f6534>] (__driver_attach) from [<c03f49ec>] (bus_for_each_dev+0x4c/0x9c)
      [<c03f49ec>] (bus_for_each_dev) from [<c03f59fc>] (bus_add_driver+0x190/0x214)
      [<c03f59fc>] (bus_add_driver) from [<c03f6dfc>] (driver_register+0x78/0xf4)
      [<c03f6dfc>] (driver_register) from [<c010177c>] (do_one_initcall+0x44/0x168)
      [<c010177c>] (do_one_initcall) from [<c0900d88>] (kernel_init_freeable+0x144/0x1d0)
      [<c0900d88>] (kernel_init_freeable) from [<c060ecfc>] (kernel_init+0x8/0x110)
      [<c060ecfc>] (kernel_init) from [<c0107738>] (ret_from_fork+0x14/0x3c)
      Code: e59021c8 e59d401c e590302c e3540000 (e5922048)
      ---[ end trace 39ae87c7923562d0 ]---
      Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
      Tested-By: NPriit Laes <plaes@plaes.org>
      Fixes: fbca1647 ("net: stmmac: Use the right logging function in stmmac_mdio_register")
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      fcd03e36
  20. 07 8月, 2017 2 次提交
    • R
      phylink: add phylink infrastructure · 9525ae83
      Russell King 提交于
      The link between the ethernet MAC and its PHY has become more complex
      as the interface evolves.  This is especially true with serdes links,
      where the part of the PHY is effectively integrated into the MAC.
      
      Serdes links can be connected to a variety of devices, including SFF
      modules soldered down onto the board with the MAC, a SFP cage with
      a hotpluggable SFP module which may contain a PHY or directly modulate
      the serdes signals onto optical media with or without a PHY, or even
      a classical PHY connection.
      
      Moreover, the negotiation information on serdes links comes in two
      varieties - SGMII mode, where the PHY provides its speed/duplex/flow
      control information to the MAC, and 1000base-X mode where both ends
      exchange their abilities and each resolve the link capabilities.
      
      This means we need a more flexible means to support these arrangements,
      particularly with the hotpluggable nature of SFP, where the PHY can
      be attached or detached after the network device has been brought up.
      
      Ethtool information can come from multiple sources:
      - we may have a PHY operating in either SGMII or 1000base-X mode, in
        which case we take ethtool/mii data directly from the PHY.
      - we may have a optical SFP module without a PHY, with the MAC
        operating in 1000base-X mode - the ethtool/mii data needs to come
        from the MAC.
      - we may have a copper SFP module with a PHY whic can't be accessed,
        which means we need to take ethtool/mii data from the MAC.
      
      Phylink aims to solve this by providing an intermediary between the
      MAC and PHY, providing a safe way for PHYs to be hotplugged, and
      allowing a SFP driver to reconfigure the serdes connection.
      
      Phylink also takes over support of fixed link connections, where the
      speed/duplex/flow control are fixed, but link status may be controlled
      by a GPIO signal.  By avoiding the fixed-phy implementation, phylink
      can provide a faster response to link events: fixed-phy has to wait for
      phylib to operate its state machine, which can take several seconds.
      In comparison, phylink takes milliseconds.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      
      - remove sync status
      - rework supported and advertisment handling
      - add 1000base-x speed for fixed links
      - use functionality exported from phy-core, reworking
        __phylink_ethtool_ksettings_set for it
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      9525ae83
    • R
      net: phy: provide a hook for link up/link down events · a81497be
      Russell King 提交于
      Sometimes, we need to do additional work between the PHY coming up and
      marking the carrier present - for example, we may need to wait for the
      PHY to MAC link to finish negotiation.  This changes phylib to provide
      a notification function pointer which avoids the built-in
      netif_carrier_on() and netif_carrier_off() functions.
      
      Standard ->adjust_link functionality is provided by hooking a helper
      into the new ->phy_link_change method.
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a81497be
  21. 03 7月, 2017 1 次提交
  22. 07 6月, 2017 2 次提交
  23. 28 5月, 2017 1 次提交
  24. 27 5月, 2017 1 次提交
    • F
      net: phy: Create sysfs reciprocal links for attached_dev/phydev · 5568363f
      Florian Fainelli 提交于
      There is currently no way for a program scanning /sys to know whether a
      network device is attached to a particular PHY device, just like the PHY
      device is not pointed back to its attached network device.
      
      Create a symbolic link in the network device's namespace named "phydev"
      which points to the PHY device and create a symbolic link in the PHY
      device's namespace named "attached_dev" that points back to the network
      device. These links are set up during phy_attach_direct() and removed
      during phy_detach() for symetry.
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5568363f
  25. 26 5月, 2017 1 次提交
  26. 23 3月, 2017 1 次提交
  27. 06 3月, 2017 1 次提交
  28. 20 2月, 2017 2 次提交
  29. 10 2月, 2017 1 次提交
    • F
      net: phy: Fix PHY module checks and NULL deref in phy_attach_direct() · 6d9f66ac
      Florian Fainelli 提交于
      The Generic PHY drivers gets assigned after we checked that the current
      PHY driver is NULL, so we need to check a few things before we can
      safely dereference d->driver. This would be causing a NULL deference to
      occur when a system binds to the Generic PHY driver. Update
      phy_attach_direct() to do the following:
      
      - grab the driver module reference after we have assigned the Generic
        PHY drivers accordingly, and remember we came from the generic PHY
        path
      
      - update the error path to clean up the module reference in case the
        Generic PHY probe function fails
      
      - split the error path involving phy_detacht() to avoid double free/put
        since phy_detach() does all the clean up
      
      - finally, have phy_detach() drop the module reference count before we
        call device_release_driver() for the Generic PHY driver case
      
      Fixes: cafe8df8 ("net: phy: Fix lack of reference count on PHY driver")
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      6d9f66ac
  30. 03 2月, 2017 1 次提交
    • M
      net: phy: Fix lack of reference count on PHY driver · cafe8df8
      Mao Wenan 提交于
      There is currently no reference count being held on the PHY driver,
      which makes it possible to remove the PHY driver module while the PHY
      state machine is running and polling the PHY. This could cause crashes
      similar to this one to show up:
      
      [   43.361162] BUG: unable to handle kernel NULL pointer dereference at 0000000000000140
      [   43.361162] IP: phy_state_machine+0x32/0x490
      [   43.361162] PGD 59dc067
      [   43.361162] PUD 0
      [   43.361162]
      [   43.361162] Oops: 0000 [#1] SMP
      [   43.361162] Modules linked in: dsa_loop [last unloaded: broadcom]
      [   43.361162] CPU: 0 PID: 1299 Comm: kworker/0:3 Not tainted 4.10.0-rc5+ #415
      [   43.361162] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996),
      BIOS Ubuntu-1.8.2-1ubuntu2 04/01/2014
      [   43.361162] Workqueue: events_power_efficient phy_state_machine
      [   43.361162] task: ffff880006782b80 task.stack: ffffc90000184000
      [   43.361162] RIP: 0010:phy_state_machine+0x32/0x490
      [   43.361162] RSP: 0018:ffffc90000187e18 EFLAGS: 00000246
      [   43.361162] RAX: 0000000000000000 RBX: ffff8800059e53c0 RCX:
      ffff880006a15c60
      [   43.361162] RDX: ffff880006782b80 RSI: 0000000000000000 RDI:
      ffff8800059e5428
      [   43.361162] RBP: ffffc90000187e48 R08: ffff880006a15c40 R09:
      0000000000000000
      [   43.361162] R10: 0000000000000000 R11: 0000000000000000 R12:
      ffff8800059e5428
      [   43.361162] R13: ffff8800059e5000 R14: 0000000000000000 R15:
      ffff880006a15c40
      [   43.361162] FS:  0000000000000000(0000) GS:ffff880006a00000(0000)
      knlGS:0000000000000000
      [   43.361162] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      [   43.361162] CR2: 0000000000000140 CR3: 0000000005979000 CR4:
      00000000000006f0
      [   43.361162] Call Trace:
      [   43.361162]  process_one_work+0x1b4/0x3e0
      [   43.361162]  worker_thread+0x43/0x4d0
      [   43.361162]  ? __schedule+0x17f/0x4e0
      [   43.361162]  kthread+0xf7/0x130
      [   43.361162]  ? process_one_work+0x3e0/0x3e0
      [   43.361162]  ? kthread_create_on_node+0x40/0x40
      [   43.361162]  ret_from_fork+0x29/0x40
      [   43.361162] Code: 56 41 55 41 54 4c 8d 67 68 53 4c 8d af 40 fc ff ff
      48 89 fb 4c 89 e7 48 83 ec 08 e8 c9 9d 27 00 48 8b 83 60 ff ff ff 44 8b
      73 98 <48> 8b 90 40 01 00 00 44 89 f0 48 85 d2 74 08 4c 89 ef ff d2 8b
      
      Keep references on the PHY driver module right before we are going to
      utilize it in phy_attach_direct(), and conversely when we don't use it
      anymore in phy_detach().
      Signed-off-by: NMao Wenan <maowenan@huawei.com>
      [florian: rebase, rework commit message]
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cafe8df8
  31. 21 12月, 2016 2 次提交
  32. 11 12月, 2016 1 次提交
    • T
      net: phy: phy drivers should not set SUPPORTED_[Asym_]Pause · 529ed127
      Timur Tabi 提交于
      Instead of having individual PHY drivers set the SUPPORTED_Pause and
      SUPPORTED_Asym_Pause flags, phylib itself should set those flags,
      unless there is a hardware erratum or other special case.  During
      autonegotiation, the PHYs will determine whether to enable pause
      frame support.
      
      Pause frames are a feature that is supported by the MAC.  It is the MAC
      that generates the frames and that processes them.  The PHY can only be
      configured to allow them to pass through.
      
      This commit also effectively reverts the recently applied c7a61319
      ("net: phy: dp83848: Support ethernet pause frames").
      
      So the new process is:
      
      1) Unless the PHY driver overrides it, phylib sets the SUPPORTED_Pause
      and SUPPORTED_AsymPause bits in phydev->supported.  This indicates that
      the PHY supports pause frames.
      
      2) The MAC driver checks phydev->supported before it calls phy_start().
      If (SUPPORTED_Pause | SUPPORTED_AsymPause) is set, then the MAC driver
      sets those bits in phydev->advertising, if it wants to enable pause
      frame support.
      
      3) When the link state changes, the MAC driver checks phydev->pause and
      phydev->asym_pause,  If the bits are set, then it enables the corresponding
      features in the MAC.  The algorithm is:
      
      	if (phydev->pause)
      		The MAC should be programmed to receive and honor
                      pause frames it receives, i.e. enable receive flow control.
      
      	if (phydev->pause != phydev->asym_pause)
      		The MAC should be programmed to transmit pause
      		frames when needed, i.e. enable transmit flow control.
      Signed-off-by: NTimur Tabi <timur@codeaurora.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      529ed127
  33. 09 12月, 2016 1 次提交
    • W
      phy: add phy fixup unregister functions · f38e7a32
      Woojung.Huh@microchip.com 提交于
      >From : Woojung Huh <woojung.huh@microchip.com>
      
      Add functions to unregister phy fixup for modules.
      
      int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask)
      	Unregister phy fixup from phy_fixup_list per bus_id, phy_uid &
      	phy_uid_mask
      
      int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask)
      	Unregister phy fixup from phy_fixup_list.
      	Use it for fixup registered by phy_register_fixup_for_uid()
      
      int phy_unregister_fixup_for_id(const char *bus_id)
      	Unregister phy fixup from phy_fixup_list.
      	Use it for fixup registered by phy_register_fixup_for_id()
      Signed-off-by: NWoojung Huh <woojung.huh@microchip.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f38e7a32
  34. 08 12月, 2016 1 次提交