1. 02 10月, 2021 1 次提交
  2. 24 8月, 2021 1 次提交
  3. 19 8月, 2021 2 次提交
  4. 28 7月, 2021 1 次提交
    • A
      dev_ioctl: split out ndo_eth_ioctl · a7605370
      Arnd Bergmann 提交于
      Most users of ndo_do_ioctl are ethernet drivers that implement
      the MII commands SIOCGMIIPHY/SIOCGMIIREG/SIOCSMIIREG, or hardware
      timestamping with SIOCSHWTSTAMP/SIOCGHWTSTAMP.
      
      Separate these from the few drivers that use ndo_do_ioctl to
      implement SIOCBOND, SIOCBR and SIOCWANDEV commands.
      
      This is a purely cosmetic change intended to help readers find
      their way through the implementation.
      
      Cc: Doug Ledford <dledford@redhat.com>
      Cc: Jason Gunthorpe <jgg@ziepe.ca>
      Cc: Jay Vosburgh <j.vosburgh@gmail.com>
      Cc: Veaceslav Falico <vfalico@gmail.com>
      Cc: Andy Gospodarek <andy@greyhouse.net>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Vivien Didelot <vivien.didelot@gmail.com>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: Vladimir Oltean <olteanv@gmail.com>
      Cc: Leon Romanovsky <leon@kernel.org>
      Cc: linux-rdma@vger.kernel.org
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NJason Gunthorpe <jgg@nvidia.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a7605370
  5. 15 7月, 2021 2 次提交
  6. 18 6月, 2021 1 次提交
  7. 17 6月, 2021 1 次提交
  8. 02 6月, 2021 2 次提交
  9. 25 5月, 2021 1 次提交
  10. 26 4月, 2021 1 次提交
  11. 24 4月, 2021 2 次提交
  12. 23 4月, 2021 1 次提交
  13. 17 4月, 2021 6 次提交
  14. 20 3月, 2021 1 次提交
  15. 04 3月, 2021 1 次提交
    • H
      Revert "r8152: adjust the settings about MAC clock speed down for RTL8153" · 4b5dc1a9
      Hayes Wang 提交于
      This reverts commit 134f98bc.
      
      The r8153_mac_clk_spd() is used for RTL8153A only, because the register
      table of RTL8153B is different from RTL8153A. However, this function would
      be called when RTL8153B calls r8153_first_init() and r8153_enter_oob().
      That causes RTL8153B becomes unstable when suspending and resuming. The
      worst case may let the device stop working.
      
      Besides, revert this commit to disable MAC clock speed down for RTL8153A.
      It would avoid the known issue when enabling U1. The data of the first
      control transfer may be wrong when exiting U1.
      Signed-off-by: NHayes Wang <hayeswang@realtek.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4b5dc1a9
  16. 24 2月, 2021 4 次提交
  17. 05 2月, 2021 2 次提交
  18. 03 2月, 2021 1 次提交
  19. 13 1月, 2021 1 次提交
  20. 06 11月, 2020 1 次提交
  21. 04 11月, 2020 2 次提交
  22. 24 8月, 2020 1 次提交
  23. 08 8月, 2020 1 次提交
  24. 20 5月, 2020 1 次提交
  25. 15 5月, 2020 1 次提交
  26. 07 3月, 2020 1 次提交