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  1. 16 7月, 2019 1 次提交
  3. 02 7月, 2019 4 次提交
    • K
      ARM: dts: exynos: Adjust buck[78] regulators to supported values on Arndale Octa · 841ed602
      由 Krzysztof Kozlowski 提交于 
      The datasheet of S2MPS11 PMIC is slightly non-consistent in buck[78]
voltage regulators values.

1. The voltage tables for configuring their registers mention range of
   voltages: 0.750 V to 3.55 V,
2. The constrains in electrical specifications say output voltage range
   to be different (buck7: 1.2 V to 1.5 V, buck8: 1.8 V to 2.1 V).

Adjust the ranges to match the electrical specifications to stay on the
safe side.  Anyway these regulators stay at default value so this should
not have effect.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
      841ed602
    • K
      ARM: dts: exynos: Adjust buck[78] regulators to supported values on Odroid XU3 family · a19a209e
      由 Krzysztof Kozlowski 提交于 
      The datasheet of S2MPS11 PMIC is slightly non-consistent in buck[78]
voltage regulators values.

1. The voltage tables for configuring their registers mention range of
   voltages: 0.750 V to 3.55 V,
2. The constrains in electrical specifications say output voltage range
   to be different (buck7: 1.2 V to 1.5 V, buck8: 1.8 V to 2.1 V).

Adjust the ranges to match the electrical specifications to stay on the
safe side.  Also change the name of regulators to match reality.  Anyway
these regulators stay at default value so this should not have effect.
Reported-by: NAnand Moon <linux.amoon@gmail.com>
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
      a19a209e
    • M
      ARM: dts: exynos: Move Mali400 GPU node to "/soc" · 8386e6a7
      由 Marek Szyprowski 提交于 
      Mali400 GPU hardware module is a standard hardware module integrated to
Exynos3210/4210/4412 SoCs, so it should reside under the "/soc" node.
The only SoC components which are placed in the DT root, are those, which
are a part of CPUs: like ARM architected timers and ARM performance
measurement units.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
      8386e6a7
    • M
      ARM: dts: exynos: Fix imprecise abort on Mali GPU probe on Exynos4210 · 47f28b41
      由 Marek Szyprowski 提交于 
      The PMU module of Mali400 GPU is optional and it looks that it is not
present on Exynos4210, because any access to its registers causes external
abort. This patch removes "pmu" interrupt for Exynos4210 SoCs, so the
driver will skip the PMU module. This fixes following fault during kernel
boot:

    Unhandled fault: imprecise external abort (0x1406) at 0x00000000
    (lima_pmu_init) from [<c059e6f8>] (lima_device_init+0x244/0x5a0)
    (lima_device_init) from [<c059e40c>] (lima_pdev_probe+0x7c/0xd8)
    (lima_pdev_probe) from [<c05afcb8>] (platform_drv_probe+0x48/0x9c)
    (platform_drv_probe) from [<c05ad594>] (really_probe+0x1c4/0x400)
    (really_probe) from [<c05ad988>] (driver_probe_device+0x78/0x1b8)
    (driver_probe_device) from [<c05add30>] (device_driver_attach+0x58/0x60)
    (device_driver_attach) from [<c05ade34>] (__driver_attach+0xfc/0x160)
    (__driver_attach) from [<c05ab650>] (bus_for_each_dev+0x68/0xb4)
    (bus_for_each_dev) from [<c05ac734>] (bus_add_driver+0x104/0x20c)
    (bus_add_driver) from [<c05aece0>] (driver_register+0x78/0x10c)
    (driver_register) from [<c0103214>] (do_one_initcall+0x8c/0x430)
    (do_one_initcall) from [<c0f01328>] (kernel_init_freeable+0x3c8/0x4d0)
    (kernel_init_freeable) from [<c0ac3aa0>] (kernel_init+0x8/0x10c)
    (kernel_init) from [<c01010b4>] (ret_from_fork+0x14/0x20)

The PMU module seems to work fine on Exynos4412 SoCs, so the patch also
moves the interrupt definitions to exynos4210.dtsi and exynos4412.dtsi
respectively, to keep only the common part in exynos4.dtsi.

Fixes: 13efd80a ("ARM: dts: exynos: Add GPU/Mali 400 node to Exynos4")
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
      47f28b41
  5. 27 6月, 2019 5 次提交
  7. 26 6月, 2019 1 次提交
  9. 25 6月, 2019 7 次提交
    • M
      ARM: dts: uniphier: update to new Denali NAND binding · bc8841f0
      由 Masahiro Yamada 提交于 
      With commit d8e8fd0e ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.

Update DT for it.

In the new binding, the number of connected chips are described in
DT instead of run-time probed.

I added just one chip to the reference boards, where we do not know
if the on-board NAND device is a single chip or multiple chips.
If we added too many chips into DT, it would end up with the timeout
error in nand_scan_ident().

I changed all the pinctrl properties to use the single CS.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      bc8841f0
    • K
      ARM: dts: exynos: Add GPU/Mali 400 node to Exynos4 · 13efd80a
      由 Krzysztof Kozlowski 提交于 
      Add nodes for GPU (Mali 400) to Exynos4210 and Exynos4412.  Describe the
GPU as much as possible however still few elements are missing:
1. Exynos4210 bus clock is not described in hardware manual therefore
   the IP gate clock was provided,
2. Exynos4412: Not sure what to do with CLK_G3D clock responsible for
   gating entire IP block (it is now being disabled as unused),
3. Regulator supplies on Trats board.

Limited testing on Odroid U3 (Exynos4412).
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
      13efd80a
    • K
      ARM: dts: exynos: Add GPU/Mali 400 node to Exynos3250 · 4a7bc07f
      由 Krzysztof Kozlowski 提交于 
      Add nodes for GPU (Mali 400) to Exynos3250.  This is still limited and
not tested:
1. No dynamic voltage and frequency scaling,
2. Not sure what to do with CLK_G3D clock responsible for gating entire
   IP block (it is now being disabled as unused).
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
      4a7bc07f
    • K
      ARM: dts: exynos: Use proper regulator for eMMC memory on Arndale Octa · 74b94e6b
      由 Krzysztof Kozlowski 提交于 
      The eMMC memory is supplied by LDO18 (PVDD_EMMC_1V8) and buck10
(PVDD_EMMCF_2V8), not by LDO10. The LDO10 (PVDD_PRE_1V8) supplies
instead VDDP_MMC pin of eMMC host interface and it is already marked as
always on.

This change only properly models the hardware and reflects in usage of
regulators.  There is no functional change because:
1. LDO18 cannot be turned off (e.g. by lack of consumers) because in
   off mode it is controlled by LDO18EN pin, which is pulled up by
   always-on regulator LDO2 (PVDD_APIO_1V8).
2. LDO10 is marked as always on so removing its consumer will not have
   effect.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
      74b94e6b
    • K
      ARM: dts: exynos: Add regulator suspend configuration to Odroid XU3/XU4/HC1 family · 3e7f0576
      由 Krzysztof Kozlowski 提交于 
      Add the PMIC regulator suspend configuration to entire Odroid
XU3/XU4/HC1 family of boards to reduce power usage during suspend.  The
configuration is based on vendor (Hardkernel) reference kernel with
additional buck9 suspend configuration (for USB hub suspend and proper
reset).

Energy consumption measurements from Marek Szyprowski during suspend to
RAM:
 - all at 5 V power supply,
 - before: next-20190620,
 - after: next-20190620 + this patch + suspend configuration for s2mps11
          regulator driver,

Board              | before [mA] | after [mA] |
Odroid HC1         |         120 |       7-10 |
Odroid XU4, sdcard |          88 |        6-9 |
Odroid XU4, eMMC   |         100 |        6-9 |
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Tested-by: NAnand Moon <linux.amoon@gmail.com>
      3e7f0576
    • K
      ARM: dts: exynos: Add regulator suspend configuration to Arndale Octa board · 1f513ee3
      由 Krzysztof Kozlowski 提交于 
      Add the PMIC regulator suspend configuration to Arndale Octa board to
reduce power usage during suspend and keep necessary regulators on.  The
configuration is based on vendor (Insignal) reference kernel and the
board datasheet.  Comparing to vendor kernel, additionally turn off in
suspend all regulators controlled by external pin (LDO3, LDO7, LDO18 and
buck10).

This is purely for hardware description because board does not support
Suspend to RAM and the S2MPS11 driver does not support
"regulator-on-in-suspend" property.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
      1f513ee3
    • K
      ARM: dts: exynos: Disable unused buck10 regulator on Odroid HC1 board · d0b737f9
      由 Krzysztof Kozlowski 提交于 
      The eMMC memory on Odroid XU3/XU4 boards is supplied by two regulators
LDO18 and buck10 (and LDO13 for the host interface).

However the Odroid HC1 board does not have eMMC connector so this
regulator does not have to be always on.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
      d0b737f9
  11. 24 6月, 2019 10 次提交
  13. 23 6月, 2019 8 次提交
  15. 22 6月, 2019 1 次提交
  17. 21 6月, 2019 3 次提交