1. 18 11月, 2014 1 次提交
  2. 28 10月, 2014 1 次提交
  3. 13 8月, 2014 1 次提交
  4. 20 6月, 2014 1 次提交
  5. 23 5月, 2014 1 次提交
  6. 14 5月, 2014 1 次提交
  7. 25 4月, 2014 1 次提交
  8. 18 3月, 2014 1 次提交
  9. 09 1月, 2014 1 次提交
  10. 03 12月, 2013 2 次提交
  11. 12 11月, 2013 1 次提交
    • S
      ath9k: Use correct PCIE initvals for AR9485 · 2d22c7dd
      Sujith Manoharan 提交于
      Currently, the PLL is turned off for AR9485 when
      switching to a low power state, but AR9485 has an issue
      where the card will become unresponsive if left idle
      for a long time without any traffic. To fix this,
      force the PLL to always be on using a different initval
      array, ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1.
      
      This is done for most of the AR9485 based cards
      like HB125, WB225 etc. but certain models require the
      feature to be turned off. Identify such cards and use
      default values for them.
      Signed-off-by: NSujith Manoharan <c_manoha@qca.qualcomm.com>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      2d22c7dd
  12. 27 9月, 2013 4 次提交
  13. 27 8月, 2013 2 次提交
  14. 23 8月, 2013 1 次提交
  15. 06 8月, 2013 2 次提交
  16. 25 6月, 2013 1 次提交
  17. 19 6月, 2013 2 次提交
  18. 15 6月, 2013 1 次提交
  19. 08 1月, 2013 1 次提交
  20. 08 12月, 2012 1 次提交
    • B
      ath9k: Use standard #defines for PCIe Capability ASPM fields · a875621e
      Bjorn Helgaas 提交于
      Use the standard #defines for PCIe Capability ASPM fields.
      
      Previously we used PCIE_LINK_STATE_L0S and PCIE_LINK_STATE_L1 directly, but
      these are defined for the Linux ASPM interfaces, e.g.,
      pci_disable_link_state(), and only coincidentally match the actual register
      bits.  PCIE_LINK_STATE_CLKPM, also part of that interface, does not match
      the register bit.
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      a875621e
  21. 01 12月, 2012 1 次提交
  22. 17 11月, 2012 1 次提交
  23. 06 10月, 2012 2 次提交
  24. 26 9月, 2012 1 次提交
  25. 12 9月, 2012 1 次提交
  26. 24 8月, 2012 1 次提交
  27. 11 8月, 2012 1 次提交
  28. 03 8月, 2012 1 次提交
  29. 13 7月, 2012 1 次提交
  30. 07 6月, 2012 2 次提交
  31. 11 4月, 2012 1 次提交