Pad retention should be controlled from pin control driver, so remove it
from Exynos LPASS driver. After this change, no more access to PMU regmap
is needed, so remove also the code for handling PMU regmap.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Acked-by: NKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: NRob Herring <robh@kernel.org>
Acked-for-MFD-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The X-Powers AXP20X and AXP22X PMICs have multiple ADCs. They expose the
battery voltage, battery charge and discharge currents, AC-in and VBUS
voltages and currents, 2 GPIOs muxable in ADC mode and PMIC temperature.

This adds support for most of AXP20X and AXP22X ADCs.
Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Reviewed-by: NJonathan Cameron <jic23@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The cpcap INTS registers are for getting the value of the line,
not for configuring the type.

Fixes: 56e1d40d ("mfd: cpcap: Add minimal support")
Reviewed-By: NSebastian Reichel <sre@kernel.org>
Tested-by: NSebastian Reichel <sre@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

We should use ack_invert as the int_read_and_clear() in the Motorola
kernel tree does "ireg_val & ~mreg_val" before writing to the mask
register.

Fixes: 56e1d40d ("mfd: cpcap: Add minimal support")
Tested-by: NSebastian Reichel <sre@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

I made a mistake assuming the device tree configuration for interrupt
triggering was somehow passed to the SPI device but it's not.

In the Motorola Linux kernel tree CPCAP PMIC is configured as a rising
edge triggered interrupt, but then then it's interrupt handler keeps
looping until the GPIO line goes down. So the CPCAP interrupt is clearly
a level interrupt and not an edge interrupt.

Earlier when I tried to configure it as level interrupt using the
device tree, I did not account that the triggering only gets passed
to the SPI core and it also needs to be specified in the CPCAP driver
when we do devm_regmap_add_irq_chip().

Fixes: 56e1d40d ("mfd: cpcap: Add minimal support")
Signed-off-by: NTony Lindgren <tony@atomide.com>
Acked-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This patch removes the sun4i touchscreen controller binding
documentation since it has been merged with the sun4i GPADC binding
documentation.
Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This patch adds documentation for the A33 GPADC binding.
Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The X-Powers AXP20X and AXP22X PMICs can have a battery as power supply.

This patch adds the AXP20X/AXP22X battery driver to the MFD cells of the
AXP209, AXP221 and AXP223 MFD.
Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

MFD support for DA9061 is provided as part of the DA9062 device driver.

The registers header file adds two new chip variant IDs defined in DA9061
and DA9062 hardware. The core header file adds new software enumerations
for listing the valid DA9061 IRQs and a da9062_compatible_types enumeration
for distinguishing between DA9061/62 devices in software.

The core source code adds a new .compatible of_device_id entry. This is
extended from DA9062 to support both "dlg,da9061" and "dlg,da9062". The
.data entry now holds a reference to the enumerated device type.

A new regmap_irq_chip model is added for DA9061 and this supports the new
list of regmap_irq entries. A new mfd_cell da9061_devs[] array lists the
new sub system components for DA9061. Support is added for a new DA9061
regmap_config which lists the correct readable, writable and volatile
ranges for this chip.

The probe function uses the device tree compatible string to switch on the
da9062_compatible_types and configure the correct mfd cells, irq chip and
regmap config.

Kconfig is updated to reflect support for DA9061 and DA9062 PMICs.
Signed-off-by: NSteve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Extend existing DA9062 binding information to include the DA9061 PMIC for
MFD core and regulators.

Add a da9062-onkey link to the existing onkey binding file.

Add a da9062-thermal link to the new temperature monitoring binding file.

Delete the da9062-watchdog section and replace it with a link to the new
DA9061/62 binding information file.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NSteve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

GPIO bits clearing on pins assigned to STMPE1600
had no effects due to missing "clear registers"
settings within stmpe1600_regs[].
STMPE1600 does not have dedicated "clear registers",
but single "set/clear registers", hence stmpe1600_regs[]
"clear registers" (STMPE_IDX_GPCR_XXX) must be set to
same value as "set registers" (STMPE_IDX_GPSR_XXX), ie
STMPE1600_REG_GPSR_XXX.
Signed-off-by: NHugues Fruchet <hugues.fruchet@st.com>
Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

In the following code block, BXTWC_DEVICE1_ADDR value is
already fixed and hence there no need to check for
if (!i2c_addr) in every ipc read/write calls. Even if this
check is required it can be moved to probe function.

i2c_addr = BXTWC_DEVICE1_ADDR;
if (!i2c_addr) {
	dev_err(pmic->dev, "I2C address not set\n");
	return -EINVAL;
}

This patch remove this extra check and adds some NULL
parameter checks.
Signed-off-by: NKuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Add a ->resume() hook to make sure the EBI dev configs are correctly
restored when resuming the platform.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

ebid->numcs is never assigned, set it to numcs after allocating the
EBI dev object.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The EBI block is not only available on at91 SoCs, but also on avr32 ones.
Change the structure and function prefixes from at91_ebi to atmel_ebi to
match this fact and make the prefix and driver name consistent.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

All macros prefixed with AT91[SAM9]_SMC have been replaced by equivalent
definitions prefixed with ATMEL_SMC, and the at91sam9_smc_xxxx() helpers
are no longer used.
Drop these definitions before someone starts using them again.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Turn the ->ebi_csa reg field into a simple offset that can be used with
with the matrix regmap. Using reg fields was overkill for this use case.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

New helpers/macros have been to atmel-smc.h introduced to simplify SMC
regs manipulation. Rework the code to use those helpers, and simplify
the ->xlate_config(), ->get_config() and ->apply_config() implementations.

SMC configs are now stored in a struct atmel_smc_cs_conf object that
directly contains registers values, which should help implementing
->suspend()/->resume() hooks.

We can also get rid of those regmap fields (and the associated ->init()
hook) which are not longer needed thanks to the
atmel_[h]smc_cs_conf_{apply,get}() helpers.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

These new helpers + macro definitions are meant to replace the old ones
which are unpractical to use.

Note that the macros and function prefixes have been intentionally
changed to ATMEL_[H]SMC_XX and atmel_[h]smc_ to reflect the fact that
this IP is also embedded in avr32 SoCs (and not only in at91 ones).
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

devm_ioremap_resource does checks on the resource. No need to
duplicate this in the driver.
Signed-off-by: NBelén Sarabia <belensarabia@gmail.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

POWERHOLD signal has higher priority  over the DEV_ON bit.
So power off will not happen if the POWERHOLD is held high.
Hence reset the MUX to GPIO_7 mode to release the POWERHOLD
and the DEV_ON bit to take effect to power off the PMIC.

PMIC Power off happens in dire situations like thermal shutdown
so irrespective of the POWERHOLD setting go ahead and turn off
the powerhold.  Currently poweroff is broken on boards that have
powerhold enabled. This fixes poweroff on those boards.
Signed-off-by: NKeerthy <j-keerthy@ti.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The tc6393xb mfd driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.
Signed-off-by: NJulia Cartwright <julia@ni.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The t7l66xb mfd driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.
Signed-off-by: NJulia Cartwright <julia@ni.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The asic3 mfd driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.
Signed-off-by: NJulia Cartwright <julia@ni.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

For better understanding of relationship between headers and modules
rename:
	intel_bxtwc.h -> intel_soc_pmic_bxtwc.h

While here, remove file name from the file itself.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

There is no need to include intel_soc_pmic.h into header which doesn't
require it.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Currently, we specify the timeout in terms of the number of polls but it
is more clear from a user of the functions perspective to specify the
timeout directly in milliseconds, as such update the function to these new
semantics.

Additionally, arizona_poll_reg essentially hard-codes
regmap_read_poll_timeout, update the implementation to use
regmap_read_poll_timeout. We still keep arizona_poll_reg around as
regmap_read_poll_timeout is a macro so rather than expand this for each
caller keep it wrapped in arizona_poll_reg.

Whilst we are doing this make the timeouts a little more generous as
the previous system had a bit more slack as it was done as a delay per
iteration of the loop whereas regmap_read_poll_timeout compares ktime's.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Register addresses are normally displayed in hex throughout the Arizona
driver. Update the arizona_poll_reg function to follow this convention.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

arizona_poll_reg already returns ETIMEDOUT if we don't see the expected
register changes before the time out, so remove pointless local setting of
ETIMEDOUT.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

To enable eventual removal of pr_warning

This makes pr_warn use consistent for drivers/mfd

Prior to this patch, there were 4 uses of pr_warning and
9 uses of pr_warn in drivers/mfd
Signed-off-by: NJoe Perches <joe@perches.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Align the placement as which the mfd_cell of LED is defined as the other
members done on the structure.
Signed-off-by: NSean Wang <sean.wang@mediatek.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This patch adds description for LED as the sub-module on MT6397/MT6323
multifunction device.
Signed-off-by: NSean Wang <sean.wang@mediatek.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The CHRG_CTRL1 and CHRG_CTRL2 registers are made for controlling
different battery charging settings such as the constant current charge
value.

The AXP22X also have a third register CHRG_CTRL3 which has settings for
battery charging too.

This adds the CHRG_CTRL1, CHRG_CTRL2 and CHRG_CTRL3 registers to the
list of writeable registers for AXP20X and AXP22X PMICs.
Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The X-Powers AXP20X and AXP22X PMICs expose the status of AC power
supply.

This adds the AC power supply driver to the MFD cells of the AXP22X
PMICs.
Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-By: NSebastian Reichel <sre@kernel.org>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This adds the AXP20X/AXP22x ADCs driver to the mfd cells of the AXP209,
AXP221 and AXP223 MFD.
Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The registers 0x56 and 0x57 of AXP22X PMIC store the value of the
internal temperature of the PMIC.

This patch modifies the name of these registers from AXP22X_PMIC_ADC_H/L
to AXP22X_PMIC_TEMP_H/L so their purpose is clearer.
Signed-off-by: NQuentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The SPI interface is mostly a copy/paste from the I2C interface with some
minor renaming for consistency. "Client" is an I2C specific term that
was left in the SPI remove path, rename this here.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This patch adds documentation for the Altera A10-SR Reset
Controller DT bindings.
Signed-off-by: NThor Thayer <thor.thayer@linux.intel.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Add Peripheral PHY Reset Controller to the Arria10
Development Kit System Resource Chip's MFD.
Signed-off-by: NThor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

After commit 028af594 ("mfd: intel-lpss: Pass SDA hold time to
I2C host controller driver") the driver still has a non-used variable.

Remove it here.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>