- 10 11月, 2014 12 次提交
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由 Adrian Hunter 提交于
Add 64-bit ADMA support including: - add 64-bit ADMA descriptor - add SDHCI_USE_64_BIT_DMA flag - set upper 32-bits of DMA addresses - ability to select 64-bit ADMA - ability to use 64-bit ADMA sizes and alignment - display "ADMA 64-bit" when host is added It is assumed that a 64-bit capable device has set a 64-bit DMA mask and *must* do 64-bit DMA. A driver has the opportunity to change that during the first call to ->enable_dma(). Similarly SDHCI_QUIRK2_BROKEN_64_BIT_DMA must be left to the drivers to implement. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Adrian Hunter 提交于
In preparation for 64-bit ADMA, parameterize ADMA sizes and alignment. 64-bit ADMA has a larger descriptor because it contains a 64-bit address instead of a 32-bit address. Also data must be 8-byte aligned instead of 4-byte aligned. Consequently, sdhci_host members are added for descriptor, table, and buffer sizes and alignment. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Adrian Hunter 提交于
It is kernel-style to use 'void *' for anonymous data. This is being applied to the ADMA bounce buffer which contains unaligned bytes, and to the ADMA descriptor table which will contain 32-bit ADMA descriptors or 64-bit ADMA descriptors when support is added. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Adrian Hunter 提交于
In preparation for 64-bit ADMA, rename adma_desc to adma_table. That is because members will be added for descriptor size and table size, so using adma_desc (which is the table) is confusing. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
Previous patches has replaced the calls to mmc_send_ext_csd() into mmc_get_ext_csd(), thus mmc_send_ext_csd() has become redundant. Let's remove it. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
Callers of mmc_send_ext_csd() will be able to decrease code duplication by using mmc_get_ext_csd() instead. Let's make it available. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Doug Anderson 提交于
The dw_mmc driver had a bunch of code that ran whenever a card was ejected and inserted. However, this code was old and crufty and should be removed. Some evidence that it's really not needed: 1. Is is supposed to be legal to use 'cd-gpio' on dw_mmc instead of using the built-in card detect mechanism. The 'cd-gpio' code doesn't run any of the crufty old code but yet still works. 2. While looking at this, I realized that my old change (369ac861 mmc: dw_mmc: don't queue up a card detect at slot startup) actually castrated the old code a little bit already and nobody noticed. Specifically "last_detect_state" was left as 0 at bootup. That means that on the first card removal none of the crufty code ran. 3. I can run "while true; do dd if=/dev/mmcblk1 of=/dev/null; done" while ejecting and inserting an SD Card and the world doesn't explode. If some of the crufty old code is actually needed, we should justify it and also put it in some place where it will be run even with "cd-gpio". Note that in my case I'm using the "cd-gpio" mechanism but for various reasons the hardware triggers a dw_mmc "card detect" at bootup. That was actually causing a real bug. The card detect workqueue was running while the system was trying to enumerate the card. The "present != slot->last_detect_state" triggered and we were doing all kinds of crazy stuff and messing up enumeration. The new mechanism of just asking the core to check the card is much safer and then the bogus interrupt doesn't hurt. Signed-off-by: NDoug Anderson <dianders@chromium.org> Tested-by: NJaehoon Chung <jh80.chung@samsung.com> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Tested-by: Nalim.akhtar <alim.akhtar@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Gwendal Grignou 提交于
For eMMC 5.0 compliant device, firmware version is stored in ext_csd. Report firmware as a 64bit hexa decimal. Vendor can use hexa or ascii string to report firmware version. Also add FFU related EXT_CSD register and note if the device is FFU capable. Signed-off-by: NGwendal Grignou <gwendal@chromium.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
In most of the cases mmc_get|set_drvdata() didn't simplify code, which should be the primary reason for such macros. Let's remove them and convert to the common device_driver macros, dev_set|get_drvdata() instead. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
The struct mmc_driver adds an extra layer on top of the struct device_driver. That would be fine, if there were a good reason, but that's not the case. Let's simplify code by converting to the common struct device_driver instead and thus also removing superfluous overhead. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
The macro is only used by the mmc core, so let's move it in there. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 03 10月, 2014 1 次提交
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由 Adrian Hunter 提交于
Add a quirk for a host controller that always sets a Transfer Complete interrupt status for the stop command even when a busy response is not indicated. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 02 10月, 2014 1 次提交
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由 Linus Walleij 提交于
commit 98e90de9 "mmc: host: switch OF parser to use gpio descriptors" switched the semantic behaviour of card detect and read only flags such that the inversion capability flag would only be set if inversion was explicitly specified in the device tree, in the hopes that no-one was using double inversion. It turns out that the XOR:ing between the explicit inversion was indeed in use, so we need to restore the old semantics where both ways of inversion are checked and the end result XOR:ed. Reported-by: NJavier Martinez Canillas <javier@dowhile0.org> Tested-by: NJavier Martinez Canillas <javier@dowhile0.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 24 9月, 2014 1 次提交
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由 Roger Tseng 提交于
Add MMC_POWER_UNDEFINED for power_mode in struct mmc_ios and use it as the initial value of host->ios.power_mode. For hosts with MMC_CAP2_NO_PRESCAN_POWERUP, this makes the later mmc_power_off() do real power-off things instead of NOP, and further prevents state messed up in cards that was already initialized (eg. by BIOS of UEFI driver). Signed-off-by: NRoger Tseng <rogerable@realtek.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 23 9月, 2014 1 次提交
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由 Stephen Boyd 提交于
The same tuning block exists in the dw_mmc h.c and sdhci-msm.c files. Move these into mmc.c so that they can be shared across drivers. Reported-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 19 9月, 2014 1 次提交
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由 Grégory Soutadé 提交于
Replace ext_csd "enhanced_area_en" attribute by "partition_setting_completed". It was used whether or not enhanced user area is defined and without checks of EXT_CSD_PARTITION_SETTING_COMPLETED bit. Signed-off-by: NGrégory Soutadé <gsoutade@neotion.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 09 9月, 2014 8 次提交
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由 Linus Walleij 提交于
This makes it possible to get the write protect (read only) GPIO line from a GPIO descriptor. Written to exactly mirror the card detect function. Acked-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Kuninori Morimoto 提交于
Now, mmc framework uses multi_io_quirk for I/O HW bug workaround. MMC_CAP2_NO_MULTI_READ flag is no longer needed Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Kuninori Morimoto 提交于
Historically, we have been using MMC_CAP* to handle host HW issues and currently the block layer uses MMC_CAP2_NO_MULTI_READ flag for a multi I/O HW bug workaround. There are a few tweaks needed to make MMC_CAP2_NO_MULTI_READ suite all situations. Therefore let's add an optional host ops callback to enable host drivers to return the number of blocks it allows per request. In a future patch and when host drivers have converted to the new callback, MMC_CAP2_NO_MULTI_READ shall be removed. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Chanho Min 提交于
It is fully legal for a controller to start handling busy-end interrupt before it has signaled that the command has completed. So make sure we do things in the proper order, Or it results that command interrupt is ignored so it can cause unexpected operations. This is founded at some toshiba emmc with the bellow warning. "mmc0: Got command interrupt 0x00000001 even though no command operation was in progress." This issue has been also reported by Youssef TRIKI: It is not specific to Toshiba devices, and happens with eMMC devices as well as SD card which support Auto-CMD12 rather than CMD23. Also, similar patch is submitted by: Gwendal Grignou <gwendal@chromium.org> Changes since v1: Fixed conflict with the next of git.linaro.org/people/ulf.hansson/mmc.git and Tested if issue is fixed again. Signed-off-by: NHankyung Yu <hankyung.yu@lge.com> Signed-off-by: NChanho Min <chanho.min@lge.com> Tested-by: NYoussef TRIKI <youssef.triki@st.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Doug Anderson 提交于
For UHS cards we need the ability to switch voltages from 3.3V to 1.8V. Add support to the dw_mmc driver to handle this. Note that dw_mmc needs a little bit of extra code since the interface needs a special bit programmed to the CMD register while CMD11 is progressing. This means adding a few extra states to the state machine to track. Signed-off-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Yuvaraj CD 提交于
This patch makes use of mmc_regulator_get_supply() to handle the vmmc and vqmmc regulators.Also it moves the code handling the these regulators to dw_mci_set_ios().It turned on the vmmc and vqmmc during MMC_POWER_UP and MMC_POWER_ON,and turned off during MMC_POWER_OFF. Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Sascha Hauer 提交于
Some eMMC and SD cards implement a DSR register that allows to tune raise/fall times and drive strength of the CMD and DATA outputs. The values to use depend on the card in use and the host. It might be needed to reduce the drive strength to prevent voltage peaks above the host's specification. Implement a 'dsr' devicetree property that allows to specify the value to set the DSR to. For non-dt setups the new members of mmc_host can be set by board code. This patch was initially authored by Sascha Hauer. It contains improvements authored by Markus Niebel and Uwe Kleine-König. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMarkus Niebel <Markus.Niebel@tq-group.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Yi Sun 提交于
eMMC card can support up to 7 physical partitions, including 2 boot, 1 RPMB and 4 GPs. Change MMC_NUM_PHY_PARTITION from 6 to 7, which is the correct value. Signed-off-by: NYi Sun <yi.y.sun@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 11 8月, 2014 1 次提交
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由 Jaehoon Chung 提交于
Slot quirks "disable-wp" is deprecated. Instead, use the host quirk "disable-wp". (Because the slot-node is removed in dt-file.) Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Tested-by: NSachin Kamat <sachin.kamat@samsung.com> Acked-by: NSeungwon Jeon <tgih.jun@samsung.com> Reviewed-by: NDoug Anderson <dianders@chromium.org> Tested-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 09 7月, 2014 1 次提交
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由 Tim Kryger 提交于
Switch the common SDHCI code over to use mmc_host's regulator pointers and remove the ones in the sdhci_host structure. Additionally, use the common mmc_regulator_get_supply function to get the regulators and set the ocr_avail mask. This change sets the ocr_avail directly based upon the voltage ranges supported which ensures ocr_avail is set correctly while allowing the use of regulators that can't provide exactly 1.8v, 3.0v, or 3.3v. Signed-off-by: NTim Kryger <tim.kryger@gmail.com> Signed-off-by: NMarkus Mayer <markus.mayer@linaro.org> Reviewed-by: NMatt Porter <mporter@linaro.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 22 5月, 2014 8 次提交
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由 Russell King 提交于
Track whether preset mode is currently enabled in hardware, and use that when making decisions elsewhere in the code rather than reading the register and checking the bit. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NMarkus Pargmann <mpa@pengutronix.de> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Russell King 提交于
Rather than reading back the timing information from the registers, cache it locally. This allows implementations to translate the UHS timing by overriding the set_uhs_signaling() method as required without also having to emulate the SDHCI_HOST_CONTROL2 register. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NMarkus Pargmann <mpa@pengutronix.de> Tested-by: NStephen Warren <swarren@nvidia.com> [Ulf Hansson] Resolved conflict Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NMarkus Pargmann <mpa@pengutronix.de> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Russell King 提交于
The Freescale esdhc driver is the only driver which needs the interrupt registers restored after a reset. Move this quirk to be part of the ESDHC driver implementation. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NMarkus Pargmann <mpa@pengutronix.de> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Russell King 提交于
Rather than wasting cycles read-modify-writing the interrupt enable registers, cache the value locally instead. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NMarkus Pargmann <mpa@pengutronix.de> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Russell King 提交于
There's no requirement to have the card tasklet separate now that we have a threaded interrupt handler, so kill this and move the called code into the threaded part of the handler. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NMarkus Pargmann <mpa@pengutronix.de> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Russell King 提交于
Use a generic threaded interrupt handler for SDIO interrupt handling, rather than allowing the SDIO core code to buggily spawn its own thread. This results in host drivers to be more in control of how SDIO interrupts are acknowledged in the hardware, rather than having the internals of the SDIO core placed upon them, possibly resulting in sub-standard handling. At least one SDHCI implementation specifies a very specific sequence to deal with a card interrupt. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NMarkus Pargmann <mpa@pengutronix.de> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Russell King 提交于
Rather than the SDIO support spawning it's own thread for handling card interrupts, use the generic IRQ infrastructure for this, triggering it from the host interface's interrupt handling directly. This avoids a race between the parent thread waiting to receive an interrupt response from the card, and the slow startup from the sdio irq thread, which can occur as a result of high system load (eg, while udev is running.) Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NMarkus Pargmann <mpa@pengutronix.de> Tested-by: NStephen Warren <swarren@nvidia.com> [Ulf Hansson] Resolved conflict Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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- 13 5月, 2014 5 次提交
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由 Tim Kryger 提交于
Callers of mmc_regulator_get_supply could benefit from knowing if either of the regulators are present but not yet available. Since callers do not currently examine the return value, modify this function to return zero or -EPROBE_DEFER if either regulator get returns the same. Furthermore, since callers check vmmc/vqmmc using IS_ERR and can deal with absent regulators, switch to devm_regulator_get_optional. This has the added benefit of allowing this function to behave correctly even in the !CONFIG_REGULATOR case such that the stub can be removed. Signed-off-by: NTim Kryger <tim.kryger@linaro.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Seungwon Jeon 提交于
This patch adds HS400 mode support for eMMC5.0 device. HS400 mode is high speed DDR interface timing from HS200. Clock frequency is up to 200MHz and only 8-bit bus width is supported. In addition, tuning process of HS200 is required to synchronize the command response on the CMD line because CMD input timing for HS400 mode is the same as HS200 mode. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Reviewed-by: NJackey Shen <jackey.shen@amd.com> Tested-by: NJaehoon Chung <jh80.chung@samsung.com> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Seungwon Jeon 提交于
Current implementation for bus speed mode selection is too complicated. This patch is to simplify the codes and remove some duplicate parts. The following changes are including: * Adds functions for each mode selection(HS, HS-DDR, HS200 and etc) * Rearranged the mode selection sequence with supported device type * Adds maximum speed for HS200 mode(hs200_max_dtr) * Adds field definition for HS_TIMING of EXT_CSD Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Tested-by: NJaehoon Chung <jh80.chung@samsung.com> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Seungwon Jeon 提交于
Device types which are supported by both host and device can be identified when EXT_CSD is read. There is no need to check host's capability anymore. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Tested-by: NJaehoon Chung <jh80.chung@samsung.com> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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由 Seungwon Jeon 提交于
Timing mode identifier has same role and can take the place of speed mode. This change removes all related speed mode. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Tested-by: NJaehoon Chung <jh80.chung@samsung.com> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChris Ball <chris@printf.net>
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