- 17 9月, 2013 1 次提交
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由 Chris Metcalf 提交于
With per-cpu data as well as loaded kernel modules coming from the vmalloc arena, we get close to the line all the time and occasionally need more than we had, so just double it up by default. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 13 9月, 2013 7 次提交
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由 Chris Metcalf 提交于
This should have been removed with commit 47d632f9, but it was overlooked. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
A config option to allow a variant vmap() using huge pages that was never upstreamed had some bits of code related to it scattered around the tile architecture; the config option was removed downstream and this commit cleans up the scattered evidence of it from the upstream as well. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Martin Schwidefsky 提交于
After the last architecture switched to generic hard irqs the config options HAVE_GENERIC_HARDIRQS & GENERIC_HARDIRQS and the related code for !CONFIG_GENERIC_HARDIRQS can be removed. Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Johannes Weiner 提交于
Unlike global OOM handling, memory cgroup code will invoke the OOM killer in any OOM situation because it has no way of telling faults occuring in kernel context - which could be handled more gracefully - from user-triggered faults. Pass a flag that identifies faults originating in user space from the architecture-specific fault handlers to generic code so that memcg OOM handling can be improved. Signed-off-by: NJohannes Weiner <hannes@cmpxchg.org> Reviewed-by: NMichal Hocko <mhocko@suse.cz> Cc: David Rientjes <rientjes@google.com> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: azurIt <azurit@pobox.sk> Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Johannes Weiner 提交于
The memcg code can trap tasks in the context of the failing allocation until an OOM situation is resolved. They can hold all kinds of locks (fs, mm) at this point, which makes it prone to deadlocking. This series converts memcg OOM handling into a two step process that is started in the charge context, but any waiting is done after the fault stack is fully unwound. Patches 1-4 prepare architecture handlers to support the new memcg requirements, but in doing so they also remove old cruft and unify out-of-memory behavior across architectures. Patch 5 disables the memcg OOM handling for syscalls, readahead, kernel faults, because they can gracefully unwind the stack with -ENOMEM. OOM handling is restricted to user triggered faults that have no other option. Patch 6 reworks memcg's hierarchical OOM locking to make it a little more obvious wth is going on in there: reduce locked regions, rename locking functions, reorder and document. Patch 7 implements the two-part OOM handling such that tasks are never trapped with the full charge stack in an OOM situation. This patch: Back before smart OOM killing, when faulting tasks were killed directly on allocation failures, the arch-specific fault handlers needed special protection for the init process. Now that all fault handlers call into the generic OOM killer (see commit 609838cf: "mm: invoke oom-killer from remaining unconverted page fault handlers"), which already provides init protection, the arch-specific leftovers can be removed. Signed-off-by: NJohannes Weiner <hannes@cmpxchg.org> Reviewed-by: NMichal Hocko <mhocko@suse.cz> Acked-by: NKOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Cc: David Rientjes <rientjes@google.com> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: azurIt <azurit@pobox.sk> Acked-by: Vineet Gupta <vgupta@synopsys.com> [arch/arc bits] Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 12 9月, 2013 1 次提交
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由 Naoya Horiguchi 提交于
Currently hugepage migration works well only for pmd-based hugepages (mainly due to lack of testing,) so we had better not enable migration of other levels of hugepages until we are ready for it. Some users of hugepage migration (mbind, move_pages, and migrate_pages) do page table walk and check pud/pmd_huge() there, so they are safe. But the other users (softoffline and memory hotremove) don't do this, so without this patch they can try to migrate unexpected types of hugepages. To prevent this, we introduce hugepage_migration_support() as an architecture dependent check of whether hugepage are implemented on a pmd basis or not. And on some architecture multiple sizes of hugepages are available, so hugepage_migration_support() also checks hugepage size. Signed-off-by: NNaoya Horiguchi <n-horiguchi@ah.jp.nec.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Hillf Danton <dhillf@gmail.com> Cc: Wanpeng Li <liwanp@linux.vnet.ibm.com> Cc: Mel Gorman <mgorman@suse.de> Cc: Hugh Dickins <hughd@google.com> Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Cc: Michal Hocko <mhocko@suse.cz> Cc: Rik van Riel <riel@redhat.com> Cc: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 07 9月, 2013 2 次提交
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由 Chris Metcalf 提交于
These are based on the current shipping versions of the config files from Tilera, as synced up to the tip, so are a better starting point for folks who want a default configuration. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
The macrology in cmpxchg.h was designed to allow arbitrary pointer and integer values to be passed through the routines. To support cmpxchg() on 64-bit values on the 32-bit tilepro architecture, we used the idiom "(typeof(val))(typeof(val-val))". This way, in the "size 8" branch of the switch, when the underlying cmpxchg routine returns a 64-bit quantity, we cast it first to a typeof(val-val) quantity (i.e. size_t if "val" is a pointer) with no warnings about casting between pointers and integers of different sizes, then cast onwards to typeof(val), again with no warnings. If val is not a pointer type, the additional cast is a no-op. We can't replace the typeof(val-val) cast with (for example) unsigned long, since then if "val" is really a 64-bit type, we cast away the high bits. HOWEVER, this fails with current gcc (through 4.7 at least) if "val" is a pointer to an incomplete type. Unfortunately gcc isn't smart enough to realize that "val - val" will always be a size_t type even if it's an incomplete type pointer. Accordingly, I've reworked the way we handle the casting. We have given up the ability to use cmpxchg() on 64-bit values on tilepro, which is OK in the kernel since we should use cmpxchg64() explicitly on such values anyway. As a result, I can just use simple "unsigned long" casts internally. As I reworked it, I realized it would be cleaner to move the architecture-specific conditionals for cmpxchg and xchg out of the atomic.h headers and into cmpxchg, and then use the cmpxchg() and xchg() primitives directly in atomic.h and elsewhere. This allowed the cmpxchg.h header to stand on its own without relying on the implicit include of it that is performed by <asm/atomic.h>. It also allowed collapsing the atomic_xchg/atomic_cmpxchg routines from atomic_{32,64}.h into atomic.h. I improved the tests that guard the allowed size of the arguments to the routines to use a __compiletime_error() test. (By avoiding the use of BUILD_BUG, I could include cmpxchg.h into bitops.h as well and use the macros there, which is otherwise impossible due to include order dependency issues.) The tilepro _atomic_xxx internal methods were previously set up to take atomic_t and atomic64_t arguments, which isn't as convenient with the new model, so I modified them to take int or u64 arguments, which is consistent with how they used the arguments internally anyway, so provided some nice simplification there too. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 04 9月, 2013 23 次提交
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由 Chris Metcalf 提交于
This change sets the PCI devices' initial DMA capabilities conservatively and promotes them at the request of the driver, as opposed to assuming advanced DMA capabilities. The old design runs the risk of breaking drivers that assume default capabilities. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Wang Sheng-Hui 提交于
Should check the return value of kzalloc first to avoid the null pointer. Then can dereference the non-null pointer to access the fields of struct resource. Signed-off-by: NWang Sheng-Hui <shhuiw@gmail.com> Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
This was really only useful for TILE64 when we mapped the kernel data with small pages. Now we use a huge page and we really don't want to map different parts of the kernel data in different ways. We retain the __write_once name in case we want to bring it back to life at some point in the future. Note that this change uncovered a latent bug where the "smp_topology" variable happened to always be aligned mod 8 so we could store two "int" values at once, but when we eliminated __write_once it ended up only aligned mod 4. Fix with an explicit annotation. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
This chip is no longer being actively developed for (it was superceded by the TILEPro64 in 2008), and in any case the existing compiler and toolchain in the community do not support it. It's unlikely that the kernel works with TILE64 at this point as the configuration has not been tested in years. The support is also awkward as it requires maintaining a significant number of ifdefs. So, just remove it altogether. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Akinobu Mita 提交于
The definisions of __ffs(), __fls(), and ffs() for tile are almost same as asm-generic/bitops-*.h. The only difference is that it is defined as __always_inline or inline. So this switches to use those headers. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> [moved #includes to end]
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由 Chris Metcalf 提交于
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
We were rolling our own bundle_bits, which is unnecessary. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
There's no need to make up new ways of computing the addresses of the Tilera hypervisor APIs; just use the standard method of relying on the symbols to provide the addresses. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
Also fix mentions of it in #error statements. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
It was bombed away because it was previously marked as __devinit, but it should be an __init function. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
If we wait until after including a bunch of other files, we will have generated so much warning spew that it's hard to notice the error about using the wrong compiler. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
Explain the rationale of not overlapping the 64-bit DMA window with the PA range. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
It isn't used any more by us now that the generic kernel build offers DEBUG_INFO_REDUCED, so just get rid of it. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
We use virt_to_pte(NULL, va) a lot, which isn't very obvious. I added virt_to_kpte(va) as a more obvious wrapper function, that also validates the va as being a kernel adddress. And, I fixed the semantics of virt_to_pte() so that we handle the pud and pmd the same way, and we now document the fact that we handle the final pte level differently. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
Allow enabling frame pointer support; this makes it easier to hook into the various kernel features that claim they require it without having to add Kconfig conditionals everywhere (a la mips, ppc, s390, and microblaze). When enabled, it basically eliminates leaf functions as such, and stops optimizing tail and sibling calls. It adds around 3% to the size of the kernel when enabled. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
Newer hypervisors have an API for reporting per-cpu statistics information. This change allows seeing that information via /sys/devices/system/cpu/cpuN/hv_stats file for each core. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
Enter kernel debugger at boot with: --hvd UART_1=1 --hvx kgdbwait --hvx kgdboc=ttyS1,115200 or at runtime with: echo ttyS1,115200 > /sys/module/kgdboc/parameters/kgdboc echo g > /proc/sysrq-trigger Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
The TILE-Gx chip includes an on-chip UART. This change adds support for using the UART from within the kernel. The UART shim has more functionality than is exposed here, but to keep the kernel code and binary simpler, this is a subset of the full API designed to enable a standard Linux tty serial driver only. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
The existing code relied on the hardware definition (<arch/chip.h>) to specify how much VA and PA space was available. It's convenient to allow customizing this for some configurations, so provide symbols MAX_PA_WIDTH and MAX_VA_WIDTH in <asm/page.h> that can be modified if desired. Additionally, move away from the MEM_XX_INTRPT nomenclature to define the start of various regions within the VA space. In fact the cleaner symbol is, for example, MEM_SV_START, to indicate the start of the area used for supervisor code; the actual address of the interrupt vectors is not as important, and can be changed if desired. As part of this change, convert from "intrpt1" nomenclature (which built in the old privilege-level 1 model) to a simple "intrpt". Also strip out some tilepro-specific code supporting modifying the PL the kernel could run at, since we don't actually support using different PLs in tilepro, only tilegx. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
Technically, user privilege is anything less than kernel privilege. We modify the existing user_mode() macro to have this semantic (and use it in a couple of places it wasn't being used before), and add an IS_KERNEL_EX1() macro to the assembly code as well. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
We remove some debug code in relocate_kernel_64.S that made raw calls to the hv_console_putc Tilera hypervisor API, since everything should funnel through the early_hv_write() API. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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- 30 8月, 2013 6 次提交
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由 Chris Metcalf 提交于
This tile-specific API had a minor bug, in that if a super huge (>4GB) page mapped a particular address range, we wouldn't handle it correctly. As part of fixing that bug, I also cleaned up some of the pud and pmd accessors to make them more consistent. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
Previously, we used a special-purpose register (SPR_SYSTEM_SAVE_K_0) to hold the CPU number and the top of the current kernel stack by using the low bits to hold the CPU number, and using the high bits to hold the address of the page just above where we'd want the kernel stack to be. That way we could initialize a new SP when first entering the kernel by just masking the SPR value and subtracting a couple of words. However, it's actually more useful to be able to place an arbitrary kernel-top value in the SPR. This allows us to create a new stack context (e.g. for virtualization) with an arbitrary top-of-stack VA. To make this work, we now store the CPU number in the high bits, above the highest legal VA bit (42 bits in the current tilegx microarchitecture). The full 42 bits are thus available to store the top of stack value. Getting the current cpu (a relatively common operation) is still fast; it's now a shift rather than a mask. We make this change only for tilegx, since tilepro has too few SPR bits to do this, and we don't need this support on tilepro anyway. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
We use the validate_current() API to make sure that "current" seems plausible before using it. With the new show_regs_print_info() API, we want to check that current is OK before calling it, since otherwise we will end up in a recursive panic. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
Normally the build doesn't include these warnings, but at one point I built with -Wsign-compare, and noticed a few things that are technically bugs. This change fixes those things. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
With this change such sections are grouped with regular text in the vmlinux image; this change puts them at the front, which is where the standard Linux includes .text.hot*. This change should fix a recently-observed bug where a bunch of symbols were being omitted from the /proc/kallsyms output because they fell between _etext and _sinittext. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
In strncpy_from_user_asm, when the destination buffer length was the same as the actual string length, we were returning the size of the destination buffer. But since it's a NUL terminated string, we should return the length of the string instead. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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