- 27 11月, 2018 2 次提交
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由 Paul Kocialkowski 提交于
The backend allows integer-only scaling but can handle alpha components, unlike the frontend. It could be useful to add support for this eventually, so add a short TODO comment describing the situation. Signed-off-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181123092515.2511-4-paul.kocialkowski@bootlin.com
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由 Paul Kocialkowski 提交于
This adds a dedicated function for cleaning the video and YUV source channel layer enable bits. This function is called first on layer atomic update to make sure that there are no leftover bits from previous plane configuration that were not cleaned until now. It fixes issues when alternating between video and YUV planes, where both bits would be set eventually, leading to broken plane display. Signed-off-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181123092515.2511-2-paul.kocialkowski@bootlin.com
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- 24 7月, 2018 1 次提交
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由 Ayan Kumar Halder 提交于
drm/sun4i: Use (struct drm_format_info) fields to determine if a format is yuv and multi planar or not. We do not need sun4i_backend_format_is_packed_yuv422() / sun4i_backend_format_is_planar_yuv() to determine if the format is yuv multi planar or not. (struct drm_format_info *)->is_yuv tells if the format is yuv or not. And (struct drm_format_info *)->num_planes denotes the number of planes. This issue was identified during a review on a previous patch:- https://lists.freedesktop.org/archives/dri-devel/2018-July/183840.htmlSigned-off-by: NAyan Kumar halder <ayan.halder@arm.com> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/1532336220-3791-1-git-send-email-ayan.halder@arm.com
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- 19 7月, 2018 3 次提交
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由 Paul Kocialkowski 提交于
Not all sunxi platforms with the first version of the Display Engine support an alpha component on the plane with the lowest z position (as in: lowest z-pos), that gets blended with the background color. In particular, the A13 is known to have this limitation. However, it was recently discovered that the A20 and A33 are capable of having alpha on their lowest plane. Thus, this introduces a specific quirk to indicate such support, per-platform. Since this was not tested on sun4i and sun6i platforms, a conservative approach is kept and this feature is not supported. Signed-off-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180719080838.31598-2-paul.kocialkowski@bootlin.com
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由 Paul Kocialkowski 提交于
In prevision for introducing a new quirk that will be used at atomic plane check time, register the quirks structure with the backend structure. This way, it can easily be grabbed where needed. Signed-off-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180719080838.31598-1-paul.kocialkowski@bootlin.com
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由 Ayan Kumar Halder 提交于
drm_format_info table has a field 'is_yuv' to denote if the format is yuv or not. The driver is expected to use this instead of having a function for the same purpose. Signed-off-by: NAyan Kumar halder <ayan.halder@arm.com> Reviewed-by: NVille Syrjala <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1531847626-22248-5-git-send-email-ayan.halder@arm.com
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- 17 4月, 2018 1 次提交
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由 Maxime Ripard 提交于
Our backend supports a per-plane alpha property. Support it through our new helper. Acked-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com> Acked-by: NSean Paul <seanpaul@chromium.org> Reviewed-by: NChen-Yu Tsai <wens@csie.org> Reviewed-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/13e89f0d2f2b55752a22eb8c4f37f325246a3a9c.1523432341.git-series.maxime.ripard@bootlin.com
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- 20 3月, 2018 1 次提交
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由 Maxime Ripard 提交于
Now that we have the guarantee that we will have only a single YUV plane, actually support them. The way it works is not really straightforward, since we first need to enable the YUV mode in the plane that we want to setup, and then we have a few registers to setup the YUV buffer and parameters. We also need to setup the color correction to actually have something displayed. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/66088c1398bd3189123f28a89a7ccc669fe9f296.1519931807.git-series.maxime.ripard@bootlin.com
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- 19 3月, 2018 2 次提交
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由 Maxime Ripard 提交于
Just like for the frontend, a single plane can use a YUV format. Make sure we have that constraint covered in our atomic_check. This is preliminary to the actual YUV support to make sure we don't end up in an impossible to support situation. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/2f8586493d9139b12efe7e94f65e9a149f818e0e.1519931807.git-series.maxime.ripard@bootlin.com
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由 Chen-Yu Tsai 提交于
This patch adds support for the compatible strings of the A80 display pipeline. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180315114136.24747-6-wens@csie.org
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- 22 2月, 2018 2 次提交
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由 Maxime Ripard 提交于
We've had some code for quite some time to prevent the alpha bug from happening on the lowest primary plane. Since we now check for this in our atomic_check, we can simply remove it. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/965180afd8169ccaa848f061d16a2c1a9ec4d289.1518802627.git-series.maxime.ripard@bootlin.com
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由 Maxime Ripard 提交于
Since we now have a way to enforce the zpos, check for the number of alpha planes, the only missing part is to assign our pipe automatically instead of hardcoding it. The algorithm is quite simple, but requires two iterations over the list of planes. In the first one (which is the same one that we've had to check for alpha, the frontend usage, and so on), we order the planes by their zpos. We can then do a second iteration over that array by ascending zpos starting with the pipe 0. When and if we encounter our alpha plane, we put it and all the other subsequent planes in the second pipe. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/e9caf21d831438d36a3ccc7cef229c9a7ea7f69f.1518802627.git-series.maxime.ripard@bootlin.com
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- 29 1月, 2018 2 次提交
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由 Maxime Ripard 提交于
Due to the way the composition is done in hardware, we can only have a single alpha-enabled plane active at a time, placed in the second (highest priority) pipe. Make sure of that in our atomic_check to not end up in an impossible scenario. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/7371f62a1385f2cbe3ed75dfca2e746338eb2286.1516617243.git-series.maxime.ripard@free-electrons.com
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由 Maxime Ripard 提交于
Our various planes have a configurable zpos, that combined with the pipes allow to configure the composition. Since the interaction between the pipes, zpos and alphas framebuffers is not trivial, let's just enable the zpos as an immutable property for now, and use that zpos in our atomic_update part. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/b006853e908bd06661c5bc1f2191121523bce0e4.1516617243.git-series.maxime.ripard@free-electrons.com
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- 22 1月, 2018 5 次提交
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由 Maxime Ripard 提交于
If we try to read the backend registers while it fetches the new values, we end up with the value of some random register instead of the one we asked for. In order to prevent that, let's make sure that the very first thing we do during our atomic modesetting is to let the commit bit come to a rest. We don't have to worry about anything else since the only time we will trigger a new transaction is during the atomic_commit which comes much later. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/35604307e5bde2b85c674de79fa7c4d55700f085.1516613040.git-series.maxime.ripard@free-electrons.com
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由 Maxime Ripard 提交于
Now that we have everything in place, we can start enabling the frontend. This is more difficult than one would assume since there can only be one plane using the frontend per-backend. We therefore need to make sure that the userspace will not try to setup multiple planes using it, since that would be impossible. In order to prevent that, we can create an atomic_check callback that will check that only one plane will effectively make use of the frontend in a given configuration, and will toggle the switch in that plane state so that the proper setup function can do their role. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/278e6c514a8311750fe627c7f28d58b3e2cbd825.1516613040.git-series.maxime.ripard@free-electrons.com
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由 Maxime Ripard 提交于
Now that we have a driver, we can make use of it. This is done by adding a flag to our custom plane state that will trigger whether we should use the frontend on that particular plane or not. The rest is just plumbing to set up the backend to not perform the DMA but receive its data from the frontend. Note that we're still not making any use of the frontend itself, as no one is setting the flag yet. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/cdffc25eab2d817820cc78cbd24f1f4b99902014.1516613040.git-series.maxime.ripard@free-electrons.com
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由 Maxime Ripard 提交于
The function converting the DRM format to its equivalent in the backend registers was assuming that we were having a plane. However, we might want to use that function when setting up a plane using the frontend, in which case we will not have a plane associated to the backend's layer. Yet, we still need to setup the format to the one output by the frontend. Test for NULL plane pointers before referencing them, so that we can work around it. Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/bfbe4c2e8525a7542526b648d59a8f3546e905f1.1516613040.git-series.maxime.ripard@free-electrons.com
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由 Maxime Ripard 提交于
Setup the line stride in the buffer setup function, since it's tied to the buffer itself, and is not needed when we do not set the buffer in the backend. This is for example the case when using the frontend and then routing its output to the backend. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/cbec84125bc0d5a6cf1d856b8291fbf77b138881.1516613040.git-series.maxime.ripard@free-electrons.com
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- 18 10月, 2017 3 次提交
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由 Jonathan Liu 提交于
The A20 display pipeline has 2 frontends, 2 backends, and 2 TCONs. This patch adds support (or a compatible string in the frontend's case) for these components. The TCONs support directly outputting to CPU/RGB/LVDS LCD panels, or it can output to HDMI via an on-chip HDMI controller, or CVBS/YPbPr/VGA signals via on-chip TV encoders. These additional encoders are not covered in this patch. Signed-off-by: NJonathan Liu <net147@gmail.com> [wens@csie.org: Expand commit message] Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171017121807.2994-6-wens@csie.org
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由 Chen-Yu Tsai 提交于
The A10 display pipeline has 2 frontends, 2 backends, and 2 TCONs. This patch adds support (or a compatible string in the frontend's case) for these components. The TCONs support directly outputting to CPU/RGB/LVDS LCD panels, or it can output to HDMI via an on-chip HDMI controller, or CVBS/YPbPr/VGA signals via on-chip TV encoders. These additional encoders are not covered in this patch. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171017121807.2994-5-wens@csie.org
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由 Chen-Yu Tsai 提交于
The backend has a mux to select the destination of the data to output to. It can select the TCON or the frontends. On the A20, it includes an option to output to the second TCON. This is not documented in the user manual, but the vendor kernel uses it nevertheless, so the second backend outputs to the second TCON. Although the muxing can be changed on the fly, DRM needs to be able to group a bunch of layers such that they get switched to another crtc together. This is because the display backend does the layer compositing, while the TCON generates the display timings. This constraint is not supported by DRM. Here we simply pair up backends and TCONs with the same ID. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171017121807.2994-2-wens@csie.org
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- 17 10月, 2017 1 次提交
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由 Chen-Yu Tsai 提交于
The display backend, as well as other peripherals that have a DRAM clock gate and access DRAM directly, bypassing the system bus, address the DRAM starting from 0x0, while physical addresses the system uses starts from 0x40000000 (or 0x20000000 in A80's case). This issue was witnessed on the Cubietruck, which has 2GB of RAM. Devices with less RAM function normally due to the DRAM address wrapping around. CMA seems to always allocate its buffer at a very high address, close to the end of DRAM. On a 1GB RAM device, the physical address would be something like 0x78000000. The DRAM address 0x78000000 would access the same DRAM region as 0x38000000 on a system, as the DRAM address would only span 0x0 ~ 0x3fffffff. The bit 0x40000000 is non-functional in this case. However on the Cubietruck, the DRAM is 2GB. The physical address is 0x40000000 ~ 0xbfffffff. The buffer would be something like 0xb8000000. But the DRAM address span 0x0 ~ 0x7fffffff, meaning the buffer address wraps around to 0x38000000, which is wrong. The correct DRAM address for it should be 0x78000000. Correct the address configured into the backend layer registers by PHYS_OFFSET to account for this. Fixes: 9026e0d1 ("drm: Add Allwinner A10 Display Engine support") Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171017042349.31743-6-wens@csie.org
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- 16 10月, 2017 3 次提交
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由 Chen-Yu Tsai 提交于
Many of the backend's layer configuration registers have undefined default values. This poses a risk as we use regmap_update_bits in some places, and don't overwrite the whole register. At probe/bind time we explicitly clear all the control registers by writing 0 to them. This patch adds a more detailed explanation on why we're doing this. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171014040252.9621-5-wens@csie.org
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由 Chen-Yu Tsai 提交于
Commit 4636ce93 ("drm/fb-cma-helper: Add drm_fb_cma_get_gem_addr()") adds a new helper, which covers fetching a drm_framebuffer's GEM object and calculating the buffer address for a given plane. This patch uses this helper to replace our own open coded version of the same function. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171014040252.9621-4-wens@csie.org
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由 Chen-Yu Tsai 提交于
The backend has various clocks and reset controls that need to be enabled and deasserted before register access is possible. Move the creation of the regmap to after the clocks and reset controls have been configured where it makes more sense. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171014040252.9621-3-wens@csie.org
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- 23 8月, 2017 1 次提交
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由 Kuninori Morimoto 提交于
Now, we can use of_graph_get_remote_endpoint(). Let's use it. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 01 6月, 2017 1 次提交
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由 Icenowy Zheng 提交于
As we are going to add support for the Allwinner DE2 engine in sun4i-drm driver, we will finally have two types of display engines -- the DE1 backend and the DE2 mixer. They both do some display blending and feed graphics data to TCON, and is part of the "Display Engine" called by Allwinner, so I choose to call them both "engine" here. Abstract the engine type to a new struct with an ops struct, which contains functions that should be called outside the engine-specified code (in TCON, CRTC or TV Encoder code). In order to preserve bisectability, we also switch the backend and layer code in its own module. Signed-off-by: NIcenowy Zheng <icenowy@aosc.io> Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 14 5月, 2017 5 次提交
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由 Chen-Yu Tsai 提交于
sun4i_backend_layer_enable can be called to enable or disable a layer. However the debug message always says "Enable", which is confusing. This patch makes the debug message vary according to the enable state. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chen-Yu Tsai 提交于
Save a pointer to the backend's underlying device tree node in its data structure. This will be used later for downstream tcons to find and match their respective upstream backends. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chen-Yu Tsai 提交于
Some Allwinner SoCs have 2 display pipelines, as in 2 of each components, including the frontend, backend, TCON, and any other extras. As the backend and TCON are always paired together and form the CRTC, we need to know which backend or TCON we are currently probing, so we can pair them when initializing the CRTC. This patch figures out the backend's ID from the device tree and stores it in the backend's data structure. It does this by looking at the "reg" property of any remote endpoints connected to the backend's input port. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chen-Yu Tsai 提交于
Now that we support multiple instances of backends, the trailing 0 implying only one backend no longer makes sense. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chen-Yu Tsai 提交于
To support multiple display pipelines, we need to keep track of the multiple display backends and TCONs registered with the driver. Switch to lists to track registered components. Components are only appended to their respective lists if the bind process was successful. The TCON bind function now defers if a backend was not registered. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 08 3月, 2017 1 次提交
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由 Chen-Yu Tsai 提交于
sunxi_rgb2yuv_coef is a table of RGB-to-YUV conversion coefficients. They are programmed into the hardware, and can be declared constant. Reported-by: NPriit Laes <plaes@plaes.org> Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 03 1月, 2017 1 次提交
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由 Christophe JAILLET 提交于
If 'sun4i_backend_drm_format_to_layer()' does not return 0, then 'val' is left unmodified. As it is not initialized either, the return value can be anything. It is likely that returning the error code was expected here. As the only caller of 'sun4i_backend_update_layer_formats()' does not check the return value, this fix is purely theorical. Signed-off-by: NChristophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 15 12月, 2016 2 次提交
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由 Ville Syrjälä 提交于
Replace uses of fb->pixel_format with fb->format->format. Less duplicated information is a good thing. Note that coccinelle failed to eliminate the "/* fourcc format */" comment from drm_framebuffer.h, so I had to do that part manually. @@ struct drm_framebuffer *FB; expression E; @@ drm_helper_mode_fill_fb_struct(...) { ... - FB->pixel_format = E; ... } @@ struct drm_framebuffer *FB; expression E; @@ i9xx_get_initial_plane_config(...) { ... - FB->pixel_format = E; ... } @@ struct drm_framebuffer *FB; expression E; @@ ironlake_get_initial_plane_config(...) { ... - FB->pixel_format = E; ... } @@ struct drm_framebuffer *FB; expression E; @@ skylake_get_initial_plane_config(...) { ... - FB->pixel_format = E; ... } @@ struct drm_framebuffer *a; struct drm_framebuffer b; @@ ( - a->pixel_format + a->format->format | - b.pixel_format + b.format->format ) @@ struct drm_plane_state *a; struct drm_plane_state b; @@ ( - a->fb->pixel_format + a->fb->format->format | - b.fb->pixel_format + b.fb->format->format ) @@ struct drm_crtc *CRTC; @@ ( - CRTC->primary->fb->pixel_format + CRTC->primary->fb->format->format | - CRTC->primary->state->fb->pixel_format + CRTC->primary->state->fb->format->format ) @@ struct drm_mode_set *set; @@ ( - set->fb->pixel_format + set->fb->format->format | - set->crtc->primary->fb->pixel_format + set->crtc->primary->fb->format->format ) @@ @@ struct drm_framebuffer { ... - uint32_t pixel_format; ... }; v2: Fix commit message (Laurent) Rebase due to earlier removal of many fb->pixel_format uses, including the 'fb->format = drm_format_info(fb->format->format);' snafu v3: Adjusted the semantic patch a bit and regenerated due to code changes Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Link: http://patchwork.freedesktop.org/patch/msgid/1481751175-18463-1-git-send-email-ville.syrjala@linux.intel.com
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由 Ville Syrjälä 提交于
Replace drm_format_plane_cpp(fb->pixel_format) with just fb->format->cpp[]. Avoids the expensive format info lookup. @@ struct drm_framebuffer *a; struct drm_framebuffer b; expression E; @@ ( - drm_format_plane_cpp(a->pixel_format, E) + a->format->cpp[E] | - drm_format_plane_cpp(b.pixel_format, E) + b.format->cpp[E] ) @@ struct drm_plane_state *a; struct drm_plane_state b; expression E; @@ ( - drm_format_plane_cpp(a->fb->pixel_format, E) + a->fb->format->cpp[E] | - drm_format_plane_cpp(b.fb->pixel_format, E) + b.fb->format->cpp[E] ) @@ struct drm_framebuffer *a; identifier T; expression E; @@ T = a->pixel_format <+... - drm_format_plane_cpp(T, E) + a->format->cpp[E] ...+> @@ struct drm_framebuffer b; identifier T; expression E; @@ T = b.pixel_format <+... - drm_format_plane_cpp(T, E) + b.format->cpp[E] ...+> v2: Rerun spatch due to code changes Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Suggested-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Link: http://patchwork.freedesktop.org/patch/msgid/1481751057-18123-1-git-send-email-ville.syrjala@linux.intel.com
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- 13 11月, 2016 1 次提交
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由 Julia Lawall 提交于
These component_ops structures are only used as the second argument to component_add and component_del, which are declared as const, so the structures can be declared as const as well. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct component_ops i@p = { ... }; @ok1@ identifier r.i; expression e1; position p; @@ component_add(e1,&i@p) @ok2@ identifier r.i; expression e1; position p; @@ component_del(e1, &i@p) @bad@ position p != {r.p,ok1.p,ok2.p}; identifier r.i; struct component_ops e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct component_ops i = { ... }; // </smpl> The result of the size command before the change is (arm): text data bss dec hex filename 5266 236 8 5510 1586 sun4i_backend.o 6393 236 8 6637 19ed sun4i_tcon.o 3700 368 8 4076 fec sun4i_tv.o 1668 108 0 1776 6f0 sun6i_drc.o and after the change: text data bss dec hex filename 5274 228 8 5510 1586 sun4i_backend.o 6401 228 8 6637 19ed sun4i_tcon.o 3708 360 8 4076 fec sun4i_tv.o 1676 100 0 1776 6f0 sun6i_drc.o Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1478971198-3659-1-git-send-email-Julia.Lawall@lip6.fr
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- 03 11月, 2016 1 次提交
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由 Maxime Ripard 提交于
The planes can do more than what was previously exposed. Add support for them. Since we still have the issue that the primary plane cannot have any alpha component, we will expose only the non-alpha formats in the primary formats, and the alpha formats will be exposed in the overlays. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NChen-Yu Tsai <wens@csie.org>
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- 20 10月, 2016 1 次提交
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由 Chen-Yu Tsai 提交于
The A31's display pipeline has 2 frontends, 2 backends, and 2 TCONs. It also has new display enhancement blocks, such as the DRC (Dynamic Range Controller), the DEU (Display Enhancement Unit), and the CMU (Color Management Unit). It supports HDMI, MIPI DSI, and 2 LCD/LVDS channels. The A31s display pipeline is almost the same, just without MIPI DSI. Only the TCON seems to be different, due to the missing mux for MIPI DSI. Add compatible strings for both of them. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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