- 08 1月, 2020 2 次提交
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由 Chunming Zhou 提交于
Can expose it now that the khronos has exposed the vlk extension. Signed-off-by: NChunming Zhou <david1.zhou@amd.com> Reviewed-by: NFlora Cui <Flora.Cui@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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由 Alex Deucher 提交于
This reverts commit 51bfac71. This causes stability issues on some raven boards. Revert for now until a proper fix is completed. Bug: https://gitlab.freedesktop.org/drm/amd/issues/934 Bug: https://bugzilla.kernel.org/show_bug.cgi?id=206017Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 23 11月, 2019 1 次提交
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由 Alex Deucher 提交于
5.4 and newer works fine with navi14. Reviewed-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 21 11月, 2019 1 次提交
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由 Alex Deucher 提交于
5.4 and newer works fine with navi14. Reviewed-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 07 11月, 2019 2 次提交
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由 Tianci.Yin 提交于
Add the navi14 PCI device id. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NTianci.Yin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tianci.Yin 提交于
Add the navi14 PCI device id. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NTianci.Yin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 28 10月, 2019 3 次提交
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由 Christian König 提交于
Instead of relying on the DRM functions just implement our own import functions. This prepares support for taking care of unpinned DMA-buf. v2: enable for all exporters, not just amdgpu, fix invalidation handling, lock reservation object while setting callback v3: change to new dma_buf attach interface v4: split out from unpinned DMA-buf work v5: rebased and cleanup on new DMA-buf interface v6: squash with invalidation callback change, stop using _(map|unmap)_locked v7: drop invalidations when the BO is already in system domain v8: rebase on new DMA-buf patch and drop move notification v9: cleanup comments Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/337948/
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由 Christian König 提交于
Add an DMA-buf export implementation independent of the DRM helpers. This not only avoids the caching of DMA-buf mappings, but also allows us to use the new dynamic locking approach. This is also a prerequisite of unpinned DMA-buf handling. v2: fix unintended recursion, remove debugging leftovers v3: split out from unpinned DMA-buf work v4: rebase on top of new no_sgt_cache flag v5: fix some warnings by including amdgpu_dma_buf.h v6: fix locking for non amdgpu exports v7: rebased on new DMA-buf locking patch v8: drop extra include Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/337949/
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由 Wambui Karuga 提交于
Correct the "_LENTH" mispelling in the AMDGPU_MAX_TIMEOUT_PARAM_LENGTH constant. Signed-off-by: NWambui Karuga <wambui.karugax@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 26 10月, 2019 1 次提交
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由 Marek Olšák 提交于
Allow userspace to read the same status registers for every family. Based on commit c7890fea, added any of these registers if defined in the include files of each architecture. Signed-off-by: NMarek Olšák <marek.olsak@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 18 10月, 2019 1 次提交
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由 Tianci.Yin 提交于
add memory training implementation code to save resume time. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NLuben Tuikov <luben.tuikov@amd.com> Signed-off-by: NTianci.Yin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 16 10月, 2019 3 次提交
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由 Alex Deucher 提交于
Move it into the caller. There are cases were we don't want it. We need it for hibernation, but we don't need it for runtime pm, so drop it for runtime pm. Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Emily Deng 提交于
When index is 1, need to set compute ring timeout for sriov and passthrough. Signed-off-by: NEmily Deng <Emily.Deng@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hans de Goede 提交于
Bail from the pci_driver probe function instead of from the drm_driver load function. This avoid /dev/dri/card0 temporarily getting registered and then unregistered again, sending unwanted add / remove udev events to userspace. Specifically this avoids triggering the (userspace) bug fixed by this plymouth merge-request: https://gitlab.freedesktop.org/plymouth/plymouth/merge_requests/59 Note that despite that being a userspace bug, not sending unnecessary udev events is a good idea in general. BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1490490Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 12 10月, 2019 1 次提交
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由 Hans de Goede 提交于
Bail from the pci_driver probe function instead of from the drm_driver load function. This avoid /dev/dri/card0 temporarily getting registered and then unregistered again, sending unwanted add / remove udev events to userspace. Specifically this avoids triggering the (userspace) bug fixed by this plymouth merge-request: https://gitlab.freedesktop.org/plymouth/plymouth/merge_requests/59 Note that despite that being a userspace bug, not sending unnecessary udev events is a good idea in general. BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1490490Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 08 10月, 2019 1 次提交
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由 Alex Deucher 提交于
It's only used in amdgpu_device.c and the naming also reflects that. Move it there. Reviewed-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 10月, 2019 10 次提交
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由 Marek Olšák 提交于
UMDs need this for correct programming of harvested chips. Signed-off-by: NMarek Olšák <marek.olsak@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
We should print the error only when we are hotplugged and crash basically all userspace applications. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NEmily Deng <Emily.Deng@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Marek Olšák 提交于
Never used. Signed-off-by: NMarek Olšák <marek.olsak@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jesse Zhang 提交于
When compute fence did not signal, compute ring cannot detect hardware hang because its timeout value is set to be infinite by default. In SR-IOV and passthrough mode, if user does not declare custome timeout value for compute ring, then use gfx ring timeout value as default. So that when there is a ture hardware hang, compute ring can detect it. Signed-off-by: NJesse Zhang <zhexi.zhang@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Guchun Chen 提交于
Enable full ras by default, user does not need to enable it by boot parameter. Signed-off-by: NGuchun Chen <guchun.chen@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jiange Zhao 提交于
Add Navi12 PCI id support. v2: flag as experimental for now (Alex) Signed-off-by: NJiange Zhao <Jiange.Zhao@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
We can remove this later as things get closer to launch. Reviewed-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tianci.Yin 提交于
Add Navi12 PCI id support. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NTianci.Yin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Adam Zerella 提交于
Some of the documentation formatting could be improved which will resolve some Sphinx amdgpu build warnings e.g WARNING: Unexpected indentation. WARNING: Block quote ends without a blank line; unexpected unindent. WARNING: Inline emphasis start-string without end-string. Signed-off-by: NAdam Zerella <adam.zerella@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Marek Olšák 提交于
UMDs need this for correct programming of harvested chips. Signed-off-by: NMarek Olšák <marek.olsak@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 18 9月, 2019 3 次提交
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由 Alex Deucher 提交于
We can remove this later as things get closer to launch. Reviewed-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tianci.Yin 提交于
Add Navi12 PCI id support. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NTianci.Yin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tianci.Yin 提交于
Add the navi14 PCI device id. Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Signed-off-by: NTianci.Yin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 16 9月, 2019 2 次提交
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由 Tianci.Yin 提交于
Add the navi14 PCI device id. Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Signed-off-by: NTianci.Yin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Yong Zhao 提交于
As more and more new asics start to reuse the old device IDs before launch, there is a need to quickly override the existing asic type corresponding to the reused device ID through a kernel parameter. With this, engineers no longer need to rely on local hack patches, facilitating cooperation across teams. Signed-off-by: NYong Zhao <Yong.Zhao@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 9月, 2019 1 次提交
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由 Andrey Grodzovsky 提交于
Problem: Under certain conditions, when some IP bocks take a RAS error, we can get into a situation where a GPU reset is not possible due to issues in RAS in SMU/PSP. Temporary fix until proper solution in PSP/SMU is ready: When uncorrectable error happens the DF will unconditionally broadcast error event packets to all its clients/slave upon receiving fatal error event and freeze all its outbound queues, err_event_athub interrupt will be triggered. In such case and we use this interrupt to issue GPU reset. THe GPU reset code is modified for such case to avoid HW reset, only stops schedulers, deatches all in progress and not yet scheduled job's fences, set error code on them and signals. Also reject any new incoming job submissions from user space. All this is done to notify the applications of the problem. v2: Extract amdgpu_amdkfd_pre/post_reset from amdgpu_device_lock/unlock_adev Move amdgpu_job_stop_all_jobs_on_sched to amdgpu_job.c Remove print param from amdgpu_ras_query_error_count v3: Update based on prevoius bug fixing patch to properly call amdgpu_amdkfd_pre_reset for other XGMI hive memebers. Signed-off-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 23 8月, 2019 2 次提交
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由 Gerd Hoffmann 提交于
Not needed any more for remove_conflicting_pci_framebuffers calls. Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20190822090645.25410-3-kraxel@redhat.com
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由 Frank.Min 提交于
Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Signed-off-by: NFrank.Min <Frank.Min@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 22 8月, 2019 1 次提交
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由 Feifei Xu 提交于
This is to improve performance. Signed-off-by: NFeifei Xu <Feifei.Xu@amd.com> Tested-by: NCandice Li <candice.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 20 8月, 2019 1 次提交
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由 Jason Gunthorpe 提交于
This is a significant simplification, it eliminates all the remaining 'hmm' stuff in mm_struct, eliminates krefing along the critical notifier paths, and takes away all the ugly locking and abuse of page_table_lock. mmu_notifier_get() provides the single struct hmm per struct mm which eliminates mm->hmm. It also directly guarantees that no mmu_notifier op callback is callable while concurrent free is possible, this eliminates all the krefs inside the mmu_notifier callbacks. The remaining krefs in the range code were overly cautious, drivers are already not permitted to free the mirror while a range exists. Link: https://lore.kernel.org/r/20190806231548.25242-6-jgg@ziepe.caReviewed-by: NChristoph Hellwig <hch@lst.de> Reviewed-by: NRalph Campbell <rcampbell@nvidia.com> Tested-by: NRalph Campbell <rcampbell@nvidia.com> Signed-off-by: NJason Gunthorpe <jgg@mellanox.com>
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- 13 8月, 2019 4 次提交
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由 Alex Deucher 提交于
The current code won't likely work on production hw when it ships so leave it as experimental until it's ready. Acked-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
Add Renoir PCI id support. Acked-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Add the navi14 PCI device id. Reviewed-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Michel Dänzer 提交于
DC already handles this correctly since amdgpu minor version 31. Bump the minor version again so that xf86-video-amdgpu can take advantage of this working without DC as well now. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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