1. 11 10月, 2018 32 次提交
  2. 10 10月, 2018 2 次提交
  3. 09 10月, 2018 6 次提交
    • I
      dpaa2-eth: Don't account Tx confirmation frames on NAPI poll · 68049a5f
      Ioana Ciocoi Radulescu 提交于
      Until now, both Rx and Tx confirmation frames handled during
      NAPI poll were counted toward the NAPI budget. However, Tx
      confirmations are lighter to process than Rx frames, which can
      skew the amount of work actually done inside one NAPI cycle.
      
      Update the code to only count Rx frames toward the NAPI budget
      and set a separate threshold on how many Tx conf frames can be
      processed in one poll cycle.
      
      The NAPI poll routine stops when either the budget is consumed
      by Rx frames or when Tx confirmation frames reach this threshold.
      Signed-off-by: NIoana Radulescu <ruxandra.radulescu@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      68049a5f
    • Y
      net: mscc: ocelot: remove set but not used variable 'phy_mode' · 9e19dabc
      YueHaibing 提交于
      Fixes gcc '-Wunused-but-set-variable' warning:
      
      drivers/net/ethernet/mscc/ocelot_board.c: In function 'mscc_ocelot_probe':
      drivers/net/ethernet/mscc/ocelot_board.c:262:17: warning:
       variable 'phy_mode' set but not used [-Wunused-but-set-variable]
         enum phy_mode phy_mode;
      
      It never used since introduction in
      commit 71e32a20 ("net: mscc: ocelot: make use of SerDes PHYs for handling their configuration")
      Signed-off-by: NYueHaibing <yuehaibing@huawei.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      9e19dabc
    • G
      isdn/gigaset/isocdata: mark expected switch fall-through · 062f97a3
      Gustavo A. R. Silva 提交于
      Notice that in this particular case, I replaced the
      "--v-- fall through --v--" comment with a proper
      "fall through", which is what GCC is expecting to
      find.
      
      This fix is part of the ongoing efforts to enabling
      -Wimplicit-fallthrough
      Signed-off-by: NGustavo A. R. Silva <gustavo@embeddedor.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      062f97a3
    • G
      isdn/gigaset: mark expected switch fall-throughs · 272a6617
      Gustavo A. R. Silva 提交于
      Replace "--v-- fall through --v--" with a proper "fall through"
      annotation. Also, change "bad cid: fall through" to
      "fall through - bad cid".
      
      This fix is part of the ongoing efforts to enabling -Wimplicit-fallthrough
      Signed-off-by: NGustavo A. R. Silva <gustavo@embeddedor.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      272a6617
    • Q
      net: phy: mscc: add support for VSC8574 PHY · 00d70d8e
      Quentin Schulz 提交于
      The VSC8574 PHY is a 4-ports PHY that is 10/100/1000BASE-T, 100BASE-FX,
      1000BASE-X and triple-speed copper SFP capable, can communicate with
      the MAC via SGMII, QSGMII or 1000BASE-X, supports WOL, downshifting and
      can set the blinking pattern of each of its 4 LEDs, supports SyncE as
      well as HP Auto-MDIX detection.
      
      This adds support for 10/100/1000BASE-T, SGMII/QSGMII link with the MAC,
      WOL, downshifting, HP Auto-MDIX detection and blinking pattern for its 4
      LEDs.
      
      The VSC8574 has also an internal Intel 8051 microcontroller whose
      firmware needs to be patched when the PHY is reset. If the 8051's
      firmware has the expected CRC, its patching can be skipped. The
      microcontroller can be accessed from any port of the PHY, though the CRC
      function can only be done through the PHY that is the base PHY of the
      package (internal address 0) due to a limitation of the firmware.
      
      The GPIO register bank is a set of registers that are common to all PHYs
      in the package. So any modification in any register of this bank affects
      all PHYs of the package.
      
      If the PHYs haven't been reset before booting the Linux kernel and were
      configured to use interrupts for e.g. link status updates, it is
      required to clear the interrupts mask register of all PHYs before being
      able to use interrupts with any PHY. The first PHY of the package that
      will be init will take care of clearing all PHYs interrupts mask
      registers. Thus, we need to keep track of the init sequence in the
      package, if it's already been done or if it's to be done.
      
      Most of the init sequence of a PHY of the package is common to all PHYs
      in the package, thus we use the SMI broadcast feature which enables us
      to propagate a write in one register of one PHY to all PHYs in the same
      package.
      Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      00d70d8e
    • Q
      net: phy: mscc: add support for VSC8584 PHY · a5afc167
      Quentin Schulz 提交于
      The VSC8584 PHY is a 4-ports PHY that is 10/100/1000BASE-T, 100BASE-FX,
      1000BASE-X and triple-speed copper SFP capable, can communicate with the
      MAC via SGMII, QSGMII or 1000BASE-X, supports downshifting and can set
      the blinking pattern of each of its 4 LEDs, supports hardware offloading
      of MACsec and supports SyncE as well as HP Auto-MDIX detection.
      
      This adds support for 10/100/1000BASE-T, SGMII/QSGMII link with the MAC,
      downshifting, HP Auto-MDIX detection and blinking pattern for its 4
      LEDs.
      
      The VSC8584 has also an internal Intel 8051 microcontroller whose
      firmware needs to be patched when the PHY is reset. If the 8051's
      firmware has the expected CRC, its patching can be skipped. The
      microcontroller can be accessed from any port of the PHY, though the CRC
      function can only be done through the PHY that is the base PHY of the
      package (internal address 0) due to a limitation of the firmware.
      
      The GPIO register bank is a set of registers that are common to all PHYs
      in the package. So any modification in any register of this bank affects
      all PHYs of the package.
      
      If the PHYs haven't been reset before booting the Linux kernel and were
      configured to use interrupts for e.g. link status updates, it is
      required to clear the interrupts mask register of all PHYs before being
      able to use interrupts with any PHY. The first PHY of the package that
      will be init will take care of clearing all PHYs interrupts mask
      registers. Thus, we need to keep track of the init sequence in the
      package, if it's already been done or if it's to be done.
      
      Most of the init sequence of a PHY of the package is common to all PHYs
      in the package, thus we use the SMI broadcast feature which enables us
      to propagate a write in one register of one PHY to all PHYs in the same
      package.
      
      The revA of the VSC8584 PHY (which is not and will not be publicly
      released) should NOT patch the firmware of the microcontroller or it'll
      make things worse, the easiest way is just to not support it.
      Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a5afc167