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  1. 25 6月, 2016 2 次提交
  3. 24 6月, 2016 4 次提交
  5. 16 6月, 2016 2 次提交
    • B
      EDAC: Correct channel count limit · bba14295
      由 Borislav Petkov 提交于 
      c44696ff ("EDAC: Remove arbitrary limit on number of channels")
lifted the arbitrary limit on memory controller channels in EDAC.
However, the dynamic channel attributes dynamic_csrow_dimm_attr and
dynamic_csrow_ce_count_attr remained 6.

This wasn't a problem except channels 6 and 7 weren't visible in sysfs
on machines with more than 6 channels after the conversion to static
attr groups with

  2c1946b6 ("EDAC: Use static attribute groups for managing sysfs entries")

 [ without that, we're exploding in edac_create_sysfs_mci_device()
   because we're dereferencing out of the bounds of the
   dynamic_csrow_dimm_attr array. ]

Add attributes for channels 6 and 7 along with a guard for the
future, should more channels be required and/or to sanity check for
misconfigured machines.

We still need to check against the number of channels present on the MC
first, as Thor reported.
Signed-off-by: NBorislav Petkov <bp@suse.de>
Reported-by: NHironobu Ishii <ishii.hironobu@jp.fujitsu.com>
Tested-by: NThor Thayer <tthayer@opensource.altera.com>
Cc: <stable@vger.kernel.org> # 4.2
      bba14295
    • B
      EDAC, amd64_edac: Init opstate at the proper time during init · 6ba92fea
      由 Borislav Petkov 提交于 
      It is useless to do it if we're loaded on unsupported hardware so do
that only after we have detected at least 1 supported AMD northbridge.
Signed-off-by: NBorislav Petkov <bp@suse.de>
      6ba92fea
  7. 08 6月, 2016 2 次提交
  9. 12 5月, 2016 1 次提交
  11. 10 5月, 2016 1 次提交
    • B
      EDAC, amd64_edac: Drop pci_register_driver() use · 3f37a36b
      由 Borislav Petkov 提交于 
      - remove homegrown instances counting.
- take F3 PCI device from amd_nb caching instead of F2 which was used with the
PCI core.

With those changes, the driver doesn't need to register a PCI driver and
relies on the northbridges caching which we do anyway on AMD.
Signed-off-by: NBorislav Petkov <bp@suse.de>
Cc: Yazen Ghannam <yazen.ghannam@amd.com>
      3f37a36b
  13. 07 5月, 2016 1 次提交
  15. 03 5月, 2016 1 次提交
    • T
      EDAC, sb_edac: Use cpu family/model in driver detection · 2c1ea4c7
      由 Tony Luck 提交于 
      Instead of picking a random PCI ID from the dozen or so we need to
access, just use x86_match_cpu() to pick based on CPU model number. The
choosing of PCI devices has been problematic in the past, see

  11249e73 ("sb_edac: Fix detection on SNB machines")

which fixed problems introduced by

  d0585cd8 ("sb_edac: Claim a different PCI device").

This is especially ugly if future hardware might not even have
EDAC-relevant registers in PCI config space and we would still be
required to choose some "random" PCI devices to scan for just so our
driver loads.

Is this cleaner/clearer? It deletes much more code than it adds. Only
tested on Broadwell. The driver loads/unloads and loads again. Still
decodes errors too.
Signed-off-by: NTony Luck <tony.luck@intel.com>
Suggested-by: NBorislav Petkov <bp@alien8.de>
Signed-off-by: NBorislav Petkov <bp@suse.de>
      2c1ea4c7
  17. 29 4月, 2016 2 次提交
  19. 27 4月, 2016 1 次提交
  21. 24 4月, 2016 1 次提交
  23. 23 4月, 2016 4 次提交
  25. 22 4月, 2016 2 次提交
  27. 18 4月, 2016 1 次提交
  29. 07 4月, 2016 1 次提交
  31. 02 4月, 2016 3 次提交
  33. 29 3月, 2016 6 次提交
  35. 11 3月, 2016 1 次提交
    • L
      EDAC/sb_edac: Fix computation of channel address · eb1af3b7
      由 Luck, Tony 提交于 
      Large memory Haswell-EX systems with multiple DIMMs per channel were
sometimes reporting the wrong DIMM.

Found three problems:

 1) Debug printouts for socket and channel interleave were not interpreting
    the register fields correctly. The socket interleave field is a 2^X
    value (0=1, 1=2, 2=4, 3=8). The channel interleave is X+1 (0=1, 1=2,
    2=3. 3=4).

 2) Actual use of the socket interleave value didn't interpret as 2^X

 3) Conversion of address to channel address was complicated, and wrong.
Signed-off-by: NTony Luck <tony.luck@intel.com>
Acked-by: NAristeu Rozanski <arozansk@redhat.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-edac@vger.kernel.org
Cc: stable@vger.kernel.org
Signed-off-by: NIngo Molnar <mingo@kernel.org>
      eb1af3b7
  37. 08 3月, 2016 2 次提交
  39. 11 2月, 2016 1 次提交
  41. 10 2月, 2016 1 次提交