Add basic support for the P4080 DS reference board.  None of the data
path devices (ethernet, crypto, pme) are support at this time.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add support for NVRAM on GE Fanuc's PPC9A.
Signed-off-by: NMartyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add support for NVRAM on GE Fanuc's SBC310.
Signed-off-by: NMartyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This patch enables the NVRAM found on the GE Fanuc SBC610
Signed-off-by: NMartyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Re-write the code so its more standalone and fixed some issues:
* Bump'd # of CAM entries to 64 to support e500mc
* Make the code handle MAS7 properly
* Use pr_cont instead of creating a string as we go
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Introduce new FSL_SOC_BOOKE Kconfig to handle both 85xx and QorIQ
based chips.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Export is needed for modular builds, and a static inline stub is needed
for non-MPC83xx builds.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Simply add power management controller nodes and sleep properties.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This patch adds needed nodes and properties to support suspend/resume
on the MPC8610HPCD boards.

There is a dedicated switch (SW9) that is used to wake up the boards.
By default the SW9 button is routed to IRQ8, but could be re-routed
(via PIXIS) to sreset.

With 'no_console_suspend' kernel command line argument specified, the
board is also able to wakeup upon serial port input.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Scott Wood <scottwood@freescale.com> [dts]
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

- Add power management controller nodes;
- Add interrupts for RTC nodes, the RTC interrupt may be used as a
  wakeup source;
- Add sleep properties (DEVDISR bit mask) and sleep-nexus nodes.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This patch adds suspend/resume support for MPC8540 and MPC8641D-
compatible CPUs. To reach sleep state, we just write the SLP bit
into the PM control and status register.

So far we don't support Deep Sleep mode as found in newer MPC85xx
CPUs (i.e. MPC8536). It can be relatively easy implemented though,
and for it we reserve 'mem' suspend type.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

So far the driver is used to reset QE upon resume, which is needed on
85xx. Later we can move some QE initialization steps into probe().
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This is needed to avoid ugly #ifdefs in drivers. Also update fsl_qe_udc
driver so that now it doesn't define its own versions that cause build
breakage when the generic stubs are used.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: NGreg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The bits are generic to CPM devices, so let's move them to the
common header file, so drivers won't need to privately reintroduce
another bunch of the same bits (as we can't include cpm2.h header
together with cpm1.h).
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

struct mcc defined in both immap_qe.h and immap_cpm2.h, so they will
conflic when included in a single file. The mcc struct is easy to deal
with, since it isn't used in any driver (yet), so let's just rename QE
version to qe_mcc.

The ucb_ctlr is a bit trickier, since it is used by fsl_qe_udc driver,
and the driver supports both CPM and QE UDCs, plus the QE version is
used to form a bigger immap struct.

I don't want to touch too much of USB code in this series, so for now
let's just copy most generic version into the common cpm.h header,
later we'll create cpm_usb.h where we'll place common USB structs that
are used by QE/CPM UDC and QE Host drivers (FHCI).

And as for the structs in qe.h and cpm2.h, just prefix them with qe_
and cpm_.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

When cpm2.h included into spi_mpc8xxx driver, the SPI defines
in the header conflict with defines in the driver.

We don't need them in the header file, so remove them. Plus
remove "struct spi", we'll use a better version in the driver.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

P1020 is another member of Freescale QorIQ series of processors.
It is an e500 based dual core SOC.
Being a scaled down version of P2020 it has following differences from P2020:
- 533MHz - 800MHz core frequency.
- 256Kbyte L2 cache
- Ethernet controllers with classification capabilities(new controller).

From board perspective P1020RDB is same as P2020RDB.
Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

It appears that QE shuts down on all MPC85xx CPUs (i.e. MPC8568 and
MPC8569) and thus needs reset upon resume.

So modify qe_alive_during_sleep() to account that.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

For MPC8569 CPUs we'll need to reset QE after each suspend, so make
qe_reset() code path suitable for repeated invocation, that is:

- Don't initialize rheap structures if already initialized;
- Don't allocate muram for SDMA if already allocated, just reinitialize
  registers with previously allocated muram offset;
- Remove __init attributes from qe_reset() and cpm_muram_init();
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This patch creates the dts files for each core and splits the devices
between the two cores for P2020RDB.

core0 has memory, L2, i2c, spi, dma1, usb, eth0, eth1, crypto,
		global-util, pci0,
core1 has L2, dma2, eth0, pci1, msi.

MPIC is shared between two cores but each core will protect its
interrupts from other core by using "protected-sources" of mpic.
Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This is needed to avoid #ifdefs in MPC85xx suspend/resume code.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

MPC8569 CPUs have four QE RISCs, so we need to increase MAX_QE_RISC
constant, otherwise qe_upload_firmware() fails at sanity checking.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

pasemi_defconfig hasn't been updated for a year.

Mostly a refresh of defaults, but this also disables 64K pages.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>

Use a definition for the cmpxchg SWI instead of hard-coding the number.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Acked-by: NNicolas Pitre <nico@fluxnic.net>

Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
Signed-off-by: NAndreas Herrmann <andreas.herrmann3@amd.com>
LKML-Reference: <20091029134552.GC30802@alberich.amd.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

We need to free the buff and lli nodes if the buffer queue is
not CIRCULAR.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

buffdone callback should be called per buffer request with pointer
to the latest serviced request.
'next' should point to the one next to currently active.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Some devices don't seem to work if the source and desitnation transfer
widths are not same. For example, SPI dma xfers, with 8bits/word,
don't work without this patch.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Replace s3c64xx_dma_tcirq and s3c64xx_dma_errirq with the common
s3c64xx_dma_buffdone.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Ensure the DMA buffer points are not updated from
another source during the process of enquing a buffer.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
[ben-linux@fluff.org: Updated patch comment]
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

The recent changes to arch/arm/mach-s3c6400/include/mach/dma.h have
left an out of date comment in there as well as accidentally changing
the type of the function.

Fix the commit 54489cd4Signed-off-by: NBen Dooks <ben-linux@fluff.org>

This patch removes the duplicated s3c_dma_has_circular() definition and so fixes
compilation for S3C64xx.
Signed-off-by: NMaurus Cuelenaere <mcuelenaere@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

The WM835x has some GPIOs on it, allocate some space so we can use
them with gpiolib.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

When used with the WM1190-EV1 board we can use the internal pull up
resistor of the CPU to provide the required pull for the IRQ line.
Without this interrupts from the WM835x don't work in the default
WM1190-EV1 hardwaer configuration.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

SPIN_LOCK_UNLOCKED is deprecated. Use __SPIN_LOCK_UNLOCKED instead.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: linux-sh@vger.kernel.org
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The icache may also contain aliases so we must account for them just
like we do when manipulating the dcache. We usually get away with
aliases in the icache because the instructions that are read from memory
are read-only, i.e. they never change. However, the place where this
bites us is when the code has been modified.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Otherwise we try to sleep with preemption disabled, etc.

Noticed by Thomas Gleixner.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

- Fix a comment string
- Fix a typo of $(suffix-y)
Signed-off-by: NHirokazu Takata <takata@linux-m32r.org>

The existing test always failed since 'no' was always greater than
0x7ff.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>