1. 09 1月, 2013 1 次提交
  2. 09 12月, 2012 1 次提交
  3. 04 12月, 2012 1 次提交
  4. 12 11月, 2012 2 次提交
  5. 05 11月, 2012 1 次提交
  6. 04 11月, 2012 3 次提交
  7. 01 11月, 2012 1 次提交
  8. 26 10月, 2012 1 次提交
  9. 20 9月, 2012 1 次提交
    • M
      r8169: use unlimited DMA burst for TX · aee77e4a
      Michal Schmidt 提交于
      The r8169 driver currently limits the DMA burst for TX to 1024 bytes. I have
      a box where this prevents the interface from using the gigabit line to its full
      potential. This patch solves the problem by setting TX_DMA_BURST to unlimited.
      
      The box has an ASRock B75M motherboard with on-board RTL8168evl/8111evl
      (XID 0c900880). TSO is enabled.
      
      I used netperf (TCP_STREAM test) to measure the dependency of TX throughput
      on MTU. I did it for three different values of TX_DMA_BURST ('5'=512, '6'=1024,
      '7'=unlimited). This chart shows the results:
      http://michich.fedorapeople.org/r8169/r8169-effects-of-TX_DMA_BURST.png
      
      Interesting points:
       - With the current DMA burst limit (1024):
         - at the default MTU=1500 I get only 842 Mbit/s.
         - when going from small MTU, the performance rises monotonically with
           increasing MTU only up to a peak at MTU=1076 (908 MBit/s). Then there's
           a sudden drop to 762 MBit/s from which the throughput rises monotonically
           again with further MTU increases.
       - With a smaller DMA burst limit (512):
         - there's a similar peak at MTU=1076 and another one at MTU=564.
       - With unlimited DMA burst:
         - at the default MTU=1500 I get nice 940 Mbit/s.
         - the throughput rises monotonically with increasing MTU with no strange
           peaks.
      
      Notice that the peaks occur at MTU sizes that are multiples of the DMA burst
      limit plus 52. Why 52? Because:
        20 (IP header) + 20 (TCP header) + 12 (TCP options) = 52
      
      The Realtek-provided r8168 driver (v8.032.00) uses unlimited TX DMA burst too,
      except for CFG_METHOD_1 where the TX DMA burst is set to 512 bytes.
      CFG_METHOD_1 appears to be the oldest MAC version of "RTL8168B/8111B",
      i.e. RTL_GIGA_MAC_VER_11 in r8169. Not sure if this MAC version really needs
      the smaller burst limit, or if any other versions have similar requirements.
      Signed-off-by: NMichal Schmidt <mschmidt@redhat.com>
      Acked-by: NFrancois Romieu <romieu@fr.zoreil.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      aee77e4a
  10. 01 9月, 2012 1 次提交
  11. 24 8月, 2012 2 次提交
  12. 24 7月, 2012 1 次提交
  13. 18 7月, 2012 2 次提交
  14. 10 7月, 2012 7 次提交
  15. 23 6月, 2012 1 次提交
    • F
      r8169: RxConfig hack for the 8168evl. · eb2dc35d
      françois romieu 提交于
      The 8168evl (RTL_GIGA_MAC_VER_34) based Gigabyte GA-990FXA motherboards
      are very prone to NETDEV watchdog problems without this change. See
      https://bugzilla.kernel.org/show_bug.cgi?id=42899 for instance.
      
      I don't know why it *works*. It's depressingly effective though.
      
      For the record:
      - the problem may go along IOMMU (AMD-Vi) errors but it really looks
        like a red herring.
      - the patch sets the RX_MULTI_EN bit. If the 8168c doc is any guide,
        the chipset now fetches several Rx descriptors at a time.
      - long ago the driver ignored the RX_MULTI_EN bit.
        e542a226 changed the RxConfig
        settings. Whatever the problem it's now labeled a regression.
      - Realtek's own driver can identify two different 8168evl devices
        (CFG_METHOD_16 and CFG_METHOD_17) where the r8169 driver only
        sees one. It sucks.
      Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      eb2dc35d
  16. 11 6月, 2012 1 次提交
    • F
      r8169: avoid NAPI scheduling delay. · 7dbb4918
      françois romieu 提交于
      While reworking the r8169 driver a few months ago to perform the
      smallest amount of work in the irq handler, I took care of avoiding
      any irq mask register operation in the slow work dedicated user
      context thread. The slow work thread scheduled an extra round of NAPI
      work which would ultimately set the irq mask register as required,
      thus keeping such irq mask operations in the NAPI handler.
      It would eventually race with the irq handler and delay NAPI execution
      for - assuming no further irq - a whole ksoftirqd period. Mildly a
      problem for rare link changes or corner case PCI events.
      
      The race was always lost after the last bh disabling lock had been
      removed from the work thread and people started wondering where those
      pesky "NOHZ: local_softirq_pending 08" messages came from.
      
      Actually the irq mask register _can_ be set up directly in the slow
      work thread.
      Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
      Reported-by: NDave Jones <davej@redhat.com>
      Tested-by: NMarc Dionne <marc.c.dionne@gmail.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Hayes Wang <hayeswang@realtek.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      7dbb4918
  17. 02 6月, 2012 1 次提交
  18. 09 5月, 2012 1 次提交
  19. 17 4月, 2012 7 次提交
  20. 04 4月, 2012 2 次提交
  21. 29 3月, 2012 1 次提交
  22. 28 3月, 2012 1 次提交