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  1. 01 11月, 2015 1 次提交
  3. 27 10月, 2015 2 次提交
  5. 26 10月, 2015 1 次提交
    • Y
      gpio: driver for AMD Promontory · 6057d40f
      由 YD Tseng 提交于 
      This patch adds a new GPIO driver for AMD Promontory chip.

This GPIO controller is enumerated by ACPI and the ACPI compliant
hardware ID is AMDF030.

Change history:

v2: 1. fix coding style
    2. registers renaming
v3: 1. change include file
    2. fix coding style
    3. remove module_init/exit, add module_platform_driver
    4. remove MODULE_ALIAS
v4: 1. change TOTAL_GPIO_PINS to PT_TOTAL_GPIO
    2. remove PCI dependency in Kconfig
    3. fix subject line
Signed-off-by: NYD Tseng <Yd_Tseng@asmedia.com.tw>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      6057d40f
  7. 22 10月, 2015 1 次提交
  9. 19 10月, 2015 1 次提交
  11. 02 10月, 2015 2 次提交
  13. 14 9月, 2015 1 次提交
  15. 13 8月, 2015 1 次提交
    • G
      gpio: brcmstb: Add interrupt and wakeup source support · 19a7b694
      由 Gregory Fong 提交于 
      Uses the gpiolib irqchip helpers.  For this to work, the irq setup
function is called once per bank instead of once per device.  Note
that all known uses of this block have a BCM7120 L2 interrupt
controller as a parent.  Supports interrupts for all GPIOs.

In the IRQ handler, we check for raised IRQs for invalid GPIOs and
warn (ratelimited) if they're encountered.

Also, several drivers (e.g. gpio-keys) allow for GPIOs to be
configured as wakeup sources, and this GPIO controller supports that
through a separate interrupt path.

The de-facto standard DT property "wakeup-source" is checked, since
that indicates whether the GPIO controller hardware can wake.  Uses
the IRQCHIP_MASK_ON_SUSPEND irq_chip flag because UPG GIO doesn't have
any of its own wakeup source configuration.

Aside regarding gpiolib irqchip helpers: It wasn't obvious (to me)
that you can have multiple chained irqchips and associated IRQ domains
for a single parent IRQ, and as long as the xlate function is written
correctly, a GPIO IRQ request end up checking the correct domain and
will get associated with the correct IRQ.  What helps make this clear
is to read
  drivers/gpio/gpiolib-of.c:
   - of_gpiochip_find_and_xlate()
   - of_get_named_gpiod_flags()
  drivers/gpio/gpiolib.c:
   - gpiochip_find()
Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com>
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      19a7b694
  17. 03 8月, 2015 1 次提交
  19. 16 7月, 2015 3 次提交
  21. 10 6月, 2015 2 次提交
  23. 02 6月, 2015 1 次提交
    • G
      gpio: Add GPIO support for Broadcom STB SoCs · 3b0213d5
      由 Gregory Fong 提交于 
      This adds support for the GPIO IP "UPG GIO" used on
Broadcom STB SoCs (BCM7XXX and some others). Uses
basic_mmio_gpio to instantiate a gpio_chip for each bank.
The driver assumes that it handles the base set of GPIOs
on the system and that it can start its numbering sequence
from 0, so any GPIO expanders used with it must dynamically
assign GPIO numbers after this driver has finished
registering its GPIOs.

Does not implement the interrupt-controller portion yet,
will be done in a future commit.

v2:
- change include to use <linux/gpio/driver.h> instead of
  <linux/gpio.h>
- get rid of unnecessary imask member in struct bank
- rename GPIO_PER_BANK -> MAX_GPIO_PER_BANK
- always have 32 GPIOs per bank and add 'width' member in
  struct bank to hold actual number of GPIOs in use
- mark of_match table as const
List-usage-fixed-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      3b0213d5
  25. 06 5月, 2015 2 次提交
  27. 05 5月, 2015 1 次提交
  29. 09 4月, 2015 1 次提交
    • L
      gpio: dwapb: remove dependencies · 549c5dc1
      由 Linus Walleij 提交于 
      The Synopsys DesignWare DWAPB GPIO block is popular to
synthesize amongst many architectures: X86, ARM, ARC.
The driver was restricted to only these archs due to
using [read|write]l_relaxed() accessors that were not
universally available in the past,
but as of commit 9439eb3a
"asm-generic: io: implement relaxed accessor macros as
conditional wrappers" these accessors are available on all
archs so this should not be a problem any more. Enable the
driver for all archs.

Cc: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      549c5dc1
  31. 08 4月, 2015 9 次提交
  33. 07 4月, 2015 1 次提交
  35. 04 4月, 2015 1 次提交
  37. 28 3月, 2015 1 次提交
  39. 26 3月, 2015 1 次提交
  41. 19 3月, 2015 1 次提交
  43. 18 3月, 2015 2 次提交
  45. 09 3月, 2015 1 次提交
  47. 08 3月, 2015 1 次提交
    • T
      drivers/gpio: Altera soft IP GPIO driver · c5abbba9
      由 Tien Hock Loh 提交于 
      Adds a new driver for Altera soft GPIO IP. The driver is able to do
read/write and allows GPIO to be a interrupt controller.

Tested on Altera GHRD on interrupt handling and IO.

v10:
- Updated conflicting device tree parameters
- Removed unused headers
- Used macro instead of magic numbers for ngpio
- Code readability cleanup using ?: and temporal variables
- Removed leftover garbage and unnecessary function calls
- Checked bgpio_init but unusable because Altera GPIO may not
  be a multiple of 8 bits

v9:
- Removed duplicated initialization on set_type using temporals
  to improve code readability in calling generic_handle_irq
- Using ?: ternary to reduce code size

v8:
- Using for_each_set_bit
- Added const for struct definition
- Removed naggy pr_err
- Sort alpha header
- Remove unused macros
- Use fixed width data types instead of unsigned long
- Whitespace issue fixes
- Removed _relaxed function for better compatibility across different
  CPU
- Changed irq_create_mapping to platform_get_irq updated implementation
  to use gpiochip_irqchip_add
- Reserve interrupt-cells number 2 in device tree binding for future
  use
- Remove confusing sections on devicetree bindings
- Added tristate Kconfig help text

v7:
- Used dev_warn instead of pr_warn
- Clean up unnecesarry if else indentation

v6:
- Added irq_startup and irq_shutdown
- Changed bitwise clamping style
- Cleanup bitwise operation to improve readability change naming of
  mapped irqs from virq to mapped_irq

v5:
- Dispose irq_domain mapping correctly
- Update optional binding description in binding docs

v4:
- Added vendor prefix to devicetree binding for IP specific properties
  using MMIO GPIO helper library instead of manually map PIO to memory
- altera_gpio_chip inline struct documentation to kerneldoc
- Using dev_ print to print a better failure message

v2, v3:
- Do not reference NO_IRQ
- Updated irq_set_type to only allow the hardware configured irq type
Signed-off-by: NTien Hock Loh <thloh@altera.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      c5abbba9
  49. 04 3月, 2015 1 次提交