1. 22 5月, 2015 1 次提交
    • E
      sfc: protect filter table against use-after-free · 0d322413
      Edward Cree 提交于
      If MCDI timeouts are encountered during efx_ef10_filter_table_remove(),
      an FLR will be queued, but efx->filter_state will still be kfree()d.
      The queued FLR will then call efx_ef10_filter_table_restore(), which
      will try to use efx->filter_state. This previously caused a panic.
      This patch adds an rwsem to protect the existence of efx->filter_state,
      separately from the spinlock protecting its contents.  Users which can
      race against efx_ef10_filter_table_remove() should down_read this rwsem.
      Signed-off-by: NShradha Shah <sshah@solarflare.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      0d322413
  2. 10 5月, 2015 3 次提交
  3. 09 4月, 2015 2 次提交
  4. 23 7月, 2014 1 次提交
  5. 16 7月, 2014 1 次提交
  6. 13 2月, 2014 1 次提交
  7. 24 1月, 2014 1 次提交
  8. 13 12月, 2013 3 次提交
  9. 25 9月, 2013 1 次提交
    • J
      sfc: Remove extern from function prototypes · 00aef986
      Joe Perches 提交于
      There are a mix of function prototypes with and without extern
      in the kernel sources.  Standardize on not using extern for
      function prototypes.
      
      Function prototypes don't need to be written with extern.
      extern is assumed by the compiler.  Its use is as unnecessary as
      using auto to declare automatic/local variables in a block.
      Signed-off-by: NJoe Perches <joe@perches.com>
      00aef986
  10. 21 9月, 2013 1 次提交
    • B
      sfc: Allocate and link PIO buffers; map them with write-combining · 183233be
      Ben Hutchings 提交于
      Try to allocate a segment of PIO buffer to each TX channel.  If
      allocation fails, log an error but continue.
      
      PIO buffers must be mapped separately from the NIC registers, with
      write-combining enabled.  Where the host page size is 4K, we could
      potentially map each VI's registers and PIO buffer separately.
      However, this would add significant complexity, and we also need to
      support architectures such as POWER which have a greater page size.
      So make a single contiguous write-combining mapping after the
      uncacheable mapping, aligned to the host page size, and link PIO
      buffers there.  Where necessary, allocate additional VIs within
      the write-combining mapping purely for access to PIO buffers.
      
      Link all TX buffers to TX queues and the additional VIs in
      efx_ef10_dimension_resources() and in efx_ef10_init_nic() after
      an MC reboot.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      183233be
  11. 30 8月, 2013 2 次提交
  12. 28 8月, 2013 1 次提交
    • B
      sfc: Move MTD operations into efx_nic_type · 45a3fd55
      Ben Hutchings 提交于
      Merge the per-NIC-type MTD probe selection and struct efx_mtd_ops into
      struct efx_nic_type.  Move the implementations into the appropriate
      source files.
      
      Several NVRAM functions are now only called from MTD operations which
      are now implemented in the same file (falcon.c or mcdi.c).  There is no
      need for them to be extern, or to be defined at all if CONFIG_SFC_MTD
      is not enabled, so move them into the #ifdef CONFIG_SFC_MTD sections
      in those files.
      
      Most of the SPI-related definitions are also only used in falcon.c,
      so move them there.  Put the remainder of spi.h into nic.h (which
      previously included it).
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      45a3fd55
  13. 23 8月, 2013 1 次提交
  14. 22 8月, 2013 2 次提交
    • B
      sfc: Refactor queue teardown sequence to allow for EF10 flush behaviour · e42c3d85
      Ben Hutchings 提交于
      Currently efx_stop_datapath() will try to flush our DMA queues (if DMA
      is enabled), then finalise software and hardware state for each queue.
      However, for EF10 we must ask the MC to finalise each queue, which
      implicitly starts flushing it, and then wait for the flush events.
      We therefore need to delegate more of this to the NIC type.
      
      Combine all the hardware operations into a new NIC-type operation
      efx_nic_type::fini_dmaq, and call this before tearing down the
      software state and buffers for all the DMA queues.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      e42c3d85
    • B
      sfc: Remove efx_process_channel_now() · 514bedbc
      Ben Hutchings 提交于
      efx_process_channel_now() is unneeded since self-tests can rely on
      normal NAPI polling.  Remove it and all calls to it.
      
      efx_channel::work_pending and efx_channel_processed() are also
      unneeded (the latter being the same as efx_nic_eventq_read_ack()).
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      514bedbc
  15. 25 6月, 2013 1 次提交
  16. 08 3月, 2013 4 次提交
    • D
      sfc: allocate more RX buffers per page · 1648a23f
      Daniel Pieczko 提交于
      Allocating 2 buffers per page is insanely inefficient when MTU is 1500
      and PAGE_SIZE is 64K (as it usually is on POWER).  Allocate as many as
      we can fit, and choose the refill batch size at run-time so that we
      still always use a whole page at once.
      
      [bwh: Fix loop condition to allow for compound pages; rebase]
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      1648a23f
    • B
      sfc: Enable RX DMA scattering where possible · 85740cdf
      Ben Hutchings 提交于
      Enable RX DMA scattering iff an RX buffer large enough for the current
      MTU will not fit into a single page and the NIC supports DMA
      scattering for kernel-mode RX queues.
      
      On Falcon and Siena, the RX_USR_BUF_SIZE field is used as the DMA
      limit for both all RX queues with scatter enabled.  Set it to 1824,
      matching what Onload uses now.
      
      Maintain a statistic for frames truncated due to lack of descriptors
      (rx_nodesc_trunc).  This is distinct from rx_frm_trunc which may be
      incremented when scattering is disabled and implies an over-length
      frame.
      
      Whenever an MTU change causes scattering to be turned on or off,
      update filters that point to the PF queues, but leave others
      unchanged, as VF drivers assume scattering is off.
      
      Add n_frags parameters to various functions, and make them iterate:
      - efx_rx_packet()
      - efx_recycle_rx_buffers()
      - efx_rx_mk_skb()
      - efx_rx_deliver()
      
      Make efx_handle_rx_event() responsible for updating
      efx_rx_queue::removed_count.
      
      Change the RX pipeline state to a starting ring index and number of
      fragments, and make __efx_rx_packet() responsible for clearing it.
      
      Based on earlier versions by David Riddoch and Jon Cooper.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      85740cdf
    • B
      sfc: Wrap __efx_rx_packet() with efx_rx_flush_packet() · ff734ef4
      Ben Hutchings 提交于
      The pipeline mechanism will need to change a bit for scattered
      packets.  Add a wrapper to insulate efx_process_channel() from this.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      ff734ef4
    • A
      sfc: Remove rx_alloc_method SKB · 97d48a10
      Alexandre Rames 提交于
      [bwh: Remove more dead code, and make efx_ptp_rx() pull the data it
       needs into the header area.]
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      97d48a10
  17. 07 3月, 2013 1 次提交
  18. 01 12月, 2012 1 次提交
  19. 08 9月, 2012 1 次提交
  20. 02 8月, 2012 1 次提交
    • B
      sfc: Fix maximum number of TSO segments and minimum TX queue size · 7e6d06f0
      Ben Hutchings 提交于
      Currently an skb requiring TSO may not fit within a minimum-size TX
      queue.  The TX queue selected for the skb may stall and trigger the TX
      watchdog repeatedly (since the problem skb will be retried after the
      TX reset).  This issue is designated as CVE-2012-3412.
      
      Set the maximum number of TSO segments for our devices to 100.  This
      should make no difference to behaviour unless the actual MSS is less
      than about 700.  Increase the minimum TX queue size accordingly to
      allow for 2 worst-case skbs, so that there will definitely be space
      to add an skb after we wake a queue.
      
      To avoid invalidating existing configurations, change
      efx_ethtool_set_ringparam() to fix up values that are too small rather
      than returning -EINVAL.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      7e6d06f0
  21. 07 3月, 2012 1 次提交
  22. 16 2月, 2012 1 次提交
    • B
      sfc: Add support for 'extra' channel types · 7f967c01
      Ben Hutchings 提交于
      Abstract some of the channel operations to allow for 'extra'
      channels that do not have RX or TX queues.
      
      - Try to assign a channel to each extra channel type that is enabled
        for the NIC, but gracefully degrade if we can't allocate sufficient
        MSI-X vectors
      - Allow each extra channel type to generate its own channel name
      - Allow channel types to disable reallocation and reinitialisation
        of their channels
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      7f967c01
  23. 27 1月, 2012 2 次提交
    • B
      sfc: Replace efx_rx_buffer::is_page and other booleans with a flags field · db339569
      Ben Hutchings 提交于
      Replace checksummed and discard booleans from efx_handle_rx_event()
      with a bitmask, added to the flags field.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      db339569
    • B
      sfc: Clean up test interrupt handling · 1646a6f3
      Ben Hutchings 提交于
      Interrupts are normally generated by the event queues, moderated by
      timers.  However, they may also be triggered by detection of a 'fatal'
      error condition (e.g. memory parity error) or by the host writing to
      certain CSR fields as part of a self-test.
      
      The IRQ level/index used for these on Falcon rev B0 and Siena is set
      by the KER_INT_LEVE_SEL field and cached by the driver in
      efx_nic::fatal_irq_level.  Since this value is also relevant to
      self-tests rename the field to just 'irq_level'.
      
      Avoid unnecessary cache traffic by using a per-channel 'last_irq_cpu'
      field and only writing to the per-controller field when the interrupt
      matches efx_nic::irq_level.  Remove the volatile qualifier and use
      ACCESS_ONCE in the places we read these fields.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      1646a6f3
  24. 05 1月, 2012 3 次提交
  25. 07 12月, 2011 1 次提交
  26. 17 9月, 2011 2 次提交