1. 29 8月, 2013 1 次提交
  2. 28 8月, 2013 5 次提交
    • P
      KVM: PPC: Book3S PR: Make instruction fetch fallback work for system calls · 8b23de29
      Paul Mackerras 提交于
      It turns out that if we exit the guest due to a hcall instruction (sc 1),
      and the loading of the instruction in the guest exit path fails for any
      reason, the call to kvmppc_ld() in kvmppc_get_last_inst() fetches the
      instruction after the hcall instruction rather than the hcall itself.
      This in turn means that the instruction doesn't get recognized as an
      hcall in kvmppc_handle_exit_pr() but gets passed to the guest kernel
      as a sc instruction.  That usually results in the guest kernel getting
      a return code of 38 (ENOSYS) from an hcall, which often triggers a
      BUG_ON() or other failure.
      
      This fixes the problem by adding a new variant of kvmppc_get_last_inst()
      called kvmppc_get_last_sc(), which fetches the instruction if necessary
      from pc - 4 rather than pc.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      8b23de29
    • P
      KVM: PPC: Book3S PR: Don't corrupt guest state when kernel uses VMX · 9d1ffdd8
      Paul Mackerras 提交于
      Currently the code assumes that once we load up guest FP/VSX or VMX
      state into the CPU, it stays valid in the CPU registers until we
      explicitly flush it to the thread_struct.  However, on POWER7,
      copy_page() and memcpy() can use VMX.  These functions do flush the
      VMX state to the thread_struct before using VMX instructions, but if
      this happens while we have guest state in the VMX registers, and we
      then re-enter the guest, we don't reload the VMX state from the
      thread_struct, leading to guest corruption.  This has been observed
      to cause guest processes to segfault.
      
      To fix this, we check before re-entering the guest that all of the
      bits corresponding to facilities owned by the guest, as expressed
      in vcpu->arch.guest_owned_ext, are set in current->thread.regs->msr.
      Any bits that have been cleared correspond to facilities that have
      been used by kernel code and thus flushed to the thread_struct, so
      for them we reload the state from the thread_struct.
      
      We also need to check current->thread.regs->msr before calling
      giveup_fpu() or giveup_altivec(), since if the relevant bit is
      clear, the state has already been flushed to the thread_struct and
      to flush it again would corrupt it.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      9d1ffdd8
    • P
      KVM: PPC: Book3S: Fix compile error in XICS emulation · 7bfa9ad5
      Paul Mackerras 提交于
      Commit 8e44ddc3 ("powerpc/kvm/book3s: Add support for H_IPOLL and
      H_XIRR_X in XICS emulation") added a call to get_tb() but didn't
      include the header that defines it, and on some configs this means
      book3s_xics.c fails to compile:
      
      arch/powerpc/kvm/book3s_xics.c: In function ‘kvmppc_xics_hcall’:
      arch/powerpc/kvm/book3s_xics.c:812:3: error: implicit declaration of function ‘get_tb’ [-Werror=implicit-function-declaration]
      
      Cc: stable@vger.kernel.org [v3.10, v3.11]
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      7bfa9ad5
    • T
      KVM: PPC: Book3S PR: return appropriate error when allocation fails · 7c7b406e
      Thadeu Lima de Souza Cascardo 提交于
      err was overwritten by a previous function call, and checked to be 0. If
      the following page allocation fails, 0 is going to be returned instead
      of -ENOMEM.
      Signed-off-by: NThadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      7c7b406e
    • C
      arch: powerpc: kvm: add signed type cast for comparation · 5d226ae5
      Chen Gang 提交于
      'rmls' is 'unsigned long', lpcr_rmls() will return negative number when
      failure occurs, so it need a type cast for comparing.
      
      'lpid' is 'unsigned long', kvmppc_alloc_lpid() return negative number
      when failure occurs, so it need a type cast for comparing.
      Signed-off-by: NChen Gang <gang.chen@asianux.com>
      Acked-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      5d226ae5
  3. 26 8月, 2013 1 次提交
  4. 23 8月, 2013 1 次提交
  5. 25 7月, 2013 1 次提交
  6. 18 7月, 2013 1 次提交
  7. 11 7月, 2013 2 次提交
  8. 10 7月, 2013 2 次提交
    • P
      KVM: PPC: Book3S HV: Allow negative offsets to real-mode hcall handlers · 4baa1d87
      Paul Mackerras 提交于
      The table of offsets to real-mode hcall handlers in book3s_hv_rmhandlers.S
      can contain negative values, if some of the handlers end up before the
      table in the vmlinux binary.  Thus we need to use a sign-extending load
      to read the values in the table rather than a zero-extending load.
      Without this, the host crashes when the guest does one of the hcalls
      with negative offsets, due to jumping to a bogus address.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      4baa1d87
    • P
      KVM: PPC: Book3S HV: Correct tlbie usage · 54480501
      Paul Mackerras 提交于
      This corrects the usage of the tlbie (TLB invalidate entry) instruction
      in HV KVM.  The tlbie instruction changed between PPC970 and POWER7.
      On the PPC970, the bit to select large vs. small page is in the instruction,
      not in the RB register value.  This changes the code to use the correct
      form on PPC970.
      
      On POWER7 we were calculating the AVAL (Abbreviated Virtual Address, Lower)
      field of the RB value incorrectly for 64k pages.  This fixes it.
      
      Since we now have several cases to handle for the tlbie instruction, this
      factors out the code to do a sequence of tlbies into a new function,
      do_tlbies(), and calls that from the various places where the code was
      doing tlbie instructions inline.  It also makes kvmppc_h_bulk_remove()
      use the same global_invalidates() function for determining whether to do
      local or global TLB invalidations as is used in other places, for
      consistency, and also to make sure that kvm->arch.need_tlb_flush gets
      updated properly.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      54480501
  9. 08 7月, 2013 4 次提交
  10. 30 6月, 2013 7 次提交
    • A
      KVM: PPC: Ignore PIR writes · a3ff5fbc
      Alexander Graf 提交于
      While technically it's legal to write to PIR and have the identifier changed,
      we don't implement logic to do so because we simply expose vcpu_id to the guest.
      
      So instead, let's ignore writes to PIR. This ensures that we don't inject faults
      into the guest for something the guest is allowed to do. While at it, we cross
      our fingers hoping that it also doesn't mind that we broke its PIR read values.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      a3ff5fbc
    • P
      KVM: PPC: Book3S PR: Invalidate SLB entries properly · 681562cd
      Paul Mackerras 提交于
      At present, if the guest creates a valid SLB (segment lookaside buffer)
      entry with the slbmte instruction, then invalidates it with the slbie
      instruction, then reads the entry with the slbmfee/slbmfev instructions,
      the result of the slbmfee will have the valid bit set, even though the
      entry is not actually considered valid by the host.  This is confusing,
      if not worse.  This fixes it by zeroing out the orige and origv fields
      of the SLB entry structure when the entry is invalidated.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      681562cd
    • P
      KVM: PPC: Book3S PR: Allow guest to use 1TB segments · 0f296829
      Paul Mackerras 提交于
      With this, the guest can use 1TB segments as well as 256MB segments.
      Since we now have the situation where a single emulated guest segment
      could correspond to multiple shadow segments (as the shadow segments
      are still 256MB segments), this adds a new kvmppc_mmu_flush_segment()
      to scan for all shadow segments that need to be removed.
      
      This restructures the guest HPT (hashed page table) lookup code to
      use the correct hashing and matching functions for HPTEs within a
      1TB segment.  We use the standard hpt_hash() function instead of
      open-coding the hash calculation, and we use HPTE_V_COMPARE() with
      an AVPN value that has the B (segment size) field included.  The
      calculation of avpn is done a little earlier since it doesn't change
      in the loop starting at the do_second label.
      
      The computation in kvmppc_mmu_book3s_64_esid_to_vsid() changes so that
      it returns a 256MB VSID even if the guest SLB entry is a 1TB entry.
      This is because the users of this function are creating 256MB SLB
      entries.  We set a new VSID_1T flag so that entries created from 1T
      segments don't collide with entries from 256MB segments.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      0f296829
    • P
      KVM: PPC: Book3S PR: Don't keep scanning HPTEG after we find a match · 6ed1485f
      Paul Mackerras 提交于
      The loop in kvmppc_mmu_book3s_64_xlate() that looks up a translation
      in the guest hashed page table (HPT) keeps going if it finds an
      HPTE that matches but doesn't allow access.  This is incorrect; it
      is different from what the hardware does, and there should never be
      more than one matching HPTE anyway.  This fixes it to stop when any
      matching HPTE is found.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      6ed1485f
    • P
      KVM: PPC: Book3S PR: Fix invalidation of SLB entry 0 on guest entry · bc1bc4e3
      Paul Mackerras 提交于
      On entering a PR KVM guest, we invalidate the whole SLB before loading
      up the guest entries.  We do this using an slbia instruction, which
      invalidates all entries except entry 0, followed by an slbie to
      invalidate entry 0.  However, the slbie turns out to be ineffective
      in some circumstances (specifically when the host linear mapping uses
      64k pages) because of errors in computing the parameter to the slbie.
      The result is that the guest kernel hangs very early in boot because
      it takes a DSI the first time it tries to access kernel data using
      a linear mapping address in real mode.
      
      Currently we construct bits 36 - 43 (big-endian numbering) of the slbie
      parameter by taking bits 56 - 63 of the SLB VSID doubleword.  These bits
      for the tlbie are C (class, 1 bit), B (segment size, 2 bits) and 5
      reserved bits.  For the SLB VSID doubleword these are C (class, 1 bit),
      reserved (1 bit), LP (large page size, 2 bits), and 4 reserved bits.
      Thus we are not setting the B field correctly, and when LP = 01 as
      it is for 64k pages, we are setting a reserved bit.
      
      Rather than add more instructions to calculate the slbie parameter
      correctly, this takes a simpler approach, which is to set entry 0 to
      zeroes explicitly.  Normally slbmte should not be used to invalidate
      an entry, since it doesn't invalidate the ERATs, but it is OK to use
      it to invalidate an entry if it is immediately followed by slbia,
      which does invalidate the ERATs.  (This has been confirmed with the
      Power architects.)  This approach takes fewer instructions and will
      work whatever the contents of entry 0.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      bc1bc4e3
    • P
      KVM: PPC: Book3S PR: Fix proto-VSID calculations · 8ed7b7e9
      Paul Mackerras 提交于
      This makes sure the calculation of the proto-VSIDs used by PR KVM
      is done with 64-bit arithmetic.  Since vcpu3s->context_id[] is int,
      when we do vcpu3s->context_id[0] << ESID_BITS the shift will be done
      with 32-bit instructions, possibly leading to significant bits
      getting lost, as the context id can be up to 524283 and ESID_BITS is
      18.  To fix this we cast the context id to u64 before shifting.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      8ed7b7e9
    • T
      KVM: PPC: Guard doorbell exception with CONFIG_PPC_DOORBELL · 5f17ce8b
      Tiejun Chen 提交于
      Availablity of the doorbell_exception function is guarded by
      CONFIG_PPC_DOORBELL. Use the same define to guard our caller
      of it.
      Signed-off-by: NTiejun Chen <tiejun.chen@windriver.com>
      [agraf: improve patch description]
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      5f17ce8b
  11. 21 6月, 2013 3 次提交
  12. 19 6月, 2013 1 次提交
  13. 11 6月, 2013 4 次提交
  14. 01 6月, 2013 1 次提交
  15. 19 5月, 2013 1 次提交
  16. 02 5月, 2013 5 次提交