Commit 7f107887 ("ARM: dts: imx: Remove skeleton.dtsi") causes boot
issues when the bootloader does not create a 'chosen' node if such node
is not present in the dtb.

The reason for the boot failure is well explained by Javier Martinez
Canillas: "the decompressor relies on a pre-existing chosen node to be
available to insert the command line and merge other ATAGS info."

, so pass an empty 'chosen' node to fix the boot problem.

This issue has been seen in the kernelci reports with Barebox as
bootloader.

Also pass the 'memory' node in order to fix boot issues on the SolidRun
iMX6 platforms.

Fixes: 7f107887 ("ARM: dts: imx: Remove skeleton.dtsi")
Reported-by: Nkernelci.org bot <bot@kernelci.org>
Reported-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

As explained by commit 9c0da3cc ("ARM: dts: explicitly mark
skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated.

This fixes the following warning with W=1:

Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Fixed code indent tabs in respetcive imx23, imx51, imx53, imx6dl, imx6q
and imx6sx dtsi and dts files.
Signed-off-by: NJagan Teki <jagan@openedev.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The chipidea driver adds an extra line of spam to the log when a
host-only chipidea instance is left set to the default of a dual role
controller.

[    2.010873] ci_hdrc ci_hdrc.1: doesn't support gadget

Set the dr_mode property to host on all the host-only nodes
to avoid this warning.
Signed-off-by: NMatt Porter <mporter@konsulko.com>
Acked-by: NPeter Chen <peter.chen@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

SSI block has 'ipg' clock for internal peripheral access and also 'baud' clock
for generating bit clock when SSI operates in master mode.

Add the extra 'baud' clock so that we can have SSI functional in master mode.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

This patch adds simple-card support to the i.MX SoCs.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

All imx5*.dtsi files define the generic dma bindings. Drop the old
non-generic fsl,ssi-dma-events.
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

This patch allow to define partitions onto NFC in user defined
devicetrees.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

Add alias for FEC ethernet on i.MX to allow bootloaders (like U-Boot)
patch-in the MAC address for FEC using this alias.
Signed-off-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Per bindings of fixed-clock, #clock-cells is a required property.  Let's
add it for those fixed rate clocks.
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>

This patch connects IPU and and parallel display device tree
nodes using the OF graph bindings described in
Documentation/devicetree/bindings/media/video-interfaces.txt

The IPU ports correspond to the two display interfaces. The
order of endpoints in the ports is arbitrary.

Since the imx-drm node now only needs to contain links to the
display interfaces, it can be moved to the SoC dtsi level. At
the board level, only connections between the display interface
ports and panels have to be added.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

usbphy0 is not a part of AIPS1, so move this node under root.
Additionally this patch removes useless "status" property.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

For better readability and no need to look up numbers
in the documentation anymore.
Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds dummy clock for AUDMUX. This change avoids useless
debug message "cannot get clock" during driver initialization.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch updates i.MX51 CPU node:
- Alias for CPU is added to allow using this node in the parent DTS files.
- Removed useless "clock_names" property.
- "clock-latency" value increased to safe using with 32 kHz OSC.
- Defined operating points voltages and "voltage tolerance" properties.
  Values are safe for both commercial and industrial CPU variants.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that
boards that share the same pinctrl setting do not have to define it time
and time again in <board>.dts.  However, along with the devices and use
cases being added continuously, the pinctrl setting nodes under iomuxc
becomes more than expected.  This bloats device tree blob for particular
board unnecessarily since only a small subset of those pinctrl setting
nodes will be used by the board.  It impacts not only the DTB file size
but also the run-time device tree lookup efficiency.

The patch moves all the pinctrl data into individual boards as needed.
With the changes, the pinctrl setting nodes becomes local to particular
board, and it makes no sense to continue numbering the setting for
given peripheral.  Thus, all the pinctrl phandler name gets updated to
have only peripheral name in there.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This reverts commit b1d27c79.

Previously we switched the SSI scriprt to dual-fifo mode to reduce playback
underrun issue, which is only included by SDMA firmware version 2. However,
there are quite a lot people still using version 1 or default firmware in
the ROM code of SoC while these two kinds of firmwares do not support the
dual-fifo script and the audio function on their platform would be broken.

Thus this patch provisionally reverts the dual-fifo script to the original
single fifo script to meet all kinds of users' requirements, including the
version 1/2 or inner ROM firmware.
Reported-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NNicolin Chen <Guangyu.Chen@freescale.com>
Tested-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

Use dual-fifo sdma scripts instead of shared scripts for ssi on i.MX series.
Signed-off-by: NNicolin Chen <b42378@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

Proper clock ID for USB OTG PHY is "usb_phy_gate".
The patch changes this mismatch.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds the missing W1 (onewire) devicetree node for i.MX51 CPUs.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds the missing IRAM devicetree node for i.MX51 CPUs.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

RTS/CTS pins can be used for different purposes, so create separate
definitions for these pins.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Commit 718a3500 (ARM: i.MX51: Add PATA support) adds pata support to the
imx51.dtsi file and is using clock 161. The problem is that the right
clock is 172, according to commit 5d530bb0 (ARM: i.MX5: Add PATA and SRTC
clocks).  Using the clock 172 makes things work again (and kills a nasty
system freeze).
Tested-by: NSteev Klimaszewski <steev@gentoo.org>
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This adds one more I2C2 alternate pinmux entry.
GPIO1_2 <=> SCL
GPIO1_3 <=> SDA
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This unmix module/pin definitions and reduce indentation for pin
groups, so makes template a bit cleaner.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

External high frequency clock CKIH1 is optional for i.MX51, so move
it setup into boards where it is used.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Updates SSI nodes to adopt generic DMA bindings.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds the missing (Wireless External Interface Module) WEIM
devicetree node for i.MX51 CPUs.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add the #dma-cells property for all the sdma in all the imx platforms.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This adds pinmux entries for USBH1/2 in ULPI mode.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

For keeping the alphabetical order in the pinmux nodes.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This allows to order the i2c and spi devices correctly.
While at it reorder the aliases entries alphabetically.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NMichael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NMichael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NMichael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>