1. 24 11月, 2016 1 次提交
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      KVM: PPC: Book3S HV: Treat POWER9 CPU threads as independent subcores · 45c940ba
      Paul Mackerras 提交于
      With POWER9, each CPU thread has its own MMU context and can be
      in the host or a guest independently of the other threads; there is
      still however a restriction that all threads must use the same type
      of address translation, either radix tree or hashed page table (HPT).
      
      Since we only support HPT guests on a HPT host at this point, we
      can treat the threads as being independent, and avoid all of the
      work of coordinating the CPU threads.  To make this simpler, we
      introduce a new threads_per_vcore() function that returns 1 on
      POWER9 and threads_per_subcore on POWER7/8, and use that instead
      of threads_per_subcore or threads_per_core in various places.
      
      This also changes the value of the KVM_CAP_PPC_SMT capability on
      POWER9 systems from 4 to 1, so that userspace will not try to
      create VMs with multiple vcpus per vcore.  (If userspace did create
      a VM that thought it was in an SMT mode, the VM might try to use
      the msgsndp instruction, which will not work as expected.  In
      future it may be possible to trap and emulate msgsndp in order to
      allow VMs to think they are in an SMT mode, if only for the purpose
      of allowing migration from POWER8 systems.)
      
      With all this, we can now run guests on POWER9 as long as the host
      is running with HPT translation.  Since userspace currently has no
      way to request radix tree translation for the guest, the guest has
      no choice but to use HPT translation.
      Signed-off-by: NPaul Mackerras <paulus@ozlabs.org>
      45c940ba
  2. 16 9月, 2016 1 次提交
  3. 09 9月, 2016 1 次提交
  4. 19 8月, 2016 1 次提交
  5. 02 8月, 2016 1 次提交
  6. 01 7月, 2016 1 次提交
  7. 11 5月, 2016 1 次提交
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      KVM: PPC: Fix emulated MMIO sign-extension · eb8b0560
      Paul Mackerras 提交于
      When the guest does a sign-extending load instruction (such as lha
      or lwa) to an emulated MMIO location, it results in a call to
      kvmppc_handle_loads() in the host.  That function sets the
      vcpu->arch.mmio_sign_extend flag and calls kvmppc_handle_load()
      to do the rest of the work.  However, kvmppc_handle_load() sets
      the mmio_sign_extend flag to 0 unconditionally, so the sign
      extension never gets done.
      
      To fix this, we rename kvmppc_handle_load to __kvmppc_handle_load
      and add an explicit parameter to indicate whether sign extension
      is required.  kvmppc_handle_load() and kvmppc_handle_loads() then
      become 1-line functions that just call __kvmppc_handle_load()
      with the extra parameter.
      Reported-by: NBin Lu <lblulb@linux.vnet.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@ozlabs.org>
      Reviewed-by: NThomas Huth <thuth@redhat.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      eb8b0560
  8. 22 3月, 2016 1 次提交
  9. 02 3月, 2016 1 次提交
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      KVM: PPC: Add support for 64bit TCE windows · 58ded420
      Alexey Kardashevskiy 提交于
      The existing KVM_CREATE_SPAPR_TCE only supports 32bit windows which is not
      enough for directly mapped windows as the guest can get more than 4GB.
      
      This adds KVM_CREATE_SPAPR_TCE_64 ioctl and advertises it
      via KVM_CAP_SPAPR_TCE_64 capability. The table size is checked against
      the locked memory limit.
      
      Since 64bit windows are to support Dynamic DMA windows (DDW), let's add
      @bus_offset and @page_shift which are also required by DDW.
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      58ded420
  10. 29 2月, 2016 1 次提交
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      KVM: PPC: Book3S HV: Send IPI to host core to wake VCPU · e17769eb
      Suresh E. Warrier 提交于
      This patch adds support to real-mode KVM to search for a core
      running in the host partition and send it an IPI message with
      VCPU to be woken. This avoids having to switch to the host
      partition to complete an H_IPI hypercall when the VCPU which
      is the target of the the H_IPI is not loaded (is not running
      in the guest).
      
      The patch also includes the support in the IPI handler running
      in the host to do the wakeup by calling kvmppc_xics_ipi_action
      for the PPC_MSG_RM_HOST_ACTION message.
      
      When a guest is being destroyed, we need to ensure that there
      are no pending IPIs waiting to wake up a VCPU before we free
      the VCPUs of the guest. This is accomplished by:
      - Forces a PPC_MSG_CALL_FUNCTION IPI to be completed by all CPUs
        before freeing any VCPUs in kvm_arch_destroy_vm().
      - Any PPC_MSG_RM_HOST_ACTION messages must be executed first
        before any other PPC_MSG_CALL_FUNCTION messages.
      Signed-off-by: NSuresh Warrier <warrier@linux.vnet.ibm.com>
      Acked-by: NMichael Ellerman <mpe@ellerman.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      e17769eb
  11. 16 2月, 2016 1 次提交
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      KVM: PPC: Add support for multiple-TCE hcalls · d3695aa4
      Alexey Kardashevskiy 提交于
      This adds real and virtual mode handlers for the H_PUT_TCE_INDIRECT and
      H_STUFF_TCE hypercalls for user space emulated devices such as IBMVIO
      devices or emulated PCI. These calls allow adding multiple entries
      (up to 512) into the TCE table in one call which saves time on
      transition between kernel and user space.
      
      The current implementation of kvmppc_h_stuff_tce() allows it to be
      executed in both real and virtual modes so there is one helper.
      The kvmppc_rm_h_put_tce_indirect() needs to translate the guest address
      to the host address and since the translation is different, there are
      2 helpers - one for each mode.
      
      This implements the KVM_CAP_PPC_MULTITCE capability. When present,
      the kernel will try handling H_PUT_TCE_INDIRECT and H_STUFF_TCE if these
      are enabled by the userspace via KVM_CAP_PPC_ENABLE_HCALL.
      If they can not be handled by the kernel, they are passed on to
      the user space. The user space still has to have an implementation
      for these.
      
      Both HV and PR-syle KVM are supported.
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      d3695aa4
  12. 14 1月, 2016 1 次提交
  13. 21 10月, 2015 1 次提交
  14. 22 8月, 2015 1 次提交
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      KVM: PPC: Fix warnings from sparse · 5358a963
      Thomas Huth 提交于
      When compiling the KVM code for POWER with "make C=1", sparse
      complains about functions missing proper prototypes and a 64-bit
      constant missing the ULL prefix. Let's fix this by making the
      functions static or by including the proper header with the
      prototypes, and by appending a ULL prefix to the constant
      PPC_MPPE_ADDRESS_MASK.
      Signed-off-by: NThomas Huth <thuth@redhat.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      5358a963
  15. 28 5月, 2015 1 次提交
  16. 26 5月, 2015 1 次提交
  17. 07 5月, 2015 1 次提交
  18. 21 4月, 2015 1 次提交
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      KVM: PPC: Book3S HV: Add fast real-mode H_RANDOM implementation. · e928e9cb
      Michael Ellerman 提交于
      Some PowerNV systems include a hardware random-number generator.
      This HWRNG is present on POWER7+ and POWER8 chips and is capable of
      generating one 64-bit random number every microsecond.  The random
      numbers are produced by sampling a set of 64 unstable high-frequency
      oscillators and are almost completely entropic.
      
      PAPR defines an H_RANDOM hypercall which guests can use to obtain one
      64-bit random sample from the HWRNG.  This adds a real-mode
      implementation of the H_RANDOM hypercall.  This hypercall was
      implemented in real mode because the latency of reading the HWRNG is
      generally small compared to the latency of a guest exit and entry for
      all the threads in the same virtual core.
      
      Userspace can detect the presence of the HWRNG and the H_RANDOM
      implementation by querying the KVM_CAP_PPC_HWRNG capability.  The
      H_RANDOM hypercall implementation will only be invoked when the guest
      does an H_RANDOM hypercall if userspace first enables the in-kernel
      H_RANDOM implementation using the KVM_CAP_PPC_ENABLE_HCALL capability.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      e928e9cb
  19. 27 3月, 2015 1 次提交
  20. 24 3月, 2015 1 次提交
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      powerpc: Cleanup KVM emulated load/store endian handling · d078eed3
      David Gibson 提交于
      Sometimes the KVM code on powerpc needs to emulate load or store
      instructions from the guest, which can include both normal and byte
      reversed forms.
      
      We currently (AFAICT) handle this correctly, but some variable names are
      very misleading.  In particular we use "is_bigendian" in several places to
      actually mean "is the IO the same endian as the host", but we now support
      little-endian powerpc hosts.  This also ties into the misleadingly named
      ld_le*() and st_le*() functions, which in fact always byteswap, even on
      an LE host.
      
      This patch cleans this up by renaming to more accurate "host_swabbed", and
      uses the generic swab*() functions instead of the powerpc specific and
      misleadingly named ld_le*() and st_le*() functions.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Reviewed-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      d078eed3
  21. 23 1月, 2015 1 次提交
  22. 17 12月, 2014 1 次提交
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      KVM: PPC: Book3S HV: Remove code for PPC970 processors · c17b98cf
      Paul Mackerras 提交于
      This removes the code that was added to enable HV KVM to work
      on PPC970 processors.  The PPC970 is an old CPU that doesn't
      support virtualizing guest memory.  Removing PPC970 support also
      lets us remove the code for allocating and managing contiguous
      real-mode areas, the code for the !kvm->arch.using_mmu_notifiers
      case, the code for pinning pages of guest memory when first
      accessed and keeping track of which pages have been pinned, and
      the code for handling H_ENTER hypercalls in virtual mode.
      
      Book3S HV KVM is now supported only on POWER7 and POWER8 processors.
      The KVM_CAP_PPC_RMA capability now always returns 0.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      c17b98cf
  23. 22 9月, 2014 4 次提交
  24. 29 8月, 2014 2 次提交
  25. 22 8月, 2014 1 次提交
  26. 05 8月, 2014 1 次提交
    • P
      KVM: PPC: drop duplicate tracepoint · 478d6686
      Paolo Bonzini 提交于
      Commit 29577fc0 ("KVM: PPC: HV: Remove generic instruction emulation")
      caused a build failure with allyesconfig:
      
      arch/powerpc/kvm/kvm-pr.o:(__tracepoints+0xa8): multiple definition of `__tracepoint_kvm_ppc_instr'
      arch/powerpc/kvm/kvm.o:(__tracepoints+0x1c0): first defined here
      
      due to a duplicate definition of the tracepoint in trace.h and
      trace_pr.h.  Because the tracepoint is still used by Book3S HV
      code, and because the PR code does include trace.h, just remove
      the duplicate definition from trace_pr.h, and export it from
      kvm.o.
      Reported-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      478d6686
  27. 29 7月, 2014 2 次提交
  28. 28 7月, 2014 8 次提交