- 22 12月, 2020 1 次提交
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由 John Garry 提交于
As a performance enhancement, make the completion queue interrupts managed. In addition, in commit bf0beec0 ("blk-mq: drain I/O when all CPUs in a hctx are offline"), CPU hotplug for MQ devices using managed interrupts is made safe. So expose HW queues to blk-mq to take advantage of this. Flag Scsi_host.host_tagset is also set to ensure that the HBA is not sent more commands than it can handle. However the driver still does not use request tag for IPTT as there are many HW bugs means that special rules apply for IPTT allocation. Link: https://lore.kernel.org/r/1606905417-183214-6-git-send-email-john.garry@huawei.comSigned-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 01 12月, 2020 1 次提交
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由 Luo Jiaxing 提交于
Relocate all the debugfs code for DFX to v3 hw since no other versions support it. Link: https://lore.kernel.org/r/1606207594-196362-4-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 07 10月, 2020 1 次提交
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由 Xiang Chen 提交于
Add controller runtime PM support for v3 hw. Link: https://lore.kernel.org/r/1601649038-25534-4-git-send-email-john.garry@huawei.comSigned-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 06 10月, 2020 1 次提交
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由 John Garry 提交于
Now that the block layer provides a shared tag, we can switch the driver to expose all HW queues. Signed-off-by: NJohn Garry <john.garry@huawei.com> Tested-by: NDouglas Gilbert <dgilbert@interlog.com> Acked-by: NMartin K. Petersen <martin.petersen@oracle.com> Signed-off-by: NJens Axboe <axboe@kernel.dk>
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- 03 9月, 2020 2 次提交
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由 Luo Jiaxing 提交于
Through the new debugfs interface the user can select fixed code patterns. Add two new interfaces fixed_code and fixed_code1. Link: https://lore.kernel.org/r/1598958790-232272-7-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
Add BIST support for phy FFE (Feed forward equalizer) setting. The user can configure FFE through the new debugfs interface. FFE is a parameter used for link layer control. It will affect the link quality between the SAS controller and the backplane. In the BIST test, the FFE interface is provided to assist board testers in optimizing link parameters. The modification of the FFE parameter will affect the test after BIST or the normal running of the board. The user should save the initial FFE values and restore them after BIST test is complete. Link: https://lore.kernel.org/r/1598958790-232272-6-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 21 1月, 2020 2 次提交
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由 John Garry 提交于
In future we will want to use hisi_sas_cq.pci_irq_mask for non-pci interrupt masks, so rename to be more general. Link: https://lore.kernel.org/r/1579522957-4393-7-git-send-email-john.garry@huawei.comSigned-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
Currently IRQ_EFFECTIVE_AFF_MASK is enabled for ARM_GIC and ARM_GIC3, so it only allows a single target CPU in the affinity mask to process interrupts and also interrupt thread, and the performance of using threaded irq is almost the same as tasklet. But if the config is not enabled, the interrupt thread will be allowed all the CPUs in the affinity mask. At that situation it improves the performance (about 20%). Note: IRQ_EFFECTIVE_AFF_MASK is configured differently for different architecture chip, and it seems to be better to make it be configured easily. Link: https://lore.kernel.org/r/1579522957-4393-2-git-send-email-john.garry@huawei.comSigned-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 25 10月, 2019 14 次提交
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由 Luo Jiaxing 提交于
The number of phy down reflects the quality of the link between SAS controller and disk. In order to allow the user to confirm the link quality of the system, we record the number of phy down for each phy. The user can check the current phy down count by reading the debugfs file corresponding to the specific phy, or clear the phy down count by writing 0 to the debugfs file. Link: https://lore.kernel.org/r/1571926105-74636-19-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
We use the module parameter debugfs_dump_count to manage the upper limit of the memory block for multiple dumps. Link: https://lore.kernel.org/r/1571926105-74636-17-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
We still only use dump index #0 however. Link: https://lore.kernel.org/r/1571926105-74636-16-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
We add multiple dumps for debugfs, but only allocate memory this time and only dump #0. Link: https://lore.kernel.org/r/1571926105-74636-15-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
Create a file structure which was used to save the memory address for ITCT cache at debugfs. This structure is bound to the corresponding debugfs file, it can help callback function of debugfs file to get what it needs. Link: https://lore.kernel.org/r/1571926105-74636-14-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
Create a file structure which was used to save the memory address for IOST cache at debugfs. This structure is bound to the corresponding debugfs file, it can help callback function of debugfs file to get what it needs. Link: https://lore.kernel.org/r/1571926105-74636-13-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
Create a file structure which was used to save the memory address for ITCT at debugfs. This structure is bound to the corresponding debugfs file, it can help callback function of debugfs file to get what it needs. Link: https://lore.kernel.org/r/1571926105-74636-12-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
Create a file structure which was used to save the memory address for IOST at debugfs. This structure is bound to the corresponding debugfs file, it can help callback function of debugfs file to get what it needs. Link: https://lore.kernel.org/r/1571926105-74636-11-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
Create a file structure which was used to save the memory address and phy pointer for port at debugfs. This structure is bound to the corresponding debugfs file, it can help callback function of debugfs file to get what it need. Link: https://lore.kernel.org/r/1571926105-74636-10-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
Create a file structure which was used to save the memory address and hisi_hba pointer for REGS at debugfs. This structure is bound to the corresponding debugfs file, it can help callback function of debugfs file to get what it need. Link: https://lore.kernel.org/r/1571926105-74636-9-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
Create a file structure which was used to save the memory address and DQ pointer for DQ at debugfs. This structure is bound to the corresponding debugfs file, it can help callback function of debugfs file to get what it need. Link: https://lore.kernel.org/r/1571926105-74636-8-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
Create a file structure which was used to save the memory address and CQ pointer for CQ at debugfs. This structure is bound to the corresponding debugfs file, it can help callback function of debugfs file to get what it need. Link: https://lore.kernel.org/r/1571926105-74636-7-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
It's useful to know when the dump occurred, so add a timestamp file for this. Link: https://lore.kernel.org/r/1571926105-74636-6-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
When injecting 2bit ecc errors, it will cause confusion inside SAS controller which needs host reset to recover it. If a device is gone at the same times inject 2bit ecc errors, we may not receive the ITCT interrupt so it will wait for completion in clear_itct_v3_hw() all the time. And host reset will also not occur because it can't require hisi_hba->sem, so the system will be suspended. To solve the issue, use wait_for_completion_timeout() instead of wait_for_completion(), and also don't mark the gone device as SAS_PHY_UNUSED when device gone. Link: https://lore.kernel.org/r/1571926105-74636-4-git-send-email-john.garry@huawei.comSigned-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 11 9月, 2019 5 次提交
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由 Xiang Chen 提交于
Add BIST (built in self test) support for phy loopback. Through the new debugfs interface, the user can configure loopback mode/linkrate/phy id/code mode before enabling it. And also user can enable/disable BIST function. Link: https://lore.kernel.org/r/1567774537-20003-13-git-send-email-john.garry@huawei.comSigned-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
Some function arguments are unused, so remove them. Also move the timeout print in for wait_cmds_complete_timeout_vX_hw() callsites into that same function. Link: https://lore.kernel.org/r/1567774537-20003-11-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
Remove redundant work declaration in HISI_SAS_DECLARE_RST_WORK_ON_STACK Link: https://lore.kernel.org/r/1567774537-20003-10-git-send-email-john.garry@huawei.comSigned-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
We never call hisi_sas_hw.slot_complete, so remove it. Link: https://lore.kernel.org/r/1567774537-20003-9-git-send-email-john.garry@huawei.comSigned-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
Currently the NCQ tag is only assigned for FPDMA READ and FPDMA WRITE commands, and for other NCQ commands (such as FPDMA SEND), their NCQ tags are set in the delivery command to 0. So for all the NCQ commands, we also need to assign normal NCQ tag for them, so drop the command type check in hisi_sas_get_ncq_tag() [drop hisi_sas_get_ncq_tag() altogether actually], and always use the ATA command NCQ tag when appropriate. Link: https://lore.kernel.org/r/1567774537-20003-8-git-send-email-john.garry@huawei.comSigned-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 08 8月, 2019 4 次提交
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由 Luo Jiaxing 提交于
The AXI and RAS register values should also should be snapshot at debugfs. Signed-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Luo Jiaxing 提交于
The value of IOST/ITCT is updated to cache first, and then synchronize to DDR periodically. So the value in IOST/ITCT cache is the latest data and it's important for debugging. So, the HW cache of IOST and ITCT should be snapshot at debugfs. Signed-off-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 John Garry 提交于
In commit 1273d65f ("scsi: hisi_sas: change queue depth from 512 to 4096"), the depth of each queue is the same as the max IPTT in the system. As such, as long as we have an IPTT allocated, we will have enough space on any delivery queue. All .get_free_slot functions were checking for space on the queue by reading the DQ read pointer. Drop this, and also raise the code into common code, as there is nothing hw specific remaining. Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 John Garry 提交于
There is a small optimisation to be had by making the max IPTT the same for all hw revisions, that being we can drop the check for read and write pointer being the same in the get free slot function. Change v1 hw to have max IPTT of 4096 - same as v2 and v3 hw - and drop hisi_sas_hw.max_command_entries. Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 21 6月, 2019 1 次提交
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由 John Garry 提交于
Many times in libsas, and in LLDDs which use libsas, the check for an expander device is re-implemented or open coded. Use dev_is_expander() instead. We rename this from sas_dev_type_is_expander() to not spill so many lines in referencing. Signed-off-by: NJohn Garry <john.garry@huawei.com> Reviewed-by: NJason Yan <yanaijie@huawei.com> Reviewed-by: NJack Wang <jinpu.wang@cloud.ionos.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 19 6月, 2019 1 次提交
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由 John Garry 提交于
Macro HISI_SAS_SGE_PAGE_CNT is defined to SG_CHUNK_SIZE, which is 128. This means that sizeof(struct hisi_sas_slot_buf_table) is 4192. This is just over a 4K, which can mean inefficient DMA memory usage (for no PI). Reduce the size of HISI_SAS_SGE_PAGE_CNT to 124 to fit in a 4K page. With this change, we experience no performance hit. Cc: dann frazier <dann.frazier@canonical.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 31 5月, 2019 1 次提交
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由 Thomas Gleixner 提交于
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NAllison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 13 4月, 2019 1 次提交
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由 John Garry 提交于
In commit efdcad62 ("scsi: hisi_sas: Set PHY linkrate when disconnected"), we use the sas_phy_data.enable flag to track whether the PHY was enabled or not, so that we know if we should set the PHY negotiated linkrate at SAS_LINK_RATE_UNKNOWN or SAS_PHY_DISABLED. However, it is not proper to use sas_phy_data.enable, since it is only set when libsas attempts to set the PHY disabled/enabled; hence, it may not even have an initial value. As a solution to this problem, introduce hisi_sas_phy.enable to track whether the PHY is enabled or not, so that we can set the negotiated linkrate properly when the PHY comes down. Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 07 3月, 2019 2 次提交
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由 Xiang Chen 提交于
If we exchange SAS expander from one SAS controller to other SAS controller without powering it down, the STP target port will maintain previous affiliation and reject all subsequent connection requests from other STP initiator ports with OPEN_REJECT (STP RESOURCES BUSY). To solve this issue, send HARD RESET to clear the previous affiliation of STP target port according to SPL (chapter 6.19.4). We (re-)introduce dev status flag to know if to sleep in NEXUS reset code or not for remote PHYs. The idea is that if the device is being initialised, we don't require the delay, and caller would wait for link to be established, cf. sas_ata_hard_reset(). Co-developed-by: NLuo Jiaxing <luojiaxing@huawei.com> Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiaofei Tan 提交于
The later revision of v3 hw has added an function of interrupt coalesce according to time for PHY RX errors. We set the coalesce time to 1s. Then we print PHY RX errors count when PHY RX errors happen, and don't need to worry that there may be too much log prints. Besides, we use hisi_sas_phy.lock to protect error count value. Because we update them by calling phy_get_events_v3_hw(), which is also used by core driver (for get PHY events function). We relocate phy_get_events_v3_hw() to avoid a further declaration. Signed-off-by: NXiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 09 2月, 2019 3 次提交
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由 Xiang Chen 提交于
For auto-control irq affinity mode, choose the dq to deliver IO according to the current CPU. Then it decreases the performance regression that fio and CQ interrupts are processed on different node. For user control irq affinity mode, keep it as before. To realize it, also need to distinguish the usage of dq lock and sas_dev lock. We mark as experimental due to ongoing discussion on managed MSI IRQ during hotplug: https://marc.info/?l=linux-scsi&m=154876335707751&w=2 We're almost at the point where we can expose multiple queues to the upper layer for SCSI MQ, but we need to sort out the per-HBA tags performance issue. Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 John Garry 提交于
To support queue mapped to a CPU, it needs to be ensured that issuing an internal abort is safe, in that it is guaranteed that an internal abort is processed for a single IO or a device after all the relevant command(s) which it is attempting to abort have been processed by the controller. Currently we only deliver commands for any device on a single queue to solve this problem, as we know that commands issued on the same queue will be processed in order, and we will not have a scenario where the internal abort is racing against a command(s) which it is trying to abort. To enqueue commands on queue mapped to a CPU, choosing a queue for an command is based on the associated queue for the current CPU, so this is not safe for internal abort since it would definitely not be guaranteed that commands for the command devices are issued on the same queue. To solve this issue, we take a bludgeoning approach, and issue a separate internal abort on any queue(s) relevant to the command or device, in that we will be guaranteed that at least one of these internal aborts will be received last in the controller. So, for aborting a single command, we can just force the internal abort to be issued on the same queue as the command which we are trying to abort. For aborting all commands associated with a device, we issue a separate internal abort on all relevant queues. Issuing multiple internal aborts in this fashion would have not side affect. Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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由 Xiang Chen 提交于
If sending IOs to many disks from single queue, it is possible that the queue may be full. To avoid the situation, change queue depth from 512 to 4096 which is the max number of IOs for v3 hw. Signed-off-by: NXiang Chen <chenxiang66@hisilicon.com> Signed-off-by: NJohn Garry <john.garry@huawei.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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