提交 · a8b846775e18bf9127a1da0586e3cc7c23379d14 · openeuler / Kernel

31 7月, 2014 5 次提交

MIPS: pm-cps: Select CONFIG_MIPS_CPC · a8b84677

由 Paul Burton 提交于 7月 09, 2014

The pm-cps code can run without a CPC, although will be limited to using
only the 2 wait idle states. However the code does check for CPC
presence, and in order to work optimally the CPC support is needed. So
select it.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Reviewed-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7279/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

a8b84677

MIPS: pm-cps: Prevent use of mips_cps_* without CPS SMP · 064231e5

由 Paul Burton 提交于 7月 09, 2014

These symbols will not be defined when CONFIG_MIPS_CPS=n, but although
the CPS_PM_POWER_GATED state will never be used in that case the
compiler doesn't have enough information to figure that out. Add checks
which evaluate to a constant false for CONFIG_MIPS_CPS=n cases in order
to help the compiler out & eliminate the symbol references.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Reviewed-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7278/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

064231e5

MIPS: BCM47XX: add Microsoft MN-700 and Asus WL500G · 250dc037

由 Hauke Mehrtens 提交于 7月 29, 2014

This patch adds detection for the Microsoft MN-700 and the Asus WL500G
router. This is based on some old code from OpenWrt.
Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
Cc: zajec5@gmail.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7490/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

250dc037

MIPS: BCM47XX: fixup broken MAC addresses in nvram · 103c0bf3

由 Hauke Mehrtens 提交于 7月 29, 2014

The address prefix 00:90:4C is used by Broadcom in their initial
configuration. When a mac address with the prefix 00:90:4C is used all
devices from the same series are sharing the same mac address. To
prevent mac address collisions we replace them with a mac address based
on the base address. To generate such addresses we take the main mac
address from et0macaddr and increase it by two for the first wifi
device and by 3 for the second one. This matches the printed mac
address on the device. The main mac address increased by one is used as
wan address by the vendor code.
Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
Cc: zajec5@gmail.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7489/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

103c0bf3

MIPS: BCM47XX: make reboot more relaiable · 316cad5c

由 Hauke Mehrtens 提交于 7月 28, 2014

The reboot on the BCM47XX SoCs is done, by setting the watchdog counter
to 1 and let it trigger a reboot, when it reaches 0. Some devices with
a BCM4705/BCM4785 SoC do not reboot when the counter is set to 1 and
decreased to 0 by the hardware. It looks like it works more reliable
when we set it to 3. As far as I understand the hardware, this should
not make any difference, but I do not have access to any documentation
for this SoC.
It is still not 100% reliable.
Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
Cc: zajec5@gmail.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7488/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

316cad5c

30 7月, 2014 35 次提交

MIPS: TXx9: Delete an unused variable in tx4927_pcibios_setup · 1bc2d3e3

由 Atsushi Nemoto 提交于 6月 28, 2014

Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7216/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

1bc2d3e3

MIPS: TXx9: Add __init_refok annotation to quirk_slc90e66_bridge · 5236d5c7

由 Atsushi Nemoto 提交于 6月 28, 2014

This pci fixup routine calls __init functions.
In general pci fixup routine must not call __init functions,
but this pci/isa bridge device is not hotpluggable anyway.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7215/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

5236d5c7

MIPS: TXx9: Fix quirk_slc90e66_ide · ad6f9022

由 Atsushi Nemoto 提交于 6月 28, 2014

Fix wrong code spotted by -Werror=array-bounds:
arch/mips/txx9/generic/pci.c:334:23: error: array subscript is above array bounds [-Werror=array-bounds]
pci_write_config_byte(dev, regs[i], dat);
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7214/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

ad6f9022

MIPS: SB1: Check optional compilation flags one by one · b625cd4a

由 Maciej W. Rozycki 提交于 6月 29, 2014

This fixes a regression caused by commit
bb6c0bd3 [MIPS: SB1: Fix excessive kernel
warnings.], that makes `-march=r5000' selected for compilation flags
rather than supposed `-march=sb1' with compilers that do not support the
ASE selection flags introduced with that change.

For example GCC 4.1.2 supports `-mips3d'/`-mno-mips3d' (and obviously
`-march=sb1'), however it does not support `-mdmx'/`-mno-mdmx'.  As a
result the whole selection of flags fails and compilation resorts to using
`-march=r5000', meant for really old compilers indeed only.

It is always best to pick the flags individually unless we are absolutely
sure a set of flags was introduced to the toolchain together (`-march=sb1'
and `-mtune=sb1' would be a good example), and this change makes it happen
for CONFIG_CPU_SB1.  Consequently the flags ultimately selected with GCC
4.1.2 are `-march=sb1 -Wa,--trap -mno-mips3d'
Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
Cc: Richard Sandiford <rdsandiford@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7223/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

b625cd4a

MIPS: asm/bitops.h: Guard CLZ with `.set mips32' · db873131

由 Maciej W. Rozycki 提交于 6月 29, 2014

This fixes:

{standard input}: Assembler messages:
{standard input}:145: Error: opcode not supported on this processor: vr5000 (mips4) `clz $2,$2'
{standard input}:920: Error: opcode not supported on this processor: vr5000 (mips4) `clz $7,$9'
{standard input}:1797: Error: opcode not supported on this processor: vr5000 (mips4) `clz $7,$7'
{standard input}:1851: Error: opcode not supported on this processor: vr5000 (mips4) `clz $7,$7'
{standard input}:2831: Error: opcode not supported on this processor: vr5000 (mips4) `clz $7,$7'
{standard input}:4209: Error: opcode not supported on this processor: vr5000 (mips4) `clz $7,$7'
{standard input}:4329: Error: opcode not supported on this processor: vr5000 (mips4) `clz $2,$2'
make[2]: *** [arch/mips/mm/tlbex.o] Error 1

which triggered due to a regression causing the file to be built with
`-march=r5000' rather than `-march=sb1', fixed separately.  Nevertheless
the error should not happen, the other uses of CLZ are appropriately
guarded.  This change copies the arrangement from one of those other
places.
Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7222/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

db873131

MIPS: c-r4k: Avoid duplicate CPU_74K/CPU_1074K checks · bf4aac07

由 Maciej W. Rozycki 提交于 6月 28, 2014

Code in a switch statement in probe_pcache checks the CPU type twice
unnecessarily for processor implementations that have the alias removal
feature reported by the CP0 Config7.AR and Config7.IAR bits.  This change
rewrites the affected fragment avoiding the extraneous check and improving
readability.
Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7221/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

bf4aac07

MIPS: BCM63xx: Allow setting affinity for IPIC · b37f0f69