This adds the TCM interface to Linux, when active, it will
detect and report TCM memories and sizes early in boot if
present, introduce generic TCM memory handling, provide a
generic TCM memory pool and select TCM memory for the U300
platform.

See the Documentation/arm/tcm.txt for documentation.
Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add the ARM implementation of highpte, which allows PTE tables to be
placed in highmem.  Unfortunately, we do not offer highpte support
when support for L2 cache is enabled.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

S5PC100 is a new SoC with ARM coretex-A8 and numerous peripherals. This SoC is
successor of S3C64XX. S5PC100 has peripherals which are still similar to S3C
families so some drivers in "arch/arm/plat-s3c" can be shared. S5PC100 specific
drivers will be added in "arch/arm/plat-s5pcxx" or "arch/arm/mach-s5pc100"
Signed-off-by: NByungho Min <bhmin@samsung.com>
[ben-linux@fluff.org: tidy and edit description]
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

add bcmring option in Kconfig and add entry in Makefile
in arch/arm directory
Signed-off-by: NLeo Chen <leochen@broadcom.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Provide more useful introduction for w90x900
Signed-off-by: NWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add clocksource/clockevent support for w90p910 platform.
Signed-off-by: NWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The changes introduced by this change are:
  - drivers/mtd/Kconfig doesn't depend on ALIGNMENT_TRAP ||
    !CPU_CP15_MMU any more
  - the following files are sourced additionally:
    + drivers/macintosh/Kconfig
      completely depends on PPC || MAC || X86
    + drivers/telephony/Kconfig
      new
    + drivers/pps/Kconfig
      new
    + drivers/infiniband/Kconfig
      new
    + drivers/edac/Kconfig
      depends on X86 || PPC
    + drivers/vlynq/Kconfig
      depends on AR7 && EXPERIMENTAL (that is ARCH_MIPS)
    + drivers/xen/Kconfig
      everything depends on XEN
    + drivers/platform/Kconfig
      depends on X86
  - drivers/regulator/Kconfig is sourced later as is
    drivers/accessibility/Kconfig
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

before this patch ARM had it's own definition of CONFIG_PREEMPT.
Instead of that use the general definition provided in
kernel/Kconfig.preempt.

This patch changes the available options in *config.  Namely PREEMPT
isn't a stand alone bool anymore, but part of a 'choice' the
following Kconfig symbols are added:

	PREEMPT_NONE
	PREEMPT_VOLUNTARY

Selecting PREEMPT_NONE now produces exactly the code as not selecting
PREEMPT before (apart from a comment in
/sys/kernel/debug/tracing/(per_cpu/cpuX/)?trace).  The only difference
PREEMPT_VOLUNTARY does is that might_resched might reschedule.  Both
should't introduce regressions.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>

Add debugfs support for the cpufreq driver to allow
information about the system state to be exported to
the user.
Signed-off-by: NBen Dooks <ben@simtec.co.uk>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Add the S3C24XX to the main ARM CPUFreq Kconfig support list.
Signed-off-by: NBen Dooks <ben@simtec.co.uk>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Add ARCH_HAS_CPUFREQ so that each machine config can select
it if they have CPUFREQ driver support. This means that the
CPUFREQ specific area does not need the if statement updating
each time a new machine is added.
Signed-off-by: NBen Dooks <ben@simtec.co.uk>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

MMU option is now selectable.
Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>

This patch adds the necessary entries to the Makefile and Kconfig
files for building the Thumb-2 kernel.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

This patch adds various C and assembler macros that help with using
the unified assembler syntax for compiling files to either ARM or
Thumb-2 modes.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

Add HAVE_CLK depends on for w90p910 platform.
Signed-off-by: NWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NAlessandro Rubini <rubini@unipv.it>
Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds the basic infrastructure for the Nomadik 8815
CPU and the "Nomadik Hardware Kit" NHK8815. This patch only
includes the serial console and core stuff, no drivers.
Signed-off-by: NAlessandro Rubini <rubini@unipv.it>
Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch provides initial support for CPU frequency scaling on the
Samsung S3C ARM processors. Currently only S3C6410 processors are
supported, though addition of another data table with supported clock
rates should be sufficient to enable support for further CPUs.

Use the regulator framework to provide optional support for DVFS in
the S3C cpufreq driver. When a software controllable regulator is
configured the driver will use it to lower the supply voltage when
running at a lower frequency, giving improved power savings.

When regulator support is disabled or no regulator can be obtained
for VDDARM the driver will fall back to scaling only the frequency.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Add clock api for w90p910 platform.
Signed-off-by: NWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add gpio api for w90p910 platform.
Signed-off-by: NWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch enables SMP on OMAP4430 SDP platform.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>

Signed-off-by: NErik Benada <erikbenada@yahoo.ca>

[ nico: fix locking, additional cleanups ]
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Kconfig entries default to n, so there's no need for this to be
explicitly specified.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NColin Tuckley <Colin.Tuckley@arm.com>
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

This is a RealView platform supporting core tiles with ARM11MPCore,
Cortex-A8 or Cortex-A9 (multicore) processors. It has support for MMC,
CompactFlash, PCI-E.
Signed-off-by: NColin Tuckley <colin.tuckley@arm.com>
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

This implements {copy_to,clear}_user() by faulting in the userland
pages and then using the regular kernel mem{cpy,set}() to copy the
data (while holding the page table lock).  This is a win if the regular
mem{cpy,set}() implementations are faster than the user copy functions,
which is the case e.g. on Feroceon, where 8-word STMs (which memcpy()
uses under the right conditions) give significantly higher memory write
throughput than a sequence of individual 32bit stores.

Here are numbers for page sized buffers on some Feroceon cores:

 - copy_to_user on Orion5x goes from 51 MB/s to 83 MB/s
 - clear_user on Orion5x goes from 89MB/s to 314MB/s
 - copy_to_user on Kirkwood goes from 240 MB/s to 356 MB/s
 - clear_user on Kirkwood goes from 367 MB/s to 1108 MB/s
 - copy_to_user on Disco-Duo goes from 248 MB/s to 398 MB/s
 - clear_user on Disco-Duo goes from 328 MB/s to 1741 MB/s

Because the setup cost is non negligible, this is worthwhile only if
the amount of data to copy is large enough.  The operation falls back
to the standard implementation when the amount of data is below a certain
threshold. This threshold was determined empirically, however some targets
could benefit from a lower runtime determined value for optimal results
eventually.

In the copy_from_user() case, this technique does not provide any
worthwhile performance gain due to the fact that any kind of read access
allocates the cache and subsequent 32bit loads are just as fast as the
equivalent 8-word LDM.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>
Tested-by: NMartin Michlmayr <tbm@cyrius.com>

Provide a generic SRAM allocator using genalloc, and vaguely
modeled after what AVR32 uses.  This builds on top of the
static CPU mapping set up in the previous patch, and returns
DMA mappings as requested (if possible).

Compared to its OMAP cousin, there's no current support for
(currently non-existent) DaVinci power management code running
in SRAM; and this has ways to deallocate, instead of being
allocate-only.

The initial user of this should probably be the audio code,
because EDMA from DDR is subject to various dropouts on at
least DM355 and DM6446 chips.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

pfn_valid() is meant to be able to tell if a given PFN has valid memmap
associated with it or not. In FLATMEM, it is expected that holes always
have valid memmap as long as there is valid PFNs either side of the hole.
In SPARSEMEM, it is assumed that a valid section has a memmap for the
entire section.

However, ARM and maybe other embedded architectures in the future free
memmap backing holes to save memory on the assumption the memmap is never
used. The page_zone linkages are then broken even though pfn_valid()
returns true. A walker of the full memmap must then do this additional
check to ensure the memmap they are looking at is sane by making sure the
zone and PFN linkages are still valid. This is expensive, but walkers of
the full memmap are extremely rare.

This was caught before for FLATMEM and hacked around but it hits again for
SPARSEMEM because the page_zone linkages can look ok where the PFN linkages
are totally screwed. This looks like a hatchet job but the reality is that
any clean solution would end up consumning all the memory saved by punching
these unexpected holes in the memmap. For example, we tried marking the
memmap within the section invalid but the section size exceeds the size of
the hole in most cases so pfn_valid() starts returning false where valid
memmap exists. Shrinking the size of the section would increase memory
consumption offsetting the gains.

This patch identifies when an architecture is punching unexpected holes
in the memmap that the memory model cannot automatically detect and sets
ARCH_HAS_HOLES_MEMORYMODEL. At the moment, this is restricted to EP93xx
which is the model sub-architecture this has been reported on but may expand
later. When set, walkers of the full memmap must call memmap_valid_within()
for each PFN and passing in what it expects the page and zone to be for
that PFN. If it finds the linkages to be broken, it assumes the memmap is
invalid for that PFN.
Signed-off-by: NMel Gorman <mel@csn.ul.ie>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

arch-imx is superseeded by the MXC architecture support.
This patch removes arch-imx from the build system.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

All i.MX platforms support <linux/clk.h> calls and should select HAVE_CLK.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch is a workaround for the 460075 Cortex-A8 (r2p0) erratum. It
configures the L2 cache auxiliary control register so that the Write
Allocate mode for the L2 cache is disabled.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds a workaround for the 458693 Cortex-A8 (r2p0)
erratum. It sets the corresponding bits in the auxiliary control
register so that the PLD instruction becomes a NOP.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds the workaround for the 430973 Cortex-A8 (r1p0..r1p2)
erratum. The BTAC/BTB is now flushed at every context switch.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch implements the recommended workaround for erratum 411920
(ARM1136, ARM1156, ARM1176).
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>