- 14 7月, 2015 3 次提交
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由 Joachim Eastwood 提交于
Enable UART3 that is routed to the J17 DSUB9 connector on the EA4357 devkit. Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
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由 Joachim Eastwood 提交于
Enable Ethernet and add pin muxing and set the correct frequency on the enet tx clock input. Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
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由 Joachim Eastwood 提交于
Hook up the small joystick found on the EA4357 devkit. Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
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- 12 7月, 2015 12 次提交
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由 Joachim Eastwood 提交于
Enable the MMC/SD controller on EA4357 devkit and add pin muxing plus a regulator. Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
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由 Joachim Eastwood 提交于
Setup pin muxing and properties for the debug console on uart0. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Joachim Eastwood 提交于
Add nodes for the two USB EHCI controllers found on lpc18xx. Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
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由 Joachim Eastwood 提交于
Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
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由 Joachim Eastwood 提交于
The CREG block contains a collection of miscellaneous configuration register like Ethernet phy mode, low power clocks and DMA multiplexer. These registers needs to be accessed from other drivers and syscon provides this capability. Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
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由 Joachim Eastwood 提交于
Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
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由 Joachim Eastwood 提交于
Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
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由 Joachim Eastwood 提交于
Add nodes for the ARM SSP controllers on lpc18xx. Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
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由 Joachim Eastwood 提交于
Add gpio and mapping between pinctrl/gpio namespace with gpio-ranges property. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Joachim Eastwood 提交于
Add pinctrl node for lpc1850-scu. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Joachim Eastwood 提交于
Add lpc1850-uart compatible string on uarts together with proper clock-names. Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
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由 Joachim Eastwood 提交于
Add CGU and CCU clock-controller nodes for lpc18xx together with the fixed input clocks. Also remove the temporary fixed-factor pll1 clock from both lpc18xx and lpc4350-hitex-eval DTS now that proper clock drivers are inplace. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Acked-by: NMichael Turquette <mturquette@baylibre.com>
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- 02 7月, 2015 3 次提交
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由 Florian Fainelli 提交于
The Broadcom NAND driver is used by brcmstb, bcm63xx, bcm5301x and Cygnus/iProc under mach-bcm, this is enough critical mass to enable it. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Florian Fainelli 提交于
This reverts 7dc95b40 ("ARM: BCM: Enable NAND support for iProc SoCs") since it creates an unmet dependency for MTD_NAND_BRCMNAND which depends on MTD and MTD_NAND, this results in the following build failure for brcmnand: LD init/built-in.o drivers/built-in.o: In function `brcmnand_remove': /home/fainelli/dev/linux/drivers/mtd/nand/brcmnand/brcmnand.c:2234: undefined reference to `nand_release' drivers/built-in.o: In function `brcmnand_init_cs': /home/fainelli/dev/linux/drivers/mtd/nand/brcmnand/brcmnand.c:1933: undefined reference to `nand_scan_ident' /home/fainelli/dev/linux/drivers/mtd/nand/brcmnand/brcmnand.c:1958: undefined reference to `nand_scan_tail' Makefile:931: recipe for target 'vmlinux' failed make: *** [vmlinux] Error 1 Instead, select this driver an all dependencies on the multi_v7_defconfig. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Boris Brezillon 提交于
at91sam9g45, at91sam9x5 and sama5 SoCs should not use "atmel,at91sam9rl-udc" for their USB device compatible property since this compatible is attached to a specific hardware bug fix. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Tested-by: NBo Shen <voice.shen@atmel.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: <stable@vger.kernel.org> #4.0+ Signed-off-by: NKevin Hilman <khilman@linaro.org>
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- 01 7月, 2015 2 次提交
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由 Vladimir Zapolskiy 提交于
To be consistent with other genalloc interface namings, rename dev_get_gen_pool() to gen_pool_get(). The original omitted "dev_" prefix is removed, since it points to argument type of the function, and so it does not bring any useful information. [akpm@linux-foundation.org: update arch/arm/mach-socfpga/pm.c] Signed-off-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Takashi Iwai <tiwai@suse.de> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Mark Brown <broonie@kernel.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Alan Tull <atull@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Kevin Hilman <khilman@linaro.org> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Simon Guinot 提交于
This patch updates the Ethernet DT nodes for Armada XP SoCs with the compatible string "marvell,armada-xp-neta". Signed-off-by: NSimon Guinot <simon.guinot@sequanux.org> Fixes: 77916519 ("arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces") Cc: <stable@vger.kernel.org> # v3.8+ Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 6月, 2015 1 次提交
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由 Thomas Gleixner 提交于
irq_data->hwirq is not guaranteed to be the same as irq_data->irq. It might be in that particular case, but it's wrong nevertheless. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Roland Stigge <stigge@antcom.de>
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- 26 6月, 2015 1 次提交
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由 Dominik Dingel 提交于
Nobody used these hooks so they were removed from common code, and can now be removed from the architectures. Signed-off-by: NDominik Dingel <dingel@linux.vnet.ibm.com> Acked-by: NMartin Schwidefsky <schwidefsky@de.ibm.com> Acked-by: NRalf Baechle <ralf@linux-mips.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 25 6月, 2015 5 次提交
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由 Zhang Zhen 提交于
Currently we have many duplicates in definitions of hugetlb_prefault_arch_hook. In all architectures this function is empty. Signed-off-by: NZhang Zhen <zhenzhang.zhang@huawei.com> Acked-by: NDavid Rientjes <rientjes@google.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Laurent Dufour 提交于
CRIU is recreating the process memory layout by remapping the checkpointee memory area on top of the current process (criu). This includes remapping the vDSO to the place it has at checkpoint time. However some architectures like powerpc are keeping a reference to the vDSO base address to build the signal return stack frame by calling the vDSO sigreturn service. So once the vDSO has been moved, this reference is no more valid and the signal frame built later are not usable. This patch serie is introducing a new mm hook framework, and a new arch_remap hook which is called when mremap is done and the mm lock still hold. The next patch is adding the vDSO remap and unmap tracking to the powerpc architecture. This patch (of 3): This patch introduces a new set of header file to manage mm hooks: - per architecture empty header file (arch/x/include/asm/mm-arch-hooks.h) - a generic header (include/linux/mm-arch-hooks.h) The architecture which need to overwrite a hook as to redefine it in its header file, while architecture which doesn't need have nothing to do. The default hooks are defined in the generic header and are used in the case the architecture is not defining it. In a next step, mm hooks defined in include/asm-generic/mm_hooks.h should be moved here. Signed-off-by: NLaurent Dufour <ldufour@linux.vnet.ibm.com> Suggested-by: NAndrew Morton <akpm@linux-foundation.org> Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> Cc: Hugh Dickins <hughd@google.com> Cc: Rik van Riel <riel@redhat.com> Cc: Mel Gorman <mgorman@suse.de> Cc: Pavel Emelyanov <xemul@parallels.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Ingo Molnar <mingo@kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Zhang Zhen 提交于
Currently we have many duplicates in definitions of huge_pmd_unshare. In all architectures this function just returns 0 when CONFIG_ARCH_WANT_HUGE_PMD_SHARE is N. This patch puts the default implementation in mm/hugetlb.c and lets these architectures use the common code. Signed-off-by: NZhang Zhen <zhenzhang.zhang@huawei.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Tony Luck <tony.luck@intel.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Chris Metcalf <cmetcalf@ezchip.com> Cc: David Rientjes <rientjes@google.com> Cc: James Yang <James.Yang@freescale.com> Cc: Aneesh Kumar <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Arnd Bergmann 提交于
This backs out all changes that were added in the hip04-dt branch after various boot problems were discovered in UEFI booting. Reported-by: NTyler Baker <tyler.baker@linaro.org> Cc: Wei Xu <xuwei5@hisilicon.com> [khilman: minor changelog updates] Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Thor Thayer 提交于
Add support for the Arria10 SDRAM EDAC. Update the bindings document for the new match string. Signed-off-by: NThor Thayer <tthayer@opensource.altera.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: devicetree@vger.kernel.org Cc: dinguyen@opensource.altera.com Cc: galak@codeaurora.org Cc: grant.likely@linaro.org Cc: ijc+devicetree@hellion.org.uk Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: m.chehab@samsung.com Cc: mark.rutland@arm.com Cc: pawel.moll@arm.com Cc: robh+dt@kernel.org Cc: tthayer.linux@gmail.com Link: http://lkml.kernel.org/r/1433428128-7292-5-git-send-email-tthayer@opensource.altera.comSigned-off-by: NBorislav Petkov <bp@suse.de>
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- 24 6月, 2015 1 次提交
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由 Russell King 提交于
v3.18 changed handle_IRQ() to call __handle_domain_irq(), which now rejects attempts to deliver IRQ0. Since IRQ 0 is used as the timer interrupt (just like the PIT on x86), this causes boot to fail as the bogomips calibration never completes. Fix this by shuffling all interrupts up by one. Fixes: a71b092a ("ARM: Convert handle_IRQ to use __handle_domain_irq") Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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- 22 6月, 2015 2 次提交
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由 Lee Jones 提交于
Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
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由 Hyungwon Hwang 提交于
The clock which was named as 'pll_clk' is actually not the clock source of PLL in MIPI DSI. This patch fixes this disagreement. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Acked-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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- 21 6月, 2015 1 次提交
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由 Thomas Abraham 提交于
The new CPU clock type allows the use of generic CPUfreq driver. Switch Exynos4210 to using generic cpufreq driver. Changes by Bartlomiej: - removed non-Exynos4210 support for now Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NThomas Abraham <thomas.ab@samsung.com> Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
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- 18 6月, 2015 2 次提交
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由 Russell King 提交于
The gemini code was installing its chained interrupt handler (which enables the interrupt) before it was setting its data, which is bad if the IRQ was previously pending. Avoid this problem by converting it to irq_set_chained_handler_and_data(). Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/E1Z4z07-0002SO-Gv@rmk-PC.arm.linux.org.ukSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Russell King 提交于
Convert SA11x0 (Neponset, SA1111, and UCB1x00 code) to use the new irq_set_chained_handler_and_data() helper. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/E1Z4yzx-0002S6-7p@rmk-PC.arm.linux.org.ukSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 17 6月, 2015 7 次提交
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由 Julien Grall 提交于
Signed-off-by: NJulien Grall <julien.grall@citrix.com> Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: NDavid Vrabel <david.vrabel@citrix.com>
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由 Thomas Petazzoni 提交于
The current Armada XP suspend to RAM implementation, as added in commit 27432825 ("ARM: mvebu: Armada XP GP specific suspend/resume code") does not handle big-endian configurations properly: the small bit of assembly code putting the DRAM in self-refresh and toggling the GPIOs to turn off power forgets to convert the values to little-endian. This commit fixes that by making sure the two values we will write to the DRAM controller register and GPIO register are already in little-endian before entering the critical assembly code. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: <stable@vger.kernel.org> # v3.19+ Fixes: 27432825 ("ARM: mvebu: Armada XP GP specific suspend/resume code")
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由 Julien Grall 提交于
Using xen/page.h will be necessary later for using common xen page helpers. As xen/page.h already include asm/xen/page.h, always use the later. Signed-off-by: NJulien Grall <julien.grall@citrix.com> Reviewed-by: NDavid Vrabel <david.vrabel@citrix.com> Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Cc: Ian Campbell <ian.campbell@citrix.com> Cc: Wei Liu <wei.liu2@citrix.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: netdev@vger.kernel.org Signed-off-by: NDavid Vrabel <david.vrabel@citrix.com>
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由 Thomas Petazzoni 提交于
Following the merge of "pinctrl: mvebu: armada-xp: rename spi to spi0" by Linus Walleij, we need to adjust the Armada XP Device Tree accordingly, by adjusting the pinctrl configuration for SPI pins. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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由 Wolfram Sang 提交于
This is now done in the I2C driver. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Marc Zyngier 提交于
The GIC Hypervisor Configuration Register is used to enable the delivery of virtual interupts to a guest, as well as to define in which conditions maintenance interrupts are delivered to the host. This register doesn't contain any information that we need to read back (the EOIcount is utterly useless for us). So let's save ourselves some cycles, and not save it before writing zero to it. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Lorenzo Pieralisi 提交于
According to the PSCI specification and the SMC/HVC calling convention, PSCI function_ids that are not implemented must return NOT_SUPPORTED as return value. Current KVM implementation takes an unhandled PSCI function_id as an error and injects an undefined instruction into the guest if PSCI implementation is called with a function_id that is not handled by the resident PSCI version (ie it is not implemented), which is not the behaviour expected by a guest when calling a PSCI function_id that is not implemented. This patch fixes this issue by returning NOT_SUPPORTED whenever the kvm PSCI call is executed for a function_id that is not implemented by the PSCI kvm layer. Cc: <stable@vger.kernel.org> # 3.18+ Cc: Christoffer Dall <christoffer.dall@linaro.org> Acked-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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