- 26 3月, 2015 1 次提交
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由 Libin Yang 提交于
The total stream number of Sunrise Point's input and output stream exceeds 15, which will cause some streams do not work because of the overflow on SDxCTL.STRM field if using the legacy stream tag allocation method. This patch uses the new stream tag allocation method by add the flag AZX_DCAPS_SEPARATE_STREAM_TAG for Skylake platform. Signed-off-by: NLibin Yang <libin.yang@intel.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 25 2月, 2015 1 次提交
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由 Takashi Iwai 提交于
This is essentially a partial revert of the commit [b1920c21: 'ALSA: hda - Enable runtime PM on Panther Point']. There was a bug report showing the HD-audio bus hang during runtime PM on HP Spectre XT. Reported-by: NDang Sananikone <dang.sananikone@gmail.com> Cc: <stable@vger.kernel.org> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 12 1月, 2015 3 次提交
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由 Imre Deak 提交于
Register a component master to be used to interface with the i915 driver. This is meant to replace the current interface which is based on module symbol lookups. Note that currently we keep the existing behavior and pin the i915 module while the hda driver is loaded. Using the component interface allows us to remove this dependency once support for dynamically enabling / disabling the HDMI functionality is added to the driver. v2: - change roles between the hda and i915 components (Daniel) v3: - rename display_component to audio_component (Daniel) v4: - move removal of i915_powerwell.h from this patch to the next (Takashi) - request_module fails if module support isn't enabled, so ignore any error it returns and depend on the following NULL check of the component ops (Takashi) - change over to using dev_* instead of pr_* (Takashi) Signed-off-by: NImre Deak <imre.deak@intel.com> Reviewed-by: NTakashi Iwai <tiwai@suse.de> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Imre Deak 提交于
chip is already passed to most of the i915 interface functions. Unify the interface by passing intel_hda instead of chip and passing it to all functions. Passing intel_hda instead of chip makes more sense since this is an intel specific interface. Also in an upcoming patch we will use intel_hda in all of these functions so by passing intel_hda we can save on some pointer casts from chip to intel_hda. This will be needed by an upcoming patch adding component support. No functional change. v2-3: unchanged v4: - pass intel_hda instead of chip Signed-off-by: NImre Deak <imre.deak@intel.com> Reviewed-by: NTakashi Iwai <tiwai@suse.de> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Imre Deak 提交于
This struct will be needed by the component code added in an upcoming patch, so export it into a new hda_intel.h file. At the same time also merge hda_i915.h into this new header, there is no reason to keep two separate intel specific header file. Suggested-by: NTakashi Iwai <tiwai@suse.de> Signed-off-by: NImre Deak <imre.deak@intel.com> Reviewed-by: NTakashi Iwai <tiwai@suse.de> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 09 1月, 2015 1 次提交
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由 Takashi Iwai 提交于
This is a similar cleanup like the commit [3db084fd: ALSA: fm801: PCI core handles power state for us]. Since pci_set_power_state(), pci_save_state() and pci_restore_state() are already done in the PCI core side, so we don't need to it doubly. Also, pci_enable_device(), pci_disable_device() and pci_set_master() calls in PM callbacks are superfluous nowadays, too, so get rid of them as well. Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 04 1月, 2015 1 次提交
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由 Markus Elfring 提交于
The iounmap() function performs also input parameter validation. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: NMarkus Elfring <elfring@users.sourceforge.net> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 26 12月, 2014 1 次提交
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由 Libin Yang 提交于
The total stream number of Skylake's input and output stream exceeds 15, which will cause some streams do not work because of the overflow on SDxCTL.STRM field if using the legacy stream tag allocation method. This patch uses the new stream tag allocation method by add the flag AZX_DCAPS_SEPARATE_STREAM_TAG for Skylake platform. Signed-off-by: NLibin Yang <libin.yang@intel.com> Reviewed-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 13 12月, 2014 1 次提交
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由 Rafael J. Wysocki 提交于
After commit b2b49ccb (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is selected) PM_RUNTIME is always set if PM is set, so #ifdef blocks depending on CONFIG_PM_RUNTIME may now be changed to depend on CONFIG_PM. Replace CONFIG_PM_RUNTIME with CONFIG_PM everywhere under sound/. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NTakashi Iwai <tiwai@suse.de> Acked-by: NNicolin Chen <nicoleotsuka@gmail.com> Acked-by: NBrian Austin <brian.austin@cirrus.com> Acked-by: NMark Brown <broonie@kernel.org>
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- 03 12月, 2014 2 次提交
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由 Takashi Iwai 提交于
We introduced AZX_DCAPS_ALIGN_BUFSIZE to explicity show that the controller needs the alignment, with a slight hope that the buffer size alignment will be disabled as default in future. But the reality tells that most chips need the buffer size alignment, and it'll be likely enabled in future, too. This patch drops AZX_DCAPS_ALIGN_BUFSIZE to give back one more precious DCAPS bit for future use. At the same time, rename AZX_DCAPS_BUFSIZE with AZX_DCAPS_NO_ALIGN_BUFSIZE for avoiding confusion. AZX_DCAPS_ALIGN_BUFSIZE are still kept (but commented out) in each DCAPS presets for a purpose as markers. Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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由 Takashi Iwai 提交于
Just for improving readability. Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 28 11月, 2014 2 次提交
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由 Takashi Iwai 提交于
User can pass snoop option to enable/disable the snoop behavior, but currently azx_check_snoop_available() always turns it off for some devices. For better debuggability, change the parameter as bint, and allow user to enable/disable forcibly the snoop when specified via the module option. Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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由 Takashi Iwai 提交于
Add a new driver_caps bit, AZX_DCAPS_SNOOP_OFF, to set the snoop off as default. This new bit is used for the checks in azx_check_snoop_available(). Most of case-switches are replaced with the new dcaps in each entry. While working on it, for avoiding to spend more bits, combine three bits AZX_DCAPS_SNOOP_SCH, AZX_DCAPS_SNOOP_ATI and AZX_DCAPS_SNOOP_NVIDIA bits into a flat type of two bits. This reduces the bits usages, and assign AZX_DCAPS_OFF to this empty bit now. Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 24 11月, 2014 2 次提交
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由 Benjamin Herrenschmidt 提交于
A number of radeon cards have a HW limitation causing them to be unable to generate the full 64-bit of address bits for MSIs. This breaks MSIs on some platforms such as POWER machines. We used to have a powerpc specific quirk to address that on a single card, but this doesn't scale very well, this is better put under control of the drivers who know precisely what a given HW revision can do. We now have a generic quirk in the PCI code. We should set it appropriately for all radeon's from the audio driver. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: NTakashi Iwai <tiwai@suse.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> CC: <stable@vger.kernel.org>
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由 Takashi Iwai 提交于
AMD/ATI HDMI controller chip models, we already have a filter to lower to 32bit DMA, but the rest are supposed to be working with 64bit although the hardware doesn't really work with 63bit but only with 40 or 48bit DMA. In this patch, we take 40bit DMA for safety for the AMD/ATI controllers as the graphics drivers does. Signed-off-by: NTakashi Iwai <tiwai@suse.de> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> CC: <stable@vger.kernel.org>
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- 17 11月, 2014 1 次提交
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由 Markus Elfring 提交于
The functions kfree() and release_firmware() test whether their argument is NULL and then return immediately. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: NMarkus Elfring <elfring@users.sourceforge.net> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 09 11月, 2014 1 次提交
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由 Devin Ryles 提交于
This patch adds DeviceIDs for Sunrise Point-LP Signed-off-by: NDevin Ryles <devin.ryles@intel.com> Cc: <stable@vger.kernel.org> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 29 10月, 2014 1 次提交
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由 Takashi Iwai 提交于
CMI8888 shows the stuttering playback when the snooping is disabled on the audio buffer. Meanwhile, we've got reports that CORB/RIRB doesn't work in the snooped mode. So, as a compromise, disable the snoop only for CORB/RIRB and enable the snoop for the stream buffers. The resultant patch became a bit ugly, unfortunately, but we still can live with it. Reported-and-tested-by: NGeoffrey McRae <geoff@spacevs.com> Cc: <stable@vger.kernel.org> # 3.17+ Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 15 10月, 2014 1 次提交
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由 James Ralston 提交于
This patch adds the HD Audio Device IDs for the Intel Sunrise Point PCH. [the item position rearranged by tiwai] Signed-off-by: NJames Ralston <james.d.ralston@intel.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 07 8月, 2014 1 次提交
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由 Takashi Iwai 提交于
ASUS Phoebus with CMI8888 HD-audio chip (PCI id 13f6:5011) doesn't work with HD-audio driver as is because of some weird nature. For making DMA properly working, we need to disable MSI. The position report buffer doesn't work, thus we need to force reading LPIB instead. And yet, the codec CORB/RIRB communication gives errors unless we disable the snooping (caching). In this patch, all these workarounds are added as a quirk for the device. The HD-audio *codec* chip needs yet another workaround, but it'll be provided in the succeeding patch. Reported-and-tested-by: NVincent Lejeune <vljn@ovi.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 04 8月, 2014 1 次提交
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由 Libin Yang 提交于
Add HD Audio Device PCI ID for the Intel Braswell platform. It is an HDA Intel PCH controller. AZX_DCAPS_ALIGN_BUFSIZE is not necessary for this controller. Signed-off-by: NLibin Yang <libin.yang@intel.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 16 7月, 2014 1 次提交
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由 Takashi Iwai 提交于
Since devptr can be NULL due to asynchronous probe, all PM ops should have NULL checks at the beginning. Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 15 7月, 2014 1 次提交
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由 Takashi Iwai 提交于
When the initialization of Intel HDMI controller fails due to missing i915 kernel symbols (e.g. HD-audio is built in while i915 is module), the driver discontinues the probe. However, since the probe was done asynchronously, the driver object still remains, thus the relevant PM ops are still called at suspend/resume. This results in the bad access to the incomplete audio card object, eventually leads to Oops or stall at PM. This patch adds the missing checks of chip->init_failed flag at each PM callback in order to fix the problem above. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=79561 Cc: <stable@vger.kernel.org> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 14 7月, 2014 1 次提交
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由 Takashi Iwai 提交于
We got a regression report for 3.15.x kernels, and this turned out to be triggered by the fix for stream assignment order. On reporter's machine with Intel controller (8086:1e20) + VIA VT1802 codec, the first playback slot can't work with speaker outputs. But the original commit was actually a fix for AMD controllers where no proper GCAP value is returned, we shouldn't revert the whole commit. Instead, in this patch, a new flag is introduced to determine the stream assignment order, and follow the old behavior for Intel controllers. Fixes: dcb32ecd ('ALSA: hda - Do not assign streams in reverse order') Reported-and-tested-by: NSteven Newbury <steve@snewbury.org.uk> Cc: <stable@vger.kernel.org> [v3.15+] Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 04 7月, 2014 1 次提交
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由 Mengdong Lin 提交于
For HSW/BDW display HD-A controller, hda_set_bclk() is defined to set BCLK by programming the M/N values as per the core display clock (CDCLK) queried from i915 display driver. And the audio driver will also set BCLK in azx_first_init() since the display driver can turn off the shared power in boot phase if only eDP is connected and M/N values will be lost and must be reprogrammed. Signed-off-by: NMengdong Lin <mengdong.lin@intel.com> Cc: <stable@vger.kernel.org> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 27 6月, 2014 5 次提交
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由 Takashi Iwai 提交于
ICH6_ prefix doesn't mean that it's specific to ICH6 chipset but rather its generic for all HD-audio (or "Azalia") devices. Use AZX_ prefix instead to align with other constants. Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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由 Takashi Iwai 提交于
The defined numbers of SDs are specific to hda-intel, so move them to there. Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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由 Takashi Iwai 提交于
The very same notifier code is used in both hda_intel.c and hda_tegra.c. Move it to the generic code. Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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由 Takashi Iwai 提交于
Just move struct fields between struct azx and struct hda_intel, and move some definitions from hda_priv.h to hda_intel.c. Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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由 Takashi Iwai 提交于
... and move most parts into hda_intel.c from the generic controller code. This is a clean up, and there should be no functional change by this patch. Now, struct azx obtains the generic callbacks for getting the position and the delay. As default NULL, posbuf is read. These replace the old position_fix[], and each is implemented as a callback. Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 26 6月, 2014 1 次提交
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由 Mengdong Lin 提交于
For Intel Haswell/Broadwell display HD-A controller, the 24MHz HD-A link BCLK is converted from Core Display Clock (CDCLK): BCLK = CDCLK * M / N And there are two registers EM4 and EM5 to program M, N value respectively. The EM4/EM5 values will be lost and when the display power well is disabled. BIOS programs CDCLK selected by OEM and EM4/EM5, but BIOS has no idea about display power well on/off at runtime. So the M/N can be wrong if non-default CDCLK is used when the audio controller resumes, which results in an invalid BCLK and abnormal audio playback rate. So this patch saves and restores valid M/N values on controller suspend/resume. And 'struct hda_intel' is defined to contain standard HD-A 'struct azx' and Intel specific fields, as Takashi suggested. Signed-off-by: NMengdong Lin <mengdong.lin@intel.com> Cc: <stable@vger.kernel.org> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 16 6月, 2014 1 次提交
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由 Takashi Iwai 提交于
When a machine is booted with nomodeset option, i915 driver skips the whole initialization. Meanwhile, HD-audio tries to bind wth i915 just by request_symbol() without knowing that the initialization was skipped, and eventually it hits WARN_ON() in i915_request_power_well() and i915_release_power_well() wrongly but still continues probing, even though it doesn't work at all. In this patch, both functions are changed to return an error in case of uninitialized state instead of WARN_ON(), so that HD-audio driver can give up HDMI controller initialization at the right time. Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Cc: <stable@vger.kernel.org> [3.15] Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 09 6月, 2014 2 次提交
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由 Libin Yang 提交于
This reverts commit 7189eb9b. It will use LPIB to get the DMA position on Broadwell HDMI Audio. Signed-off-by: NLibin Yang <libin.yang@intel.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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由 Libin Yang 提交于
Broadwell HDMI can't use position buffer reliably, force to use LPIB Signed-off-by: NLibin Yang <libin.yang@intel.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 23 5月, 2014 1 次提交
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由 Takashi Iwai 提交于
The recent Intel H97/Z97 chipsets need the similar setups like other Intel chipsets for snooping, etc. Especially without snooping, the audio playback stutters or gets corrupted. This fix patch just adds the corresponding PCI ID entry with the proper flags. Reported-and-tested-by: NArthur Borsboom <arthurborsboom@gmail.com> Cc: <stable@vger.kernel.org> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 22 5月, 2014 1 次提交
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由 Benoit Taine 提交于
We should prefer `const struct pci_device_id` over `DEFINE_PCI_DEVICE_TABLE` to meet kernel coding style guidelines. This issue was reported by checkpatch. A simplified version of the semantic patch that makes this change is as follows (http://coccinelle.lip6.fr/): // <smpl> @@ identifier i; declarer name DEFINE_PCI_DEVICE_TABLE; initializer z; @@ - DEFINE_PCI_DEVICE_TABLE(i) + const struct pci_device_id i[] = z; // </smpl> It has been tested by compilation. Signed-off-by: NBenoit Taine <benoit.taine@lip6.fr> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 13 5月, 2014 1 次提交
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由 Mengdong Lin 提交于
Broadwell display controller has 3 stream DMA engines. DMA0 cannot update DMA postion buffer properly while DMA1 and DMA2 can work well. So this patch masks the buggy DMA0 by keeping it as opened. This is a tentative workaround, so keep the change small as Takashi suggested. Signed-off-by: NMengdong Lin <mengdong.lin@intel.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 30 4月, 2014 1 次提交
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由 Takashi Iwai 提交于
The recent commit (ca460f86) changed the CORB RP reset procedure to follow the specification with a couple of sanity checks. Unfortunately, Nvidia controller chips seem not following this way, and spew the warning messages like: snd_hda_intel 0000:00:10.1: CORB reset timeout#1, CORBRP = 0 This patch adds the workaround for such chips. It just skips the new reset procedure for the known broken chips. Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 09 4月, 2014 1 次提交
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由 Thierry Reding 提交于
The full_reset argument to azx_init_chip() carries boolean rather than numerical information, so update the type to reflect that. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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- 03 3月, 2014 1 次提交
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由 Dylan Reid 提交于
The ops to read and write registers should take pointers labeled as __iomem. Thanks to the sparse bot for catching this. Signed-off-by: NDylan Reid <dgreid@chromium.org> Signed-off-by: NTakashi Iwai <tiwai@suse.de>
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