* Add device-tree file for TrimSlice
* Add that to the list of .dts files to build
* Update board-dt.c to recognize TrimSlice board name

v2: Makefile: Add board-trimslice-pinmux.c to obj-$(CONFIG_MACH_TEGRA_DT).
v3: Makefile: Use brackets not braces around var names
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The I2S and DAS nodes don't have children, and hence don't need to set
address/size cells.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

For now they are a minimal binding. It needs to be amended with
vendor-specific settings for phy setup and link tuning, etc.

v2: Added bindings specification and phy_type properties
Signed-off-by: NOlof Johansson <olof@lixom.net>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NStephen Warren <swarren@nvidia.com>

Ventana uses the same SDHCI GPIOs as Seaboard; PI6 (70) is the power GPIO
for the SD port, and there is no power GPIO for the MMC chip.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The patch 'arm/dt: Add dtb make rule' adds support to
create a .dtb file. But this is never removed afterwards.
Remove the generated .dtb file if 'distclean' is called.
Signed-off-by: NDirk Behme <dirk.behme@de.bosch.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Jason Liu <jason.hui@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

It adds device tree source and documentation for imx6q platform.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This adds the devicetree source and documentation for the Calxeda highbank
platform.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Reviewed-by: NJamie Iles <jamie@jamieiles.com>
Reviewed-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: NRob Herring <rob.herring@calxeda.com>

Create a new device tree source file for Atmel at91sam9g45 SoC family.
The Evaluation Kit at91sam9m10g45ek includes it.
This first basic support will be populated as drivers and boards will be
converted to device tree.
Contains serial, dma and interrupt controllers.

The generic board file still takes advantage of platform data for early serial
init. As we need a storage media and the NAND flash driver is not converted to
DT yet, we keep old initialization for it.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: NRob Herring <rob.herring@calxeda.com>

If TEXT_OFFSET is too large (e.g. like on MSM) the resulting immediate
argument gets wider than 8 bits.

Noticed by David Brown <davidb@codeaurora.org>
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Cc: Rob Herring <robherring2@gmail.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>

It adds device tree support for imx51 babbage board.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

It adds device tree support for imx53 boards.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Get rid of this complaint from dash:

    AS      arch/arm/boot/compressed/lib1funcs.o
  /bin/sh: 1: [: y: unexpected operator
    LD      arch/arm/boot/compressed/vmlinux
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NRabin Vincent <rabin@rab.in>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

uImages need a load address specified. This makes them
incompatible with multiple zreladdrs. Catch this error
before building an uImage so that we do not end up with
broken uImages. The load address can still be specified
with LOADADDR= on the command line.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Without CONFIG_AUTO_ZRELADDR being set the kernel needs a single
zreladdr for building zImages. Bail out if we detect multiple
zreladdrs without CONFIG_AUTO_ZRELADDR.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add a pinmux node to tegra20.dtsi in order to instantiate the future
pinmux device.

v2: Specify reg property precisely; don't just point at the whole APB_MISC
register range.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add nodes for devices used by PM code (mpu, dsp, iva).

Add a cpus node as well as recommended in the DT spec.

Remove mpu, dsp, iva devices init if is populated.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: Kevin Hilman <khilman@ti.com>

Used the main OCP node to add bindings with the l3_noc driver.
Remove l3_noc static device creation if DT is populated.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>

Add OMAP3 beagleboard DTS file to use the omap3.dtsi SoC file.

Add a default bootargs line to allow a boot from RAMDISK.

Add memory node information.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: G, Manjunath Kondaiah <manjugk@ti.com>

Add initial OMAP3 soc file with empty ocp bus.

Based on initial patch from Manju:
http://www.spinics.net/lists/linux-omap/msg55830.htmlSigned-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: G, Manjunath Kondaiah <manjugk@ti.com>

Add the SDP/Blaze (Software Development Board) support with
device tree.
That file is based on the omap4-panda.dts.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: G, Manjunath Kondaiah <manjugk@ti.com>

Based on the original omap4-panda.dts file from Manju.
http://www.spinics.net/lists/linux-omap/msg55836.html

Add memory information and a default bootargs to allow
a boot from RAMDISK.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: G, Manjunath Kondaiah <manjugk@ti.com>

Add initial device-tree support for OMAP4 SoC.

This is based on the original panda board patch done by Manju:
http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393

Add the generic GIC interrupt-controller from ARM.

Add an empty "soc" node to contain non memory mapped IPs
(DSP, MPU, IPU...).

Note: Since reg, irq and dma are provided by hwmod for the
moment, these attributes will not be present at all in DTS
to highlight the gap. They will be added as soon as dma bindings
will be there and drivers will be adapted.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: G, Manjunath Kondaiah <manjugk@ti.com>

The PC7302 board can be populated with either a PC3X2 or PC3X3 device.
Add DTS files for both variants of the PC7302.

v3:	- remove bootargs from dts files
Signed-off-by: NJamie Iles <jamie@jamieiles.com>

This describes the basic hierarchy of picoxcell pc3x3 devices including
clocks and bus interconnect.  Some onchip devices are currently omitted
as there haven't been bindings created for them.

v2:	- change timer compatible strings to be more soc specific
	- split vic node into 2 devices
Signed-off-by: NJamie Iles <jamie@jamieiles.com>

For Seaboard's internal eMMC, this makes the difference between a
5.5MB/s and 10.2MB/s transfer rate. On Harmony, there wasn't any
measurable difference on my cheap/slow ~2MB/s card.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The bindings were recently updated to have separate properties for each
type of GPIO. Update the Device Tree source to match that.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The rule to copy this file doesn't have to be forced.  However
lib1funcs.[So] have to be listed amongst the targets.

This prevents zImage from being recreated needlessly.
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: NShawn Guo <shawn.guo@linaro.org>
Tested-by: NDave Martin <dave.martin@linaro.org>
Tested-by: NThomas Abraham <thomas.abraham@linaro.org>

Some old bootloaders can't be updated to a device tree capable one,
yet they provide ATAGs with memory configuration, the ramdisk address,
the kernel cmdline string, etc.  To allow a device tree enabled
kernel to be used with such bootloaders, it is necessary to convert those
ATAGs into FDT properties and fold them into the DTB appended to zImage.

Currently the following ATAGs are converted:

	ATAG_CMDLINE
	ATAG_MEM
	ATAG_INITRD2

If the corresponding information already exists in the appended DTB, it
is replaced, otherwise the required node is created to hold it.

The code looks for ATAGs at the location pointed by the value of r2 upon
entry into the zImage code.  If no ATAGs are found there, an attempt at
finding ATAGs at the typical 0x100 offset from start of RAM is made.
Otherwise the DTB is left unchanged.

Thisstarted from an older patch from John Bonesio <bones@secretlab.ca>,
with contributions from David Brown <davidb@codeaurora.org>.
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: NShawn Guo <shawn.guo@linaro.org>
Tested-by: NDave Martin <dave.martin@linaro.org>
Tested-by: NThomas Abraham <thomas.abraham@linaro.org>

This is a small subset of string functions needed by commits to come.
Except for memcpy() which is unchanged from its original location, their
implementation is meant to be small, and -Os is enforced to prevent gcc
from doing pointless loop unrolling.
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: NShawn Guo <shawn.guo@linaro.org>
Tested-by: NDave Martin <dave.martin@linaro.org>
Tested-by: NThomas Abraham <thomas.abraham@linaro.org>

The appended DTB gets relocated with the decompressor code to get out
of the way of the decompressed kernel.  However the kernel's .bss section
may be larger than the relocated code and data, and then the DTB gets
overwritten.  Let's make sure the relocation takes care of moving zImage
far enough so no such conflict with .bss occurs.

Thanks to Tony Lindgren <tony@atomide.com> for figuring out this issue.

While at it, let's clean up the code a bit so that the wont_overwrite
symbol is used while determining if a conflict exists, making the above
change more precise as well as eliminating some ARM/THUMB alternates.
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Tested-by: NShawn Guo <shawn.guo@linaro.org>
Tested-by: NDave Martin <dave.martin@linaro.org>
Tested-by: NThomas Abraham <thomas.abraham@linaro.org>

This patch provides the ability to boot using a device tree that is appended
to the raw binary zImage (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
Signed-off-by: NJohn Bonesio <bones@secretlab.ca>
[nico: ported to latest zImage changes plus additional cleanups/improvements]
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NTony Lindgren <tony@atomide.com>
Tested-by: NShawn Guo <shawn.guo@linaro.org>
Tested-by: NDave Martin <dave.martin@linaro.org>
Tested-by: NThomas Abraham <thomas.abraham@linaro.org>

This is needed for proper alignment when the DTB appending feature
is used.
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Tested-by: NShawn Guo <shawn.guo@linaro.org>
Tested-by: NDave Martin <dave.martin@linaro.org>
Tested-by: NThomas Abraham <thomas.abraham@linaro.org>

The module is a bridge between the RTC clock domain and the CPU interface
clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through
this module.
Signed-off-by: NZhiwu Song <zhiwu.song@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Reviewed-by: NJamie Iles <jamie@jamieiles.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>

gpio controller handles the switch of gpio and pinmux. And drivers/pinctrl/pinmux-sirf.c
will contain both gpio and pinmux.

Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>

Signed-off-by: NBarry Song <Baohua.Song@csr.com>

Adds support for booting via device tree with a simple serial console.

Change-Id: I7f175b8db21928cd13e0fb49f3eed74966a2696f
Signed-off-by: NDavid Brown <davidb@codeaurora.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>

This corrects a logic-error that I made in the original implementation.

An alternate patch would be to just remove these lines and
leave the clock running as it is reconfigured later on during
boot anyway.
Signed-off-by: NSimon Horman <horms@verge.net.au>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>