This driver clearly needs OF_GPIO so depend on it.
Fixes a build error.

Cc: Andrei Stefanescu <Andrei.Stefanescu@microchip.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch adds a driver for Cadence GPIO controller.

It can be enabled with GPIO_CADENCE Kconfig option.
It uses generic GPIO infrastructure and works
as an interrupt controller.
At the moment it only supports level sensitive irqs.
Signed-off-by: NJan Kotas <jank@cadence.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch adds a DT binding documentation for
Cadence GPIO controller.
Signed-off-by: NJan Kotas <jank@cadence.com>
Reviewed-by: NRob Herring <robh@kernel.org>
[Removed interrupt-parent]
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Variable err is defined but never used. Remove it. Cleans up warning:

warning: unused variable ‘err’ [-Wunused-variable]
Signed-off-by: NColin Ian King <colin.king@canonical.com>
Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Calling readl directly instead of going through another function that
results in the same result to remove some overhead. I didn't try to
measure the performance gain, but IMHO there is little benefit from
abstracting a GPIO register access in the GPIO driver.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Remove duplicated assignment statement from aspeed_gpio_probe() function.
Signed-off-by: NTao Ren <taoren@fb.com>
Acked-by: NJoel Stanley <joel@jms.id.au>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

PIOBU pins do not lose their voltage during Backup/Self-refresh.
This patch adds a simple GPIO controller for them and a
maintainer for the driver.

This driver adds support for using the pins as GPIO
offering the possibility to read/set the voltage.
Signed-off-by: NAndrei Stefanescu <andrei.stefanescu@microchip.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch describes the Security Module's usage as a GPIO
controller for its PIOBU pins. These pins have the special
property of maintaining their voltage during suspend-to-mem.
Signed-off-by: NAndrei Stefanescu <andrei.stefanescu@microchip.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The device tree bindings for the MMC card detect and
write protect lines specify that these should be active
low unless "cd-inverted" or "wp-inverted" has been
specified.

However that is not how the kernel code has worked. It
has always respected the flags passed to the phandle in
the device tree, but respected the "cd-inverted" and
"wp-inverted" flags such that if those are set, the
polarity will be the inverse of that specified in the
device tree.

Switch to behaving like the old code did and fix the
regression.

Fixes: 81c85ec1 ("gpio: OF: Parse MMC-specific CD and WP properties")
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Reported-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Document Renesas' RZ/G2E (R8A774C0) GPIO blocks compatibility within the
relevant dt-bindings.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Commit 21abf103
("gpio: Pass a flag to gpiochip_request_own_desc()")
started to pass an enum gpiod_flags but this file is
not including the header file that defines that enum
and the compiler spits:

drivers/memory/omap-gpmc.c: In function
			    'gpmc_probe_generic_child':
drivers/memory/omap-gpmc.c:2174:9: error: type of formal
				   parameter 4 is incomplete
         0);
         ^

Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Reported-by: NStephen Rothwell <sfr@canb.auug.org.au>
Fixes: 21abf103 ("gpio: Pass a flag to gpiochip_request_own_desc()")
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This fixes up a new user of gpiochip_request_own_desc() in
the AMS Delta board that appeared after the patch that was
applied recently.

Fixes: 21abf103 ("gpio: Pass a flag to gpiochip_request_own_desc()")
Reviewed-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Select REGMAP_I2C in Kconfig, since the driver now depends on regmap
and this was missing, thus breaking build on various systems.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

We're getting a reference RPi's firmware node in order to be able to
communicate with it's driver. We should decrease the reference count on
the dt node after being done with it.

Fixes: a98d90e7 ("gpio: raspberrypi-exp: Driver for RPi3 GPIO expander via mailbox service")
Signed-off-by: NNicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

If CONFIG_GPOILIB is not set, the stub of gpio_to_desc() should return
the same type of error as regular version: NULL.  All the callers
compare the return value of gpio_to_desc() against NULL, so returned
ERR_PTR would be treated as non-error case leading to dereferencing of
error value.

Fixes: 79a9becd ("gpiolib: export descriptor-based GPIO interface")
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

It is possible that the PCA953x is powered down during suspend.
Use regmap cache to assure the registers in the PCA953x are in
line with the driver state after resume.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Drop pca953x_write_single() which is used in one place.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Replace the ad-hoc reg_output output register caching with generic
regcache cache. Drop pca953x_write_single() which is no longer used.
This reduces code duplication.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Replace the ad-hoc reg_direction direction register caching with generic
regcache cache. This reduces code duplication.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Convert the driver to use regmap to access the chips. Due to the convoluted
register mapping scheme, implement read/write/volatile check functions that
untangle the mess and perform check accordingly. This patch does not zap the
internal register cache of the PCA953x driver, nor does it push the regmap
access down into the gpiochip accessors to simplify the review. All that is
in subsequent patches.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Instead of having the I2C register calculation function spread across
multiple accessor functions, pull it out into a single function which
returns the adjusted register address.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The ad-hoc i2c block write can be replaced by standard register accessor
function, which correctly handles all the chip details and differences.
Do so to simplify the code.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The PCA957x and PCA953x init functions are almost the same, except for
the different register mapping and one extra write to BKEN register in
case of PCA957x. Factor out the common code.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

At this point, the pca953x_{read,write}_regs_mul() can read single bank
PCA953x GPIO chips as well. Merge the _8 and _mul functions together to
simplify the code a bit.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

At this point, these two functions only differ in whether they do or do not
set the address increment bit. The 16 GPIO case does not need to set the AI
bit, except for PCA9575 on write, while the 24 GPIO and more case does set
the AI bit always. Merge these two functions together to simplify the code
a bit.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

At this point, these two functions only differ in whether they do or do not
set the address increment bit on PCA9575. Merge these two functions together
to simplify the code a bit.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The multi-byte IO on various pca953x chips requires the auto-increment bit,
while other chips toggle the LSbit automatically. Note that LSbit toggling
only alternates between two registers during the IO, it is not the same as
address auto-increment. The driver currently assumes that #gpios > 16 implies
auto-increment, while #gpios <= 16 implies LSbit toggling. This is incorrect
at there are chips with 16 GPIOs which require the auto-increment bit.

The PCA9575, according to NXP datasheet rev. 4.2 from 16 April 2015, section
7.3 Command Register, the bit 7 in command register is the auto-increment
bit, which allows programming multiple registers sequentially.

Set this bit both in pca953x_gpio_set_multiple(), where it fixes the multi
register programming, and in pca957x_write_regs_16(), where is simplifies
the function. In fact, the pca957x_write_regs_16() now looks rather similar
to pca953x_write_regs_24() and pca953x_write_regs_16(), which is intended
for subsequent patches.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The PCAL_PINCTRL_MASK is too large. The extended register block on
PCAL6524, which is the largest chip with this block, has the block
limited to address range 0x40..0x7f. This is because the bit 7 in
the command register is used for the Address Increment functionality.

Trim the mask to 0x60 to match the datasheet and to prevent accidental
overwrite of the AI bit.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The bank_shift = fls(...) code was duplicated in the driver 5 times,
pull it into separate function.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: NKieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The IRQ core code refers to the interrupt type by that name, whereas the
term flow is almost never used. Some GPIO controllers use the term
flow_type, but it is most consistent to just go with the IRQ core
terminology.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Merge tag 'intel-gpio-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel

intel-gpio for v4.21-1

Use managed resource allocation in pch and sodaville drivers.
Switch to use for_each_set_bit() in IRQ handlers.
Headers clean up.
Sort headers in inclusion block alphabetically for better maintenance.
Convert to SPDX identifier and fixing MODULE_LICENSE() when appropriate.
Additional format fixes to rectify debug and message printing.

There is a commit which had been applied to v4.20-rc4, that's why dup.

- c3bc3ff9 MAINTAINERS: Do maintain Intel GPIO drivers via separate tree

The following is an automated git shortlog grouped by driver:

ich:
 -  Convert to use SPDX identifier
 -  Sort headers alphabetically
 -  Join string literals back
 -  Convert pr_<level> to dev_<level>
 -  Switch to use struct device instead of platform_device
 -  Simplify error handling in ichx_write_bit()

intel-mid:
 -  Convert to use SPDX identifier
 -  Remove linux/module.h and sort headers

lynxpoint:
 -  Convert to use SPDX identifier
 -  Remove linux/init.h and sort headers
 -  Use for_each_set_bit() in IRQ handler

MAINTAINERS:
 -  Do maintain Intel GPIO drivers via separate tree

merrifield:
 -  Convert to use SPDX identifier
 -  Remove linux/init.h

pch:
 -  Convert to use SPDX identifier
 -  Sort headers alphabetically
 -  Remove duplicate assignments
 -  Remove redundant __func__ from debug print
 -  Use for_each_set_bit() in IRQ handler
 -  Convert to dev_pm_ops
 -  Convert to use managed functions pcim_* and devm_*

sch:
 -  Convert to use SPDX identifier
 -  Remove linux/init.h and sort headers

sodaville:
 -  Convert to use SPDX identifier
 -  Sort headers alphabetically
 -  Use for_each_set_bit() in IRQ handler
 -  Convert to use managed functions pcim_* and devm_*

Before things go out of hand, make it possible to pass
flags when requesting "own" descriptors from a gpio_chip.
This is necessary if the chip wants to request a GPIO with
active low semantics, for example.

Cc: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Roger Quadros <rogerq@ti.com>
Reviewed-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The problem is reported for allmodconfig build setup:

  ERROR: "irq_chip_retrigger_hierarchy" [drivers/gpio/gpio-lpc18xx.ko] undefined!
  make[2]: *** [scripts/Makefile.modpost:92: __modpost] Error 1
  make[1]: *** [Makefile:1271: modules] Error 2

My testing in runtime shows that it is sufficient to remove .irq_retrigger
callback, which is assigned to unexported irq_chip_retrigger_hierarchy()
function, I did't observe any regressions, and thus apparently it is a
better fix rather than exporting the function defined in kernel/irq/chip.c
(see commit 52b2a05f ("genirq: Export IRQ functions for module use"))
or sticking the GPIO controller driver build to built-in option only.
Reported-by: Nkbuild test robot <lkp@intel.com>
Fixes: 5ddabfe8 ("gpio: lpc18xx: add GPIO pin interrupt controller support")
Signed-off-by: NVladimir Zapolskiy <vz@mleia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Reduce size of duplicated comments by switching to use SPDX identifier.

No functional change.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>

Reduce size of duplicated comments by switching to use SPDX identifier.

No functional change.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>

Reduce size of duplicated comments by switching to use SPDX identifier.

No functional change.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>

Reduce size of duplicated comments by switching to use SPDX identifier.

No functional change.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>

Reduce size of duplicated comments by switching to use SPDX identifier.

No functional change.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>

Reduce size of duplicated comments by switching to use SPDX identifier.

No functional change.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>