- 30 4月, 2013 6 次提交
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由 Joachim Eastwood 提交于
Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Matus Ujhelyi 提交于
Signed-off-by: NMatus Ujhelyi <matus.ujhelyi@streamunlimited.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Matus Ujhelyi 提交于
Signed-off-by: NMatus Ujhelyi <matus.ujhelyi@streamunlimited.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Kim, Milo 提交于
Enable supporting the DT structure of LP855x family devices. If the platform data is NULL, the driver tries to parse a DT structure. Then, the platform data is copied from the DT. Documentation is added as well. Signed-off-by: NMilo(Woogyom) Kim <milo.kim@ti.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Philipp Zabel 提交于
This patch depends on "genalloc: add devres support, allow to find a managed pool by device", which provides the of_get_named_gen_pool and dev_get_gen_pool functions. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Acked-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Cc: Michal Simek <monstr@monstr.eu> Cc: Dong Aisheng <dong.aisheng@linaro.org> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Huang Shijie <shijie8@gmail.com> Cc: Matt Porter <mporter@ti.com> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Philipp Zabel 提交于
This driver requests and remaps a memory region as configured in the device tree. It serves memory from this region via the genalloc API. It optionally enables the SRAM clock. Other drivers can retrieve the genalloc pool from a phandle pointing to this drivers' device node in the device tree. The allocation granularity is hard-coded to 32 bytes for now, to make the SRAM driver useful for the 6502 remoteproc driver. There is overhead for bigger SRAMs, where only a much coarser allocation granularity is needed: At 32 bytes minimum allocation size, a 256 KiB SRAM needs a 1 KiB bitmap to track allocations. [akpm@linux-foundation.org: fix Kconfig text, make sram_init static] Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Reviewed-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Tested-by: NMichal Simek <monstr@monstr.eu> Cc: Dong Aisheng <dong.aisheng@linaro.org> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Huang Shijie <shijie8@gmail.com> Cc: Javier Martin <javier.martin@vista-silicon.com> Cc: Matt Porter <mporter@ti.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 28 4月, 2013 1 次提交
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由 Alexander Shiyan 提交于
Patch adds device tree probe support for mc13783-regulator driver. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NMark Brown <broonie@sirena.org.uk>
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- 24 4月, 2013 3 次提交
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由 Masanari Iida 提交于
Fix spelling typos in Documentation/devicetree/bindings. Signed-off-by: NMasanari Iida <standby24x7@gmail.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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由 Marek Vasut 提交于
Support the BGR666 format on the IPUv3 parallel display. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Matthijs Kooijman 提交于
This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: NMatthijs Kooijman <matthijs@stdin.nl> Signed-off-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 17 4月, 2013 1 次提交
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由 Rhyland Klein 提交于
This property is meant to be used in device nodes which represent power_supply devices that wish to provide a list of supplies which provide them power, such as a battery listing its chargers. Signed-off-by: NRhyland Klein <rklein@nvidia.com> Signed-off-by: NAnton Vorontsov <anton@enomsg.org>
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- 16 4月, 2013 3 次提交
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由 Thomas Abraham 提交于
With device core now able to setup the default pin configuration, the pin configuration code based on the deprecated Samsung specific gpio bindings is removed. Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org> Signed-off-by: NDoug Anderson <dianders@chromium.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NDoug Anderson <dianders@chromium.org> Tested-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NGrant Likely <grant.likely@linaro.org>
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由 Lad, Prabhakar 提交于
add a missing double quote for compatible property for pmx_wkup. Signed-off-by: NLad, Prabhakar <prabhakar.csengg@gmail.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Cc: Tony Lindgren <tony@atomide.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-doc@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Bastian Hecht 提交于
We add the possibility to hand over a GPIO number for the reset pin. This way we can remove existing board code that takes care of it and group this information properly in the platform data or in the device tree configuration. Signed-off-by: NBastian Hecht <hechtb+renesas@gmail.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
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- 13 4月, 2013 3 次提交
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由 Sebastian Hesselbarth 提交于
This patch adds a common clock driver for Silicon Labs Si5351a/b/c i2c programmable clock generators. Currently, the driver does not support VXCO feature of si5351b. Passing platform_data or DT bindings selectively allows to overwrite stored Si5351 configuration which is very helpful for clock generators with empty eeprom configuration. Corresponding device tree binding documentation is also added. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NDaniel Mack <zonque@gmail.com> Acked-by: NGuenter Roeck <linux@roeck-us.net> Tested-by: NMichal Bachraty <michal.bachraty@streamunlimited.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Gregory CLEMENT 提交于
Add support for DT "fixed-factor-clock" binding to the common fixed factor clock support. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: NChristian Ruppert <christian.ruppert@abilis.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Peter Huewe 提交于
This driver adds support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. The driver works now also fine with device trees, so you can instantiate your device by adding: + tpm { + compatible = "infineon,slb9645tt"; + reg = <0x20>; + }; for SLB 9645 devices or + tpm { + compatible = "infineon,slb9635tt"; + reg = <0x20>; + }; for SLB 9635 devices to your device tree. tpm_i2c_infineon is also retained as a compatible id as a fallback to slb9635 protocol. The driver was tested on Beaglebone. Signed-off-by: NPeter Huewe <peter.huewe@infineon.com> Signed-off-by: NKent Yoder <key@linux.vnet.ibm.com>
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- 12 4月, 2013 3 次提交
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由 Sascha Hauer 提交于
Not much to do here, only the compatible entries have to be added. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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由 Sebastian Hesselbarth 提交于
This patch adds an optional shared block clock to avoid lockups on clock gated controllers. Besides the new clock, clock handling for existing clocks is cleaned up and moved to devm_clk_get. Device tree binding documentation is updated for the new clocks property. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sebastian Hesselbarth 提交于
Commit 3d604da1 ("net: mvmdio: get and enable optional clock") was missing an update of the corresponding device tree binding documentation. This patch adds the clocks property to mvmdio binding documentation. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 4月, 2013 1 次提交
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由 Amit Daniel Kachhap 提交于
This patch adds dvfs support for exynos5440 SOC. This soc has 4 cores and they scale at same frequency. The nature of exynos5440 clock controller is different from previous exynos controllers so not using the common exynos cpufreq framework. The major difference being interrupt notification for frequency change. Also, OPP library is used for device tree parsing to get different parameters like frequency, voltage etc. Since the opp library sorts the frequency table in ascending order so they are again re-arranged in descending order. This will have one-to-one mapping with the clock controller state management logic. Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 09 4月, 2013 4 次提交
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由 Tomasz Figa 提交于
This patch adds pinctrl-s3c64xx driver which implements pin control interface for Samsung S3C64xx SoCs. Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Maxime Ripard 提交于
The Allwinner sun6i (A31) has a slightly different watchdog, that doesn't allow to use the already existing restart code. Rework a bit the restart code to allow to plug in more easily different restart handlers depending on the device tree. In the past, we were also meaning sunxi as a generic name covering all Allwinner SoCs. This won't be true anymore with the A31 (sun6i) that differs pretty much from sun4i and sun5i, and we will end up having sunxi, for sun4i and sun5i, and sun6i, which is neither consistent nor convenient. So, while we're at it, also change sunxi to sun4i. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
During the introduction of the Allwinner SoC platforms, sunxi was initially meant as a generic name for all the variants of the Allwinner SoC. It was ok at the time of the support of only the A10 and A13 that looks pretty much the same, but it's beginning to be troublesome with the future addition of the Allwinner A31 (sun6i) that is quite different, and would introduce some weird logic, where sunxi would actually mean in some case sun4i and sun5i but without sun6i... Moreover, it makes the compatible strings naming scheme not consistent with other architectures, where usually for this kind of compability, we just use the oldest SoC name that has this IP, so let's do just this. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
During the introduction of the Allwinner SoC platforms, sunxi was initially meant as a generic name for all the variants of the Allwinner SoC. It was ok at the time of the support of only the A10 and A13 that looks pretty much the same, but it's beginning to be troublesome with the future addition of the Allwinner A31 (sun6i) that is quite different, and would introduce some weird logic, where sunxi would actually mean in some case sun4i and sun5i but without sun6i... Moreover, it makes the compatible strings naming scheme not consistent with other architectures, where usually for this kind of compability, we just use the oldest SoC name that has this IP, so let's do just this. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 08 4月, 2013 1 次提交
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由 Naveen Krishna Chatradhi 提交于
This patch adds DT support to NTC driver to parse the platform data. Also adds the support to work as an iio device client. During the probe ntc driver gets the respective channels of ADC and uses iio_raw_read calls to get the ADC converted value. Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com> [Guenter Roeck: fixed Kconfig dependencies; use ERR_CAST] Tested-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NGuenter Roeck <linux@roeck-us.net>
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- 07 4月, 2013 3 次提交
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由 Laxman Dewangan 提交于
Add SPI driver for NVIDIA's Tegra114 SPI controller. This controller is different than the older SoCs SPI controller in internal design as well as register interface. This driver supports the: - non DMA based transfer for smaller transfer i.e. less than FIFO depth. - APB DMA based transfer for larger transfer i.e. more than FIFO depth. - Clock gating through runtime PM callbacks. - registration through DT only. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Andreas Larsson 提交于
This adds support for the mostly register-compatible SPICTRL cores from the GRLIB VHDL IP core library from Aeroflex Gaisler. They are normally running on SPARC. A different entry in of_fsl_spi_match matches this core and indicates a different hardware type that is used to set up different function pointers and special cases. The GRLIB core operates in cpu mode. The number of bits per word might be limited. There might be native chipselects selected via a slave select register. These differences to the FSL type cores, if present, are indicated by a capabilities register. Other register and function differences exists but are not relevant to the driver. Acked-by: NAnton Vorontsov <anton@enomsg.org> Signed-off-by: NAndreas Larsson <andreas@gaisler.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Andreas Larsson 提交于
This makes the spi-fsl-spi driver usable in CPU mode outside of an FSL_SOC and even an powerpc environment by moving CPM mode functionality to a separate file that is only compiled and linked in an FSL_SOC environment and adding some ifdefs to hide types and functions or provide alternatives. For devicetree probing a "clock-frequency" property is used for clock frequency instead of calls to FSL_SOC-specific functions. Acked-by: NAnton Vorontsov <anton@enomsg.org> Signed-off-by: NAndreas Larsson <andreas@gaisler.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 05 4月, 2013 4 次提交
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由 Tomasz Figa 提交于
This patch adds Device Tree support to max8952 regulator driver. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Sylwester Nawrocki 提交于
This patch adds DT binding documentaton for the Imaging Subsystem (camera ISP) found on Samsung Exynos4x12 SoCs. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Sylwester Nawrocki 提交于
The 'camera' DT node needs to have sclk_cam0/1 and pxl_async0/1 clocks specified, while 'fimc' nodes should have only "fimc" and "sclk_fimc". "mux" and "parent" are leftovers from early versions of patches adding DT support, when the IP bus clock parent clock was being set by the driver. A better solution is needed to have e.g. clocks driver setting all required parent clocks, before clock consumers start using the clocks. Currently this binding doesn't describe parent clocks setup, it needs to be specified and handled somewhere else. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Emilio López 提交于
This patchset adds DT support for all the AXI, AHB, APB0 and APB1 gates present on sunxi SoCs. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Reviewed-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 04 4月, 2013 1 次提交
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由 Tony Prisk 提交于
Now that a display timing binding is available, convert our almost identical binding to use the standard binding. This patch converts the vt8500 and wm8505 framebuffer drivers and associated dts/dtsi files to use the standard binding as defined in bindings/video/display-timing.txt. There are two side-effects of making this conversion: 1) The fb node should now be in the board file, rather than the soc file as the display-timing node is a child of the fb node. 2) We still require a bits per pixel property to initialize the framebuffer for the different lcd panels. Rather than including this as part of the display timing, it is moved into the framebuffer node. I have also taken the opportunity to alphabetise the includes of each driver to avoid double-ups. Signed-off-by: NTony Prisk <linux@prisktech.co.nz> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 03 4月, 2013 3 次提交
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On the at91_adc a minimal Sample and Hold Time is necessary for the ADC to guarantee the best converted final value between two channels selection. This time has to be programmed through the bitfield SHTIM in the Mode Register ADC_MR. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
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The sleep mode will allow to put the adc in sleep between conversion. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
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由 Ludovic Desroches 提交于
at91 adc offers the choice between two resolutions: low and high. The low and high resolution values depends on adc IP version, as many IP properties have been exposed through device tree, these settings have also been added to the dt bindings. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NJonathan Cameron <jic23@kernel.org>
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- 02 4月, 2013 2 次提交
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由 Viresh Kumar 提交于
big LITTLE is ARM's new Architecture focussing power/performance needs of modern world. More information about big LITTLE can be found here: http://www.arm.com/products/processors/technologies/biglittleprocessing.php http://lwn.net/Articles/481055/ In order to keep cpufreq support for all big LITTLE platforms simple/generic, this patch tries to add a generic cpufreq driver layer for all big LITTLE platforms. The driver is divided into two parts: - Core driver: Generic and shared across all big LITTLE SoC's - Glue drivers: Per platform drivers providing ops to the core driver This patch adds in a generic glue driver which would extract information from Device Tree. Future SoC's can either reuse the DT glue or write their own depending on the need. Signed-off-by: NSudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Viresh Kumar 提交于
"clock-latency" is incorrectly written as "transition-latency" in an example present in Documentation of cpufreq-cpu0. Fix it. Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 01 4月, 2013 1 次提交
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由 Rhyland Klein 提交于
This updates the DT documentation to reflect that the tps65090-charger should be represented as a child node of the tps65090 device itself. Signed-off-by: NRhyland Klein <rklein@nvidia.com> Signed-off-by: NAnton Vorontsov <anton@enomsg.org>
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