- 28 5月, 2010 2 次提交
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由 Zhangfei Gao 提交于
Signed-off-by: NZhangfei Gao <zgao6@marvell.com> Reviewed-by: NMatt Fleming <matt@console-pimps.org> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Anton Vorontsov 提交于
Some hosts (e.g. as found in CNS3xxx SOCs) report wrong value in CLOCK_BASE capability field, and currently there is no way to force the SDHCI core to use the platform-provided base clock value. This patch implements CAP_CLOCK_BASE_BROKEN quirk. When enabled, the SDHCI core will always use base clock frequency provided by the platform. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Cc: Richard Röjfors <richard.rojfors@pelagicore.com> Cc: David Vrabel <david.vrabel@csr.com> Cc: Pierre Ossman <pierre@ossman.eu> Cc: Ben Dooks <ben@simtec.co.uk> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 18 12月, 2009 1 次提交
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由 Albert Herranz 提交于
Signed-off-by: NAlbert Herranz <albert_herranz@yahoo.es> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 23 9月, 2009 2 次提交
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由 Richard Röjfors 提交于
Add support for ADMA on SDHCI hosts, not supporting SDMA. According to the SDHCI specifications a host can support ADMA but not SDMA Signed-off-by: NRichard Röjfors <richard.rojfors@mocean-labs.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Anton Vorontsov 提交于
eSDHC fails to recognize some SDHS cards, throwing timeout errors: mmc0: error -110 whilst initialising SD card That's because we calculate timeout value in a wrong way: on eSDHC hosts the timeout clock is derivied from the SD clock, which is set dynamically. As David Vrabel suggested, deriving timeout clock from SD clock is a common scheme, so let's implement DATA_TIMEOUT_USES_SDCLK quirk and use it for eSDHC hosts. Also, from now on we don't need esdhc_get_timeout_clock() callback, so remove it. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Cc: Pierre Ossman <pierre@ossman.eu> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: David Vrabel <david.vrabel@csr.com> Cc: Ben Dooks <ben@fluff.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 30 7月, 2009 1 次提交
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由 Anton Vorontsov 提交于
Since commit 8dfd0374 ("MMC core: limit minimum initialization frequency to 400kHz") MMC core checks for minimum frequency, and that causes following messages flood when using eSDHC controllers: ... mmc0: Minimum clock frequency too high for identification mode mmc0: Minimum clock frequency too high for identification mode ... The warnings are legitimate, since if we'd use 133 MHz clocks for standard SDHCI controllers, we'd not able to scale frequency down to 400 kHz. But eSDHC controllers have a non-standard SD clock management, so we can divide clock by 256 * 16, not just 256. This patch introduces get_min_clock() callback for sdhci core and implements it for sdhci-of driver, and thus fixes the issue. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Cc: Matt Fleming <matt@console-pimps.org> Cc: Ian Molton <ian@mnementh.co.uk> Cc: "Roberto A. Foglietta" <roberto.foglietta@gmail.com> Cc: Pierre Ossman <drzeus@drzeus.cx> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 22 6月, 2009 3 次提交
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由 Harald Welte 提交于
The SDHCI controller found in the VX855ES requires 10ms delay between applying power and applying clock. This issue has been discovered and documented by the OLPC XO1.5 team. Signed-off-by: NHarald Welte <HaraldWelte@viatech.com> Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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由 Anton Vorontsov 提交于
Some hosts (hardware configurations, or particular SD/MMC slots) may not support 4-bit bus. For example, on MPC8569E-MDS boards we can switch between serial (1-bit only) and nibble (4-bit) modes, thought we have to disable more peripherals to work in 4-bit mode. Along with some small core changes, this patch modifies sdhci-of driver, so that now it looks for "sdhci,1-bit-only" property in the device-tree, and if specified we enable a proper quirk. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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由 Ben Dooks 提交于
Add quirk to show the controller cannot do multi-block IO. This is mainly for the Samsung SDHCI controller that currently cannot manage to do multi-block PIO without timing out. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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- 14 6月, 2009 1 次提交
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由 Pierre Ossman 提交于
Because of granularity issues, sometimes we told the hardware to change to the voltage we were already at. Rework the logic so this doesn't happen. Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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- 04 5月, 2009 1 次提交
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由 Pierre Ossman 提交于
We forgot to add the ADMA error bit to the list of data interrupts. Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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- 25 3月, 2009 9 次提交
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由 Anton Vorontsov 提交于
FSL eSDHC controllers can support maximum block size up to 4096 bytes, the MBL (Maximum Block Length) field in the capabilities register extended by one bit, and is set to 0x3. But the SDHCI core doesn't support blocks of 4096 bytes, and thus forces blksz to the lowest value -- 512 bytes. With this patch we can pin up the blksz to the maximum supported block size, i.e. 2048 bytes. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
FSL eSDHC controllers losing signal/interrupt enable states after reset, so we should re-enable them. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
Small udelay is needed to make eSDHC work in PIO mode. Without the delay reading causes endless interrupt storm, and writing corrupts data. The first guess would be that we must wait for some bit in some register, but I didn't find any reliable bits that change before and after the delay. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
FSL eSDHC hosts have incompatible register map to manage the SDCLK. This patch adds set_clock callback so that drivers could overwrite set_clock behaviour. Similar patch[1] was posted by Ben Dooks, though in Ben's version the callback is named change_clock, plus the patch has some unrelated bits that makes the patch difficult to reuse. [1] http://lkml.org/lkml/2008/12/2/160Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Ben Dooks 提交于
Some controllers do not provide clock information in their capabilities (in the Samsung case, it is because there are multiple clock sources available to the controller). Add hooks to allow the system to supply clock information. p.s. In the original Ben's patch there was a bug that makes sdhci_add_host() return -ENODEV even if callbacks were specified. This is fixed now. Signed-off-by: NBen Dooks <ben-linux@fluff.org> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
This patch adds SDHCI_QUIRK_INVERTED_WRITE_PROTECT quirk. When specified, the sdhci driver will invert WP state. p.s. Actually, the quirk is more board-specific than controller-specific. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
This patch adds SDHCI_QUIRK_BROKEN_CARD_DETECTION quirk. When specified, sdhci driver will set MMC_CAP_NEEDS_POLL MMC host capability, and won't enable card insert/remove interrupts. This is needed for hosts with unreliable card detection, such as FSL eSDHC. The original eSDHC driver was tring to "debounce" card-detection IRQs by reading present state and disabling particular interrupts. But with this debouncing scheme I noticed that sometimes we miss card insertion/removal events. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
Card detection interrupts should be handled separately as they should not be enabled before mmc_add_host() returns and should be disabled before calling mmc_remove_host(). The same is for suspend and resume routines. sdhci_init() no longer enables card-detection irqs. Instead, two new functions implemented: sdhci_enable_card_detection() and sdhci_disable_card_detection(). New sdhci_reinit() call implemented to behave the same way as the old sdhci_init(). Also, this patch implements and uses few new helpers to manage IRQs in a more conveinient way, that is: - sdhci_clear_set_irqs() - sdhci_unmask_irqs() - sdhci_mask_irqs() - SDHCI_INT_ALL_MASK constant sdhci_enable_sdio_irq() converted to these new helpers, plus the helpers will be used by the subsequent patches. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
Currently the SDHCI driver works with PCI accessors (write{l,b,w} and read{l,b,w}). With this patch drivers may change memory accessors, so that we can support hosts with "weird" IO memory access requirments. For example, in "FSL eSDHC" SDHCI hardware all registers are 32 bit width, with big-endian addressing. That is, readb(0x2f) should turn into readb(0x2c), and readw(0x2c) should be translated to le16_to_cpu(readw(0x2e)). Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 03 3月, 2009 1 次提交
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由 Ben Dooks 提交于
The Samsung SDHCI (and FSL eSDHC) controller block seems to fail to generate an INT_DATA_END after the transfer has completed and the bus busy state finished. Changes in e809517f to use the new busy method are the cause of the behaviour change. Signed-off-by: NBen Dooks <ben-linux@fluff.org> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 19 2月, 2009 1 次提交
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由 Helmut Schaa 提交于
Fix the led device naming for the sdhci driver. The led class documentation defines the led name to have the form "devicename:colour:function" while not applicable sections should be left blank. To comply with the documentation the led device name is changed from "mmc*" to "mmc*::". Signed-off-by: NHelmut Schaa <helmut.schaa@googlemail.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 18 2月, 2009 1 次提交
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由 Pierre Ossman 提交于
This reverts commit a4b76193. It turned out that the controller had problem running at the higher speed, so go back to trusting the hardware capability bits. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 01 1月, 2009 1 次提交
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由 Éric Piel 提交于
CONFIG_LEDS_CLASS is defined only if led-class is built-in, otherwise when it is a module the option is called CONFIG_LEDS_CLASS_MODULE. Led support should also be activated in this case. Signed-off-by: NEric Piel <eric.piel@tremplin-utc.net> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 12 10月, 2008 1 次提交
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由 Pierre Ossman 提交于
Some high speed capable controllers forget to set the high speed capability bit. Make sure we enable the functionality anyway. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 02 8月, 2008 1 次提交
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由 Pierre Ossman 提交于
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 27 7月, 2008 1 次提交
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由 Andrew Morton 提交于
alpha: drivers/mmc/host/sdhci.h:242: error: field 'sg_miter' has incomplete type Cc: Pierre Ossman <drzeus@drzeus.cx> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 23 7月, 2008 1 次提交
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由 Pierre Ossman 提交于
Improve the PIO handling so that it can service highmem pages. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 15 7月, 2008 4 次提交
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由 Pierre Ossman 提交于
Add support for the scatter-gather DMA mode present on newer controllers. As the mode requires 32-bit alignment, non-aligned chunks are handled by using a bounce buffer. Also add some new quirks to handle controllers that have bugs in the ADMA engine. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Pierre Ossman 提交于
Gracefully handle when the device is suddenly removed. Do a test read and avoid any further access if that read returns -1. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Pierre Ossman 提交于
Give the quirk for broken timeout handling a better chance of handling more controllers by simply classifying the system as broken and setting a fixed value. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Pierre Ossman 提交于
The SDHCI interface is not PCI specific, yet the Linux driver was intimitely connected to the PCI bus. This patch properly separates the PCI specific portion from the bus independent code. This patch is based on work by Ben Dooks but he did not have time to complete it. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 13 5月, 2008 1 次提交
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由 Harvey Harrison 提交于
Otherwise it can only take the values 0/-1 which doesn't seem to have been intended. drivers/mmc/host/sdhci.h:190:20: error: dubious one-bit signed bitfield Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com> Acked-by: NPierre Ossman <drzeus-list@drzeus.cx> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 19 4月, 2008 2 次提交
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由 Pierre Ossman 提交于
Hook up the controller LED to the LED subsystem, allowing more flexible control than simply indicating an ongoing request. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Pierre Ossman 提交于
Remove the use of the sdhci specific device name and use the mmc controller name instead. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 08 2月, 2008 1 次提交
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由 Feng Tang 提交于
Some devices have several controllers; need add the index info to device slot name host->slot_desc[] Signed-off-by: NFeng Tang <feng.tang@intel.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 13 12月, 2007 1 次提交
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由 Pierre Ossman 提交于
Some controllers have been designed on the assumption that all transfers will be 32-bit aligned, both in start address and in size. This is not a guarantee the SDHCI specification provides and not one we can provide. Revert back to PIO for individual requests in order to work around the hardware bug. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 04 10月, 2007 1 次提交
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由 Nicolas Pitre 提交于
Signed-off-by: NNicolas Pitre <nico@cam.org> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 23 8月, 2007 1 次提交
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由 Pierre Ossman 提交于
It is fully legal for a controller to start issuing data related interrupts before it has signalled that the command has completed. Make sure the driver actually can handle this. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 26 7月, 2007 1 次提交
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由 Pierre Ossman 提交于
Make sure all headers in the files reflect their true position in the tree. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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