- 30 4月, 2015 5 次提交
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由 Gregory Herrero 提交于
This is required due to an Intel specific hardware issue. Where id- pin setup causes glitches on the interrupt line when CONIDSTSCHG interrupt is enabled. Specify external_id_pin_ctl when an external driver (for example phy) can handle id change, so that CONIDSTSCHG interrupt can be disabled from the controller. Acked-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NGregory Herrero <gregory.herrero@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Gregory Herrero 提交于
Allow controller to enter in hibernation during usb bus suspend and inform both phy and gadget about the suspended state. While in hibernation, the controller can't detect the resume condition. An external mechanism must call usb_phy_set_suspend on resume. Exit hibernation when controller gets the resume interrupt and inform only gadget driver about it. Acked-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NGregory Herrero <gregory.herrero@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Gregory Herrero 提交于
When suspending usb bus, phy driver may disable controller power. In this case, registers need to be saved on suspend and restored on resume. Acked-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NGregory Herrero <gregory.herrero@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Mian Yousaf Kaukab 提交于
Dump all registers to take a complete snapshot of dwc2 state. Code is inspired by dwc3/debugfs.c Acked-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NMian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Mian Yousaf Kaukab 提交于
Prepare to add more debug code. Moreover, don't save dentry * for each file in struct dwc2_hsotg as clean up is done with debugfs_remove_recursive(). s3c_hsotg_delete_debug() is removed altogether for the same reason. Acked-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NMian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 13 3月, 2015 1 次提交
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由 Marek Szyprowski 提交于
If device is configured to work only in HOST or DEVICE mode, there is no point in initializing both subdrivers. This patch also fixes resource leakage if host subdriver fails to initialize. Acked-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 31 1月, 2015 3 次提交
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由 Gregory Herrero 提交于
Add a flag to request physical reset of the controller when s3c_hsotg_core_init_disconnected is called. During the usb reset, controller must not be fully reconfigured and resetted. Else this leads to shorter chirp-k duration during enumeration. Tested-by: NRobert Baldyga <r.baldyga@samsung.com> Acked-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NGregory Herrero <gregory.herrero@intel.com> Signed-off-by: NMian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Mian Yousaf Kaukab 提交于
When using DMA, dwc2 requires buffers to be 4 bytes aligned. Use bounce buffers if they are not. Tested-by: NRobert Baldyga <r.baldyga@samsung.com> Acked-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NMian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Gregory Herrero 提交于
Handle SET_FEATURE TEST_MODE request sent by the host. Slightly rework FEATURE request handling to allow parsing other request types than Endpoint. Also add a debugfs to change test mode value from user space. Tested-by: NRobert Baldyga <r.baldyga@samsung.com> Acked-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NGregory Herrero <gregory.herrero@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 13 1月, 2015 8 次提交
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由 Mian Yousaf Kaukab 提交于
This flag is set before sending the zlp. So use present tense instead of the past tense. Tested-by: NRobert Baldyga <r.baldyga@samsung.com> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NMian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Mian Yousaf Kaukab 提交于
Manage ep0 state in software to add handling of status OUT stage. Just toggling hsotg->setup in s3c_hsotg_handle_outdone leaves it in wrong state in 2-stage control transfers. Moreover, ensure that for setup-packet s3c_hsotg_handle_outdone is called either from SetupDone or OutDone but not both. Dwc2 ip v3.00a generates both SetupDone and OutDone on setup packets. Tested-by: NRobert Baldyga <r.baldyga@samsung.com> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NMian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Mian Yousaf Kaukab 提交于
These members are only occupying space. Tested-by: NRobert Baldyga <r.baldyga@samsung.com> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NMian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Gregory Herrero 提交于
As fifo size can vary between SOCs, add possibility to configure them from device tree. Fifo sizes used by the legacy driver will be used If they are not provided by the device tree. Tested-by: NRobert Baldyga <r.baldyga@samsung.com> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGregory Herrero <gregory.herrero@intel.com> Signed-off-by: NMian Yousaf Kaukab <yousaf.kaukab@intel.com> Reviewed-by: NRobert Baldyga <r.baldyga@samsung.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Mian Yousaf Kaukab 提交于
GHWCFG1 provides hardware configuration of each endpoint. Use it to configure the endpoints instead of assuming all even endpoint are OUT and all odd endpoints are IN. Tested-by: NRobert Baldyga <r.baldyga@samsung.com> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NMian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Gregory Herrero 提交于
* Add an of specific function to parse device node properties. * Enable dma usage only if device tree property 'g_use_dma' is present. Tested-by: NRobert Baldyga <r.baldyga@samsung.com> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGregory Herrero <gregory.herrero@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Mian Yousaf Kaukab 提交于
When using DMA, data of the previous setup packet can be read back from cache because ep0 and ctrl buffers are embedded in struct s3c_hsotg. Allocate buffers instead of embedding them. Tested-by: NRobert Baldyga <r.baldyga@samsung.com> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NMian Yousaf Kaukab <yousaf.kaukab@intel.com> Reviewed-by: NRobert Baldyga <r.baldyga@samsung.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Mickael Maison 提交于
Fixed 3 typos in comments Signed-off-by: NMickael Maison <mickael.maison@gmail.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 21 11月, 2014 3 次提交
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由 Marek Szyprowski 提交于
Suspend/resume code assumed that the gadget was always started and enabled to connect to usb bus. This means that the actual state of the gadget (started/stopped or connected/disconnected) was not correctly preserved on suspend/resume cycle. This patch fixes this issue. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Marek Szyprowski 提交于
This patch adds mutex, which protects initialization and deinitialization procedures against suspend/resume methods. This mutex will be needed by the updated suspend/resume calls, which tracks gadget state. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Marek Szyprowski 提交于
This patch adds a call to s3c_hsotg_disconnect() from 'end session' interrupt (GOTGINT_SES_END_DET) to correctly notify gadget subsystem about unplugged usb cable. DISCONNINT interrupt cannot be used for this purpose, because it is asserted only in host mode. To avoid reporting disconnect event more than once, a disconnect call has been moved from USB_REQ_SET_ADDRESS handling function to SESSREQINT interrupt. This way driver ensures that disconnect event is reported either when usb cable is unplugged or every time the host starts a new session. To handle devices which has been synthesized without SRP support, connected state is set in ENUMDONE interrupt. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 15 11月, 2014 3 次提交
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由 Dinh Nguyen 提交于
Initialize the USB driver to peripheral mode when a B-Device connector is attached. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Dinh Nguyen 提交于
This patch will aggregate the probing of gadget/hcd driver into platform.c. The gadget probe funtion is converted into gadget_init that is now only responsible for gadget only initialization. All the gadget resources are now handled by platform.c Since the host workqueue will not get initialized if the driver is configured for peripheral mode only. Thus we need to check for wq_otg before calling queue_work(). Also, we move spin_lock_init to common location for both host and gadget that is either in platform.c or pci.c. We also move suspend/resume code to common platform code. Lastly, move the "samsung,s3c6400-hsotg" binding into dwc2_of_match_table. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Dinh Nguyen 提交于
Adds the gadget data structure and appropriate data structure pointers to the common dwc2_hsotg data structure. To keep the driver data dereference code looking clean, the gadget variable declares are only available for peripheral and dual-role mode. This is needed so that the dwc2_hsotg data structure can be used by the hcd and gadget drivers. Updates gadget.c to use the dwc2_hsotg data structure and gadget pointers that have been moved into the common dwc2_hsotg structure. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 23 10月, 2014 1 次提交
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由 Charles Manning 提交于
The unioned u32 is used for clearing etc. Having the number of bitfield bits add up to more than 32 is broken, even if benign. Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NCharles Manning <cdhmanning@gmail.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 20 9月, 2014 2 次提交
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由 Robert Baldyga 提交于
Because we have not enough memory to have each TX FIFO of size at least 3072 bytes (the maximum single packet size with 3 transactions per microframe), we create four FIFOs of lenght 1024, and four of length 3072 bytes, and assing them to endpoints dynamically according to maxpacket size value of given endpoint. Up to now there were initialized 16 TX FIFOs, but we use only 8 IN endpoints, so we can split available memory for 8 FIFOs to have more memory for each one. It needed to do some small modifications in few places in code, because there was assumption that TX FIFO numbers assigned to endpoints are the same as the endpoint numbers, which is not true since we have dynamic FIFO assigning. Signed-off-by: NRobert Baldyga <r.baldyga@samsung.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Marek Szyprowski 提交于
Print warning if FIFOs are configured in such a way that they don't fit into the SPRAM available on the s3c hsotg module. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NRobert Baldyga <r.baldyga@samsung.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 09 9月, 2014 1 次提交
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由 Kever Yang 提交于
According to the "dr_mode", the otg controller can work as device role and host role. Some boards always want to use host mode and some other boards want to use gadget mode. We use the dts setting to set dwc2's mode, rather than fixing it to whatever hardware says. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Tested-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 25 4月, 2014 1 次提交
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由 Dinh Nguyen 提交于
This patch moves the data structures that are in the s3c-hsotg source into core.h. This is a necessary step towards unifying the s3c-hsotg and dwc2 into a single DRD. Signed-off-by: NDinh Nguyen <dinguyen@altera.com> [ jh,rb,fb - For gadget part only: ] Tested-by: NJingoo Han <jg1.han@samsung.com> Tested-by: NRobert Baldyga <r.baldyga@samsung.com> Acked-by: NFelipe Balbi <balbi@ti.com> [ pz - Tested host part only. ] Signed-off-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 14 1月, 2014 1 次提交
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由 Paul Zimmerman 提交于
The DWC2 driver should now be in good enough shape to move out of staging. I have stress tested it overnight on RPI running mass storage and Ethernet transfers in parallel, and for several days on our proprietary PCI-based platform. Signed-off-by: NPaul Zimmerman <paulz@synopsys.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 26 11月, 2013 2 次提交
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由 Paul Zimmerman 提交于
Rename dwc2_check_core_status() to dwc2_is_controller_alive(), and make it a boolean function. Also change the message when the controller is dead to say "dead" instead of "disconnected". Signed-off-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Paul Zimmerman 提交于
We were not checking the return value from any of these functions, so make them void functions Signed-off-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 04 10月, 2013 1 次提交
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由 Matthijs Kooijman 提交于
The hardware offers a 4-bit register containing the number of host channels. However, the values of these register mean 1-16 host channels, not 0-15. Since the dwc2_hw_params struct stores the actual number of host channels supported instead of the raw register value, it should be 5 bits wide instead of 4. Before this commit, hardware with 16 host channels would overflow the field, making it appear as 0 channels. This bug was introduced in commit 9badec2f (staging: dwc2: interpret all hwcfg and related register at init time). Reported-by: NDinh Nguyen <dinguyen@altera.com> Signed-off-by: NMatthijs Kooijman <matthijs@stdin.nl> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 26 9月, 2013 1 次提交
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由 Dom Cobley 提交于
The transfer scheduler in the dwc2 driver is pretty basic, not to mention buggy. It works fairly well with just a couple of devices plugged in, but if you add, say, multiple devices with periodic endpoints, the scheduler breaks down and can't even enumerate all the devices. To improve this, import the "microframe scheduler" patch from the driver in the downstream Raspberry Pi kernel, which is based on the Synopsys vendor driver. The original patch came from Denx (http://git.denx.de/?p=linux-denx.git) and was commited to the raspberrypi.org git tree by "popcornmix" (Dom Cobley). I have added a driver parameter for this, enabled by default, in case anyone has problems with it and needs to disable it. I don't think we should add a DT binding for that, though, since I plan to remove the option once any bugs are fixed. [raspberrypi.org patch from Dom Cobley] Signed-off-by: NDom Cobley <popcornmix@gmail.com> [adapted to dwc2 driver by Paul Zimmerman] Signed-off-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 31 8月, 2013 3 次提交
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由 Matthijs Kooijman 提交于
Some of the defaults were missing or unclear. In particular, I suspect the defaults were documented assuming there were still module parameters and taking the default module parameters into account. Now, the defaults are the values that will get chosen when the params passed to dwc2_hcd_init are all -1. Signed-off-by: NMatthijs Kooijman <matthijs@stdin.nl> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Matthijs Kooijman 提交于
The HWCFG4 register stores the supported utmi width values (8, 16 or both). This commit reads that value and validates the configured value against that. If no (valid) value is given, the parameter defaulted to 8 bits previously. However, the documentation for dwc2_core_params_struct suggests that the default should have been 16. Also, the pci bindings explicitely set the value to 16, so this commit changes the default to 16 bits (if supported, 8 bits otherwise). With the default changed, the value set in pci.c is changed to -1 to make it autodetected as well. Signed-off-by: NMatthijs Kooijman <matthijs@stdin.nl> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Matthijs Kooijman 提交于
Before, the hwcfg registers were read at device init time, but interpreted at various parts in the code. This commit unpacks the hwcfg register values into a struct with properly labeled variables at init time, which makes all the other code using these values more consise and easier to read. Some values that were previously stored in the hsotg struct are now moved into this new struct as well. In addition to the hwcfg registers, the contents of some fifo size registers are also unpacked. The hwcfg registers are read-only, so they can be safely stored. The fifo size registers are read-write registers, but their power-on values are significant: they give the maximum depth of the fifo they describe. This commit mostly moves code, but also attempts to simplify some expressions from (val >> shift) & (mask >> shift) to (val & mask) >> shift. Finally, all of the parameters read from the hardware are debug printed after unpacking them, so a bunch of debug prints can be removed from other places. Signed-off-by: NMatthijs Kooijman <matthijs@stdin.nl> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 13 8月, 2013 1 次提交
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由 Paul Zimmerman 提交于
Reorder the kernel doc comments for 'struct dwc2_core_params' to match the ordering in the struct itself. Reorder the members of 'struct dwc2_qh' (and its kerneldoc comments) to minimize the amount of structure padding. Signed-off-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 24 7月, 2013 1 次提交
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由 Paul Zimmerman 提交于
The dwc2 driver sets the value of the DWC2 GAHBCFG register to 0x6, which is GAHBCFG_HBSTLEN_INCR4. But different platforms may require different values. In particular, the Broadcom 2835 SOC used in the Raspberry Pi needs a value of 0x10, otherwise the DWC2 controller stops working after a short period of heavy USB traffic. So this patch adds another driver parameter named 'ahbcfg'. The default value is 0x6. Any platform needing a different value should add a DT attribute to set it. This patch also removes the 'ahb_single' driver parameter, since that bit can now be set using 'ahbcfg'. This patch does not add DT support to platform.c, I will leave that to whoever owns the first platform that needs a non-default value. (Stephen?) Signed-off-by: NPaul Zimmerman <paulz@synopsys.com> Tested-by: NStephen Warren <swarren@wwwdotorg.org> Reviewed-by: NMatthijs Kooijman <matthijs@stdin.nl> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 12 4月, 2013 2 次提交
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由 Matthijs Kooijman 提交于
Before, it was a function that would set all members of a given struct containing only int members to -1. Now, it is renamed to dwc_set_all_params and it works only on the dwc2_core_params struct. This makes sure that all of the slightly dubious casting and assumptions happen inside the function instead of by the caller. Signed-off-by: NMatthijs Kooijman <matthijs@stdin.nl> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Matthijs Kooijman 提交于
Before, this was initialized in pci.c, after the dwc2_hcd_init was called and the interrupts were enabled. This opened up a small time window where common interrupts could be triggered, but there was no handler for them, causing them to keep triggering infinitely and locking up the machine. On my RT3052 board this bug could be easily reproduced by hardcoding the console log level to 8, so that a bunch of debug output from the dwc2 driver was generated inside this time window. This caused the interrupt lockup to occur almost every time. By requesting the irq inside dwc2_core_init and by disabling interrupts before calling dwc2_core_init instead of after, we can be sure the handler is registered before the interrupts are enabled, which should close this window. Reported-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NMatthijs Kooijman <matthijs@stdin.nl> Acked-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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