- 19 1月, 2022 2 次提交
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由 Minghao Chi 提交于
Return value from amdgpu_bo_create_kernel() directly instead of taking this in another redundant variable. Reported-by: NZeal Robot <zealci@zte.com.cn> Signed-off-by: NMinghao Chi <chi.minghao@zte.com.cn> Signed-off-by: NCGEL ZTE <cgel.zte@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Stanley.Yang 提交于
Changed from v1: remove unused brace Signed-off-by: NStanley.Yang <Stanley.Yang@amd.com> Reviewed-by: NTao Zhou <tao.zhou1@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 15 1月, 2022 1 次提交
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由 Bokun Zhang 提交于
- Add interface to load SRIOV cap FW. If the FW does not exist, simply skip this FW loading routine. This FW will only be loaded under SRIOV. Other driver configuration will not be affected. By adding this interface, it will make us easier to prepare SRIOV Linux guest driver for different users. - Update sysfs interface to read cap FW version. - Refactor PSP FW loading routine under SRIOV to use a unified SWITCH statement instead of using IF statement - Remove redundant amdgpu_sriov_vf() check in FW loading routine Acked-by: NMonk Liu <monk.liu@amd.com> Acked-by: NGuchun Chen <guchun.chen@amd.com> Signed-off-by: NBokun Zhang <Bokun.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 15 12月, 2021 1 次提交
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由 Jingwen Chen 提交于
[Why] psp tmr bo will be pinned during loading amdgpu and reset in SRIOV while only unpinned in unload amdgpu [How] add amdgpu_in_reset and sriov judgement to skip pin bo v2: fix wrong judgement Signed-off-by: NJingwen Chen <Jingwen.Chen2@amd.com> Reviewed-by: NHorace Chen <horace.chen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 12月, 2021 1 次提交
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由 Zhigang Luo 提交于
For SRIOV VF, XGMI was not initialized in PSP during recover. This change added PSP XGMI initialization for SRIOV VF during recover. Signed-off-by: NZhigang Luo <zhigang.luo@amd.com> Reviewed-by: NShaoyun Liu <shaoyun.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 12月, 2021 1 次提交
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由 Guchun Chen 提交于
>> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c:503:6: warning: no previous prototype for function 'release_psp_cmd_buf' [-Wmissing-prototypes] void release_psp_cmd_buf(struct psp_context *psp) ^ drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c:503:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void release_psp_cmd_buf(struct psp_context *psp) ^ static 1 warning generated. Reported-by: Nkernel test robot <lkp@intel.com> Signed-off-by: NGuchun Chen <guchun.chen@amd.com> Reviewed-by: NKevin Wang <kevinyang.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 29 10月, 2021 1 次提交
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由 Candice Li 提交于
TA version should only be displayed in firmware version column. Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 20 10月, 2021 3 次提交
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由 Tao Zhou 提交于
Output a warning message if RAS TA returns UNSUPPORTED_ERROR_INJ status. v2: implement it in psp_ras_ta_check_status function. Signed-off-by: NTao Zhou <tao.zhou1@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tao Zhou 提交于
Create new function to check status returned by RAS TA. Signed-off-by: NTao Zhou <tao.zhou1@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tao Zhou 提交于
Some registers' access will fail without PSP RL after resume. Signed-off-by: NTao Zhou <tao.zhou1@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 10月, 2021 1 次提交
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由 Alex Deucher 提交于
Missed a few asics. v2: update comment Fixes: 82d05736 ("drm/amdgpu/amdgpu_psp: convert to IP version checking") Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 09 10月, 2021 1 次提交
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由 Guchun Chen 提交于
adev_to_drm is used everywhere, so improve recent changes when accessing drm_device pointer from amdgpu_device. Signed-off-by: NGuchun Chen <guchun.chen@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 10月, 2021 2 次提交
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由 Alex Deucher 提交于
Allow us to query instances versions more cleanly. Instancing support is not consistent unfortunately. SDMA is a good example. Sienna cichlid has 4 total SDMA instances, each enumerated separately (HWIDs 42, 43, 68, 69). Arcturus has 8 total SDMA instances, but they are enumerated as multiple instances of the same HWIDs (4x HWID 42, 4x HWID 43). UMC is another example. On most chips there are multiple instances with the same HWID. This allows us to support both forms. v2: rebase v3: clarify instancing support Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 28 9月, 2021 2 次提交
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由 Tao Zhou 提交于
Add RAS poison supported flag and tell PSP RAS TA about the info. v2: rename poison mode to poison supported, we can also disable poison mode even we support it. print value of poison supported if ras feature enablement fails. Signed-off-by: NTao Zhou <tao.zhou1@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> -
由 Candice Li 提交于
Updated invoke to use new common TA structure similarily to load/unload. Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 24 9月, 2021 3 次提交
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由 John Clements 提交于
Explicity post warning if cmd is issued against unsupported IP Update to latest RAS TA interface Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Candice Li 提交于
Update PSP TA unload function to use PSP TA context as input argument. Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Candice Li 提交于
Update asd_context structure and add asd_initialize function to conform ASD header/loading to generic TA systems. Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 15 9月, 2021 2 次提交
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由 Candice Li 提交于
Remove all TA binary structures and add the specific binary structure in struct ta_context. Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 John Clements 提交于
Remove uncessary RAS status prints Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 08 9月, 2021 1 次提交
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由 Candice Li 提交于
Creat common PSP TA load function and update PSP ta_mem_context with size information. Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 9月, 2021 1 次提交
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由 Candice Li 提交于
Create common PSP TA unload function and replace all common TA unloading sequences. Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 31 8月, 2021 1 次提交
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由 Lang Yu 提交于
To cover the corner case that people want to know the ID of an UNKNOWN CMD. Suggested-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NLang Yu <lang.yu@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 25 8月, 2021 1 次提交
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由 Candice Li 提交于
Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 19 8月, 2021 2 次提交
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由 Candice Li 提交于
Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jonathan Kim 提交于
The TA has a limit to the amount of data that can be retrieved from GET_TOPOLOGY. For setups that exceed this limit, the xGMI topology needs to be re-initialized and data needs to be re-fetched from the extended link records by setting a flag in the shared command buffer. The number of hops and the number of links must be accumulated by the driver. Other data points are all fetched from the first request. Because the TA has already exceeded its link record limit, it cannot hold bidirectional information. Otherwise the driver would have to do more than two fetches so the driver has to reflect the topology information in the opposite direction. v2: squashed with internal reviewed fix Signed-off-by: NJonathan Kim <jonathan.kim@amd.com> Reviewed-by: NHawking Zhang <hawking.zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 17 8月, 2021 1 次提交
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由 Candice Li 提交于
Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 06 8月, 2021 3 次提交
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由 John Clements 提交于
resolved race condition accessing psp cmd submission memory Signed-off-by: NJohn Clements <john.clements@amd.com> Reviewed-by: NGuchun Chen <guchun.chen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Candice Li 提交于
Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 zhouchuangao 提交于
Duplicate include header file <drm/drm_drv.h> line 28: #include <drm/drm_drv.h> line 44: #include <drm/drm_drv.h> Signed-off-by: Nzhouchuangao <zhouchuangao@vivo.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 29 7月, 2021 2 次提交
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由 John Clements 提交于
Detect psp driver binaries packed into FW and try to load the FW Signed-off-by: NJohn Clements <john.clements@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 John Clements 提交于
Improved handling for scalling PSP FW binaries Signed-off-by: NJohn Clements <john.clements@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 23 7月, 2021 6 次提交
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由 Lang Yu 提交于
Add psp v11.0.8 to ip block initialization. v2: use APU flags (Alex) Signed-off-by: NLang Yu <lang.yu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Lang Yu 提交于
Add psp v11.0.8 function into psp driver. Signed-off-by: NLang Yu <lang.yu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Lang Yu 提交于
Adjust toc fw_name string length to PSP_FW_NAME_LEN. Signed-off-by: NLang Yu <lang.yu@amd.com> Reviewed-by: NTao Zhou <tao.zhou1@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Candice Li 提交于
Signed-off-by: NCandice Li <candice.li@amd.com> Reviewed-by: NJohn Clements <John.Clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Oak Zeng 提交于
Function name "psp_np_fw_load" is not proper as people don't know _np_fw_ means "non psp firmware". Change the function name to psp_load_non_psp_fw for better understanding. Same thing for function psp_execute_np_fw_load. Signed-off-by: NOak Zeng <Oak.Zeng@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian Konig <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jonathan Kim 提交于
The TA can now be invoked to provide the number of xgmi links connecting a direct source and destination peer. Non-direct peers will report zero links. Signed-off-by: NJonathan Kim <jonathan.kim@amd.com> Reviewed-by: NFelix Kuehling <felix.kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 17 7月, 2021 1 次提交
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由 Andrey Grodzovsky 提交于
System memory-based implementation for updating the USBCPD is deprecated for so switching to LFB based implementation for all the ASICs. Signed-off-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: NAlexander Deucher <Alexander.Deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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