- 06 11月, 2012 1 次提交
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as this is only used board old style board old mach code Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
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- 02 7月, 2012 5 次提交
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由 Ludovic Desroches 提交于
The number of lines of AIC5 has increased from 32 to 128. Due to this increase, a source select register has been introduced for the interrupt line selection. Moreover, register mapping has been changed. For that reasons, we need some dedicated callbacks for AIC5. Power management is also concerned by these changes. On suspend, we can't get the whole interrupt mask register as before, we have to read this register 128 times. To reduce this overhead, a snapshot of the whole IMR is maintained. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Ludovic Desroches 提交于
Enable sparse irq support for multisoc image. It involves to add the NR_IRQS_LEGACY offset to static SoC irq number definitions since NR_IRQS_LEGACY irq descs are allocated before AIC requests irq descs allocation. Move NR_AIC_IRQS macro to a more appropiate place with the purpose to remove mach/irqs.h later. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Ludovic Desroches 提交于
SOC_AT91SAM9 selects MULTI_IRQ_HANDLER in order to let machines specify their own IRQ handler at run time. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Ludovic Desroches 提交于
Add a third cell to define irq priority. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Reviewed-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Ludovic Desroches 提交于
Fix at91_aic_write macro to avoid potential issues. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 28 11月, 2011 1 次提交
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on all at91 have the Advanced Interrupt Controller starts at address 0xfffff000 Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 07 8月, 2008 1 次提交
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由 Russell King 提交于
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 08 2月, 2007 1 次提交
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由 Andrew Victor 提交于
Now that Linux includes support for the Atmel AT91SAM9260 and AT91SAM9261 processors in addition to the original Atmel AT91RM9200 (with support for more AT91 processors pending), the "mach-at91rm9200" and "arch-at91rm9200" directories should be renamed to indicate their more generic nature. The following git commands should be run BEFORE applying this patch: git-mv arch/arm/mach-at91rm9200 arch/arm/mach-at91 git-mv include/asm-arm/arch-at91rm9200 include/asm-arm/arch-at91 Signed-off-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 01 12月, 2006 1 次提交
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由 Andrew Victor 提交于
The AT91RM9200 system header file (at91rm9200_sys.h) has been split into separate header files for each peripheral. This was necessary since some of the system peripherals are also used on AT91SAM9260 and AT91SAM9261. The new SAM9-specific register bits have also been defined. Signed-off-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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