1. 27 5月, 2015 1 次提交
  2. 21 5月, 2015 1 次提交
    • T
      net: phy: Make sure phy_start() always re-enables the phy interrupts · c15e10e7
      Tim Beale 提交于
      This is an alternative way of fixing:
       commit db9683fb ("net: phy: Make sure PHY_RESUMING state change
                            is always processed")
      
      When the PHY state transitions from PHY_HALTED to PHY_RESUMING, there are
      two things we need to do:
      1). Re-enable interrupts (and power up the physical link, if powered down)
      2). Update the PHY state and net-device based on the link status.
      
      There's no strict reason why #1 has to be done from within the main
      phy_state_machine() function. There is a risk that other changes to the
      PHY (e.g. setting speed/duplex, which calls phy_start_aneg()) could cause
      a subsequent state transition before phy_state_machine() has processed
      the PHY_RESUMING state change. This would leave the PHY with interrupts
      disabled and/or still in the BMCR_PDOWN/low-power mode.
      
      Moving enabling the interrupts and phy_resume() into phy_start() will
      guarantee this work always gets done. As the PHY is already in the HALTED
      state and interrupts are disabled, it shouldn't conflict with any work
      being done in phy_state_machine(). The downside of this change is that if
      the PHY_RESUMING state is ever entered from anywhere else, it'll also have
      to repeat this work.
      Signed-off-by: NTim Beale <tim.beale@alliedtelesis.co.nz>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c15e10e7
  3. 17 5月, 2015 2 次提交
    • T
      net: phy: Make sure PHY_RESUMING state change is always processed · db9683fb
      Tim Beale 提交于
      If phy_start_aneg() was called while the phydev is in the PHY_RESUMING
      state, then its state would immediately transition to PHY_AN (or
      PHY_FORCING). This meant the phy_state_machine() never processed the
      PHY_RESUMING state change, which meant interrupts weren't enabled for the
      PHY. If the PHY used low-power mode (i.e. using BMCR_PDOWN), then the
      physical link wouldn't get powered up again.
      
      There seems no point for phy_start_aneg() to make the PHY_RESUMING -->
      PHY_AN transition, as the state machine will do this anyway. I'm not sure
      about the case where autoneg is disabled, as my patch will change
      behaviour so that the PHY goes to PHY_NOLINK instead of PHY_FORCING. An
      alternative solution would be to move the phy_config_interrupt() and
      phy_resume() work out of the state machine and into phy_start().
      
      The background behind this: we're running linux v3.16.7 and from user-space
      we want to enable the eth port (i.e. do a SIOCSIFFLAGS ioctl with the
      IFF_UP flag) and immediately afterward set the interface's speed/duplex.
      Enabling the interface calls .ndo_open() then phy_start() and the PHY
      transitions PHY_HALTED --> PHY_RESUMING. Setting the speed/duplex ends up
      calling phy_ethtool_sset(), which calls phy_start_aneg() (meanwhile the
      phy_state_machine() hasn't processed the PHY_RESUMING state change yet).
      Signed-off-by: NTim Beale <tim.beale@alliedtelesis.co.nz>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      db9683fb
    • F
      net: phy: Add state machine state transitions debug prints · 3e2186e0
      Florian Fainelli 提交于
      It can be useful to debug the PHY state machine, add dynamic debug
      prints of the old and new PHY devices state under a friendly format.
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      3e2186e0
  4. 16 5月, 2015 1 次提交
    • F
      net: phy: Allow EEE for all RGMII variants · 7e140696
      Florian Fainelli 提交于
      RGMII interfaces come in multiple flavors: RGMII with transmit or
      receive internal delay, no delays at all, or delays in both direction.
      
      This change extends the initial check for PHY_INTERFACE_MODE_RGMII to
      cover all of these variants since EEE should be allowed for any of these
      modes, since it is a property of the RGMII, hence Gigabit PHY capability
      more than the RGMII electrical interface and its delays.
      
      Fixes: a59a4d19 ("phy: add the EEE support and the way to access to the MMD registers")
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      7e140696
  5. 21 2月, 2015 1 次提交
  6. 27 1月, 2015 1 次提交
  7. 12 11月, 2014 1 次提交
  8. 28 8月, 2014 1 次提交
  9. 24 8月, 2014 2 次提交
  10. 31 7月, 2014 1 次提交
    • V
      net: libphy: Add phy specific function to access mmd phy registers · 0c1d77df
      Vince Bridgers 提交于
      libphy was originally written assuming all phy devices support clause 45
      access extensions to the mmd registers through the indirection registers
      located within the first 16 phy registers. This assumption is not true
      in all cases, and one specific example is the Micrel ksz9021 10/100/1000
      Mbps phy. Using the stmmac driver, accessing the mmd registers to query
      and configure energy efficient Ethernet (EEE) features yielded unexpected
      behavior.
      
      This patch adds mmd access functions to the phy driver that can be
      overriden by the phy specific driver if the phy does not support this
      mechanism or uses it's own non-standard access mechanism. By default,
      the IEEE Compatible clause 45 access mechanism described in clause 22
      is used. With this patch, EEE query/configure functions as expected
      using the stmmac and the Micrel ksz9021 phy.
      Signed-off-by: NVince Bridgers <vbridgers2013@gmail.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      0c1d77df
  11. 16 7月, 2014 1 次提交
  12. 22 6月, 2014 1 次提交
  13. 17 5月, 2014 1 次提交
  14. 03 5月, 2014 1 次提交
  15. 10 4月, 2014 1 次提交
  16. 07 3月, 2014 1 次提交
  17. 14 2月, 2014 1 次提交
  18. 13 2月, 2014 6 次提交
  19. 17 1月, 2014 1 次提交
  20. 05 1月, 2014 5 次提交
  21. 30 12月, 2013 1 次提交
  22. 18 12月, 2013 2 次提交
  23. 10 12月, 2013 3 次提交
  24. 28 5月, 2013 2 次提交
  25. 21 5月, 2013 1 次提交