- 07 11月, 2020 1 次提交
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由 Thomas Gleixner 提交于
No reason having the same code in every architecture Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20201103095857.885321106@linutronix.de
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- 13 10月, 2020 2 次提交
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由 Chuanhong Guo 提交于
Some of these ralink devices come with an ancient u-boot which can't extract LZMA properly when image gets too big. Enable zboot support to get a self-extracting kernel instead of relying on broken u-boot support. Signed-off-by: NChuanhong Guo <gch981213@gmail.com> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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由 Paul Cercueil 提交于
While it is true that Ingenic SoCs support huge pages, we cannot use them yet as PTEs don't have any single bit that is free. Right now, having that symbol only causes build errors, so remove it until the situation with PTEs is resolved. Fixes: f0f4a753 ("MIPS: generic: Add support for Ingenic SoCs") Signed-off-by: NPaul Cercueil <paul@crapouillou.net> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Tested-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 12 10月, 2020 1 次提交
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由 Tiezhu Yang 提交于
In the current code, CONFIG_SMP can be set as N by user on the Loongson platform, then there exists the following build error under !CONFIG_SMP: CC arch/mips/kernel/asm-offsets.s In file included from ./include/linux/gfp.h:9:0, from ./include/linux/xarray.h:14, from ./include/linux/radix-tree.h:18, from ./include/linux/fs.h:15, from ./include/linux/compat.h:17, from arch/mips/kernel/asm-offsets.c:12: ./include/linux/topology.h: In function 'numa_node_id': ./include/linux/topology.h:119:2: error: implicit declaration of function 'cpu_logical_map' [-Werror=implicit-function-declaration] return cpu_to_node(raw_smp_processor_id()); ^ cc1: some warnings being treated as errors scripts/Makefile.build:117: recipe for target 'arch/mips/kernel/asm-offsets.s' failed make[1]: *** [arch/mips/kernel/asm-offsets.s] Error 1 Select SMP in Kconfig to avoid the above build error and then remove CONFIG_SMP=y in loongson3_defconfig. Signed-off-by: NTiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 09 10月, 2020 1 次提交
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由 YiFei Zhu 提交于
In order to make adding configurable features into seccomp easier, it's better to have the options at one single location, considering especially that the bulk of seccomp code is arch-independent. An quick look also show that many SECCOMP descriptions are outdated; they talk about /proc rather than prctl. As a result of moving the config option and keeping it default on, architectures arm, arm64, csky, riscv, sh, and xtensa did not have SECCOMP on by default prior to this and SECCOMP will be default in this change. Architectures microblaze, mips, powerpc, s390, sh, and sparc have an outdated depend on PROC_FS and this dependency is removed in this change. Suggested-by: NJann Horn <jannh@google.com> Link: https://lore.kernel.org/lkml/CAG48ez1YWz9cnp08UZgeieYRhHdqh-ch7aNwc4JRBnGyrmgfMg@mail.gmail.com/Signed-off-by: NYiFei Zhu <yifeifz2@illinois.edu> [kees: added HAVE_ARCH_SECCOMP help text, tweaked wording] Signed-off-by: NKees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/9ede6ef35c847e58d61e476c6a39540520066613.1600951211.git.yifeifz2@illinois.edu
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- 28 9月, 2020 1 次提交
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由 Thomas Gleixner 提交于
The unconditional selection of PCI_MSI_ARCH_FALLBACKS has an unmet dependency because PCI_MSI_ARCH_FALLBACKS is defined in a 'if PCI' clause. As it is only relevant when PCI_MSI is enabled, update the affected architecture Kconfigs to make the selection of PCI_MSI_ARCH_FALLBACKS depend on 'if PCI_MSI'. Fixes: 077ee78e ("PCI/MSI: Make arch_.*_msi_irq[s] fallbacks selectable") Reported-by: NQian Cai <cai@redhat.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Vasily Gorbik <gor@linux.ibm.com> Links: https://lore.kernel.org/r/cdfd63305caa57785b0925dd24c0711ea02c8527.camel@redhat.com
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- 27 9月, 2020 1 次提交
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由 Paul Cercueil 提交于
There is nothing that prevents us from using lower maximum values. It's something that we actually want, when using bigger page sizes on devices with low RAM. Signed-off-by: NPaul Cercueil <paul@crapouillou.net> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 25 9月, 2020 1 次提交
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由 Christoph Hellwig 提交于
All users are gone now, remove the API. Signed-off-by: NChristoph Hellwig <hch@lst.de> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> (MIPS part)
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- 18 9月, 2020 4 次提交
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由 Paul Cercueil 提交于
Now that all the jz4740 platform code has been removed, and we're left with only a Kconfig and the cpu-feature-overrides.h file, finalize the cleanup process by renaming the jz4740 and include/mach-jz4740 folders to ingenic and include/mach-ingenic. Signed-off-by: NPaul Cercueil <paul@crapouillou.net> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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由 Paul Cercueil 提交于
Add support for Ingenic SoCs in arch/mips/generic/. The Kconfig changes are here to ensure that it is possible to compile either a generic kernel that supports Ingenic SoCs, or a Ingenic-only kernel, both using the same code base, to avoid duplicated code. Signed-off-by: NPaul Cercueil <paul@crapouillou.net> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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由 Paul Cercueil 提交于
There is no reason we can't create compressed kernels here, so select the option SYS_SUPPORTS_ZBOOT. Signed-off-by: NPaul Cercueil <paul@crapouillou.net> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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由 Paul Cercueil 提交于
The MIPS_GENERIC symbol now won't select any other configuration option. The MIPS_GENERIC_KERNEL will select all the options that the previous MIPS_GENERIC option did select, and will select MIPS_GENERIC as well. The whole point of this, is that it now becomes possible to compile a kernel for a SoC supported by the arch/mips/generic/ code, without making that kernel generic itself. Signed-off-by: NPaul Cercueil <paul@crapouillou.net> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 16 9月, 2020 1 次提交
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由 Thomas Gleixner 提交于
The arch_.*_msi_irq[s] fallbacks are compiled in whether an architecture requires them or not. Architectures which are fully utilizing hierarchical irq domains should never call into that code. It's not only architectures which depend on that by implementing one or more of the weak functions, there is also a bunch of drivers which relies on the weak functions which invoke msi_controller::setup_irq[s] and msi_controller::teardown_irq. Make the architectures and drivers which rely on them select them in Kconfig and if not selected replace them by stub functions which emit a warning and fail the PCI/MSI interrupt allocation. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20200826112333.992429909@linutronix.de
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- 15 9月, 2020 1 次提交
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由 Thomas Bogendoerfer 提交于
Commit 930beb5a ("MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>") forgot to select the correct MIPS_L1_CACHE_SHIFT for SNI RM. This breaks non coherent DMA because of a wrong allocation alignment. Fixes: 930beb5a ("MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>") Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 09 9月, 2020 1 次提交
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由 Christoph Hellwig 提交于
Add a CONFIG_SET_FS option that is selected by architecturess that implement set_fs, which is all of them initially. If the option is not set stubs for routines related to overriding the address space are provided so that architectures can start to opt out of providing set_fs. Signed-off-by: NChristoph Hellwig <hch@lst.de> Reviewed-by: NKees Cook <keescook@chromium.org> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 08 9月, 2020 7 次提交
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由 Thomas Bogendoerfer 提交于
Use a new config option to enable MIPS 34K ITLB workaround and remove define from different war.h files. Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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由 Thomas Bogendoerfer 提交于
Use a new config option to enabel R1000_LLSC workaound and remove define from different war.h files. Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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由 Thomas Bogendoerfer 提交于
Use a new config option to enable I-cache refill workaround and remove define from different war.h files. Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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由 Thomas Bogendoerfer 提交于
Use a new config option to enable TX49XX I-cache index invalidate workaround and remove define from different war.h files. Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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由 Thomas Bogendoerfer 提交于
Use a new config option to enable R4600 V2 cacheop hit workaround and remove define from different war.h files. Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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由 Thomas Bogendoerfer 提交于
Use a new config option to enable R4600 V1 cacheop hit workaround and remove define from the different war.h files. Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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由 Thomas Bogendoerfer 提交于
Use a new config option to enable R4600 V1 index I-cacheop workaround and remove define from different war.h files. Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 03 9月, 2020 2 次提交
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由 Jinyang He 提交于
Commit 2a598436 ("MIPS: Drop CPU_SUPPORTS_UNCACHED_ACCELERATED") removed UCA config, but left the selection unused, delete it. Signed-off-by: NJinyang He <hejinyang@loongson.cn> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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由 Paul Cercueil 提交于
Add support for self-extracting kernels with a ZSTD compression. Tested on a kernel for the GCW-Zero, it allows to reduce the size of the kernel file from 4.1 MiB with gzip to 3.5 MiB with ZSTD, and boots just as fast. Compressed kernels are now also compiled with -D__DISABLE_EXPORTS in order to disable the EXPORT_SYMBOL() macros inside of lib/zstd/decompress.c. Signed-off-by: NPaul Cercueil <paul@crapouillou.net> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 24 8月, 2020 1 次提交
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由 Thomas Bogendoerfer 提交于
Remove another unused MIPS platform. Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 06 8月, 2020 1 次提交
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由 Mike Rapoport 提交于
When a configuration has NUMA disabled and SGI_IP27 enabled, the build fails: CC kernel/bounds.s CC arch/mips/kernel/asm-offsets.s In file included from arch/mips/include/asm/topology.h:11, from include/linux/topology.h:36, from include/linux/gfp.h:9, from include/linux/slab.h:15, from include/linux/crypto.h:19, from include/crypto/hash.h:11, from include/linux/uio.h:10, from include/linux/socket.h:8, from include/linux/compat.h:15, from arch/mips/kernel/asm-offsets.c:12: include/linux/topology.h: In function 'numa_node_id': arch/mips/include/asm/mach-ip27/topology.h:16:27: error: implicit declaration of function 'cputonasid'; did you mean 'cpu_vpe_id'? [-Werror=implicit-function-declaration] #define cpu_to_node(cpu) (cputonasid(cpu)) ^~~~~~~~~~ include/linux/topology.h:119:9: note: in expansion of macro 'cpu_to_node' return cpu_to_node(raw_smp_processor_id()); ^~~~~~~~~~~ include/linux/topology.h: In function 'cpu_cpu_mask': arch/mips/include/asm/mach-ip27/topology.h:19:7: error: implicit declaration of function 'hub_data' [-Werror=implicit-function-declaration] &hub_data(node)->h_cpus) ^~~~~~~~ include/linux/topology.h:210:9: note: in expansion of macro 'cpumask_of_node' return cpumask_of_node(cpu_to_node(cpu)); ^~~~~~~~~~~~~~~ arch/mips/include/asm/mach-ip27/topology.h:19:21: error: invalid type argument of '->' (have 'int') &hub_data(node)->h_cpus) ^~ include/linux/topology.h:210:9: note: in expansion of macro 'cpumask_of_node' return cpumask_of_node(cpu_to_node(cpu)); ^~~~~~~~~~~~~~~ Before switch from discontigmem to sparsemem, there always was CONFIG_NEED_MULTIPLE_NODES=y because it was selected by DISCONTIGMEM. Without DISCONTIGMEM it is possible to have SPARSEMEM without NUMA for SGI_IP27 and as many things there rely on custom node definition, the build breaks. As Thomas noted "... there are right now too many places in IP27 code, which assumes NUMA enabled", the simplest solution would be to always enable NUMA for SGI-IP27 builds. Reported-by: Nkernel test robot <lkp@intel.com> Fixes: 397dc00e ("mips: sgi-ip27: switch from DISCONTIGMEM to SPARSEMEM") Cc: stable@vger.kernel.org Signed-off-by: NMike Rapoport <rppt@linux.ibm.com> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 04 8月, 2020 1 次提交
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由 Huacai Chen 提交于
Loongson-3 KVM guest is based on virtio, it use liointc as its interrupt controller and use GPEX as the pci controller. Signed-off-by: NHuacai Chen <chenhc@lemote.com> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 28 7月, 2020 1 次提交
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由 Paul Cercueil 提交于
The CONFIG_MIPS_MACHINE option is dead code that hasn't been used in years. The Kconfig option is not selected anywhere, and the <asm/mips_machine.h> is not included anywhere either. To make things worse, for years it co-existed with a separate MIPS machine implementation as <asm/machine.h>. The two defined the 'mips_machine' structure with different fields, and the 'MIPS_MACHINE' macro with different parameters. The two used the same memory area (defined by the linker script) to store data, and you could totally use the two at the same time for all kinds of funny results. Signed-off-by: NPaul Cercueil <paul@crapouillou.net> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 24 7月, 2020 1 次提交
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由 Jiaxun Yang 提交于
paravirt machine was introduced for Cavium's partial virtualization technology, however, it's host side support and QEMU support never landed in upstream. As Cavium was acquired by Marvel and they have no intention to maintain their MIPS product line, also paravirt is unlikely to be utilized by community users, it's time to retire it if nobody steps in to maintain it. Signed-off-by: NJiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 19 7月, 2020 1 次提交
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由 Christoph Hellwig 提交于
Avoid the overhead of the dma ops support for tiny builds that only use the direct mapping. Signed-off-by: NChristoph Hellwig <hch@lst.de> Tested-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
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- 16 7月, 2020 1 次提交
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由 Alexander A. Klimov 提交于
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: NAlexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 10 7月, 2020 1 次提交
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由 Jiaxun Yang 提交于
After tons of fixes to get Trap-and-Emulate build on Loongson64, I've got panic on host machine when trying to run a VM. I found that it can never work on 64bit systems. Revewing the code, it looks like R6 can't supportrd by TE as well. Signed-off-by: NJiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <20200710063047.154611-3-jiaxun.yang@flygoat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 05 7月, 2020 1 次提交
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由 Christian Brauner 提交于
All architectures support copy_thread_tls() now, so remove the legacy copy_thread() function and the HAVE_COPY_THREAD_TLS config option. Everyone uses the same process creation calling convention based on copy_thread_tls() and struct kernel_clone_args. This will make it easier to maintain the core process creation code under kernel/, simplifies the callpaths and makes the identical for all architectures. Cc: linux-arch@vger.kernel.org Acked-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de> Acked-by: NGreentime Hu <green.hu@gmail.com> Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: NKees Cook <keescook@chromium.org> Signed-off-by: NChristian Brauner <christian.brauner@ubuntu.com>
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- 14 6月, 2020 1 次提交
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由 Masahiro Yamada 提交于
Since commit 84af7a61 ("checkpatch: kconfig: prefer 'help' over '---help---'"), the number of '---help---' has been gradually decreasing, but there are still more than 2400 instances. This commit finishes the conversion. While I touched the lines, I also fixed the indentation. There are a variety of indentation styles found. a) 4 spaces + '---help---' b) 7 spaces + '---help---' c) 8 spaces + '---help---' d) 1 space + 1 tab + '---help---' e) 1 tab + '---help---' (correct indentation) f) 1 tab + 1 space + '---help---' g) 1 tab + 2 spaces + '---help---' In order to convert all of them to 1 tab + 'help', I ran the following commend: $ find . -name 'Kconfig*' | xargs sed -i 's/^[[:space:]]*---help---/\thelp/' Signed-off-by: NMasahiro Yamada <masahiroy@kernel.org>
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- 05 6月, 2020 1 次提交
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由 Huacai Chen 提交于
This patch enable KVM support for Loongson-3 by selecting HAVE_KVM, but only enable KVM/VZ on Loongson-3A R4+ (because VZ of early processors are incomplete). Besides, Loongson-3 support SMP guests, so we clear the linked load bit of LLAddr in kvm_vz_vcpu_load() if the guest has more than one VCPUs. Acked-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de> Reviewed-by: NAleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: NHuacai Chen <chenhc@lemote.com> Co-developed-by: NJiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <1590220602-3547-15-git-send-email-chenhc@lemote.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 04 6月, 2020 1 次提交
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由 Mike Rapoport 提交于
CONFIG_HAVE_MEMBLOCK_NODE_MAP is used to differentiate initialization of nodes and zones structures between the systems that have region to node mapping in memblock and those that don't. Currently all the NUMA architectures enable this option and for the non-NUMA systems we can presume that all the memory belongs to node 0 and therefore the compile time configuration option is not required. The remaining few architectures that use DISCONTIGMEM without NUMA are easily updated to use memblock_add_node() instead of memblock_add() and thus have proper correspondence of memblock regions to NUMA nodes. Still, free_area_init_node() must have a backward compatible version because its semantics with and without CONFIG_HAVE_MEMBLOCK_NODE_MAP is different. Once all the architectures will use the new semantics, the entire compatibility layer can be dropped. To avoid addition of extra run time memory to store node id for architectures that keep memblock but have only a single node, the node id field of the memblock_region is guarded by CONFIG_NEED_MULTIPLE_NODES and the corresponding accessors presume that in those cases it is always 0. Signed-off-by: NMike Rapoport <rppt@linux.ibm.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Tested-by: Hoan Tran <hoan@os.amperecomputing.com> [arm64] Acked-by: Catalin Marinas <catalin.marinas@arm.com> [arm64] Cc: Baoquan He <bhe@redhat.com> Cc: Brian Cain <bcain@codeaurora.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Greentime Hu <green.hu@gmail.com> Cc: Greg Ungerer <gerg@linux-m68k.org> Cc: Guan Xuetao <gxt@pku.edu.cn> Cc: Guo Ren <guoren@kernel.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Helge Deller <deller@gmx.de> Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Mark Salter <msalter@redhat.com> Cc: Matt Turner <mattst88@gmail.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Michal Hocko <mhocko@kernel.org> Cc: Michal Simek <monstr@monstr.eu> Cc: Nick Hu <nickhu@andestech.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Richard Weinberger <richard@nod.at> Cc: Rich Felker <dalias@libc.org> Cc: Russell King <linux@armlinux.org.uk> Cc: Stafford Horne <shorne@gmail.com> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Tony Luck <tony.luck@intel.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Link: http://lkml.kernel.org/r/20200412194859.12663-4-rppt@kernel.orgSigned-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 27 5月, 2020 2 次提交
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由 Jiaxun Yang 提交于
Loongson64 load kernel at 0x82000000 and allocate exception vectors by ebase. So we don't need to reserve space for exception vectors at head of kernel. Signed-off-by: NJiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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由 Jiaxun Yang 提交于
We can now enable generic PCI driver in Kconfig, and remove legacy PCI driver code. Radeon vbios quirk is moved to the platform folder to fit the new structure. Signed-off-by: NJiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 24 5月, 2020 1 次提交
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由 WANG Xuerui 提交于
CPUCFG is the instruction for querying processor characteristics on newer Loongson processors, much like CPUID of x86. Since the instruction is supposedly designed to provide a unified way to do feature detection (without having to, for example, parse /proc/cpuinfo which is too heavyweight), it is important to provide compatibility for older cores without native support. Fortunately, most of the fields can be synthesized without changes to semantics. Performance is not really big a concern, because feature detection logic is not expected to be invoked very often in typical userland applications. The instruction can't be emulated on LOONGSON_2EF cores, according to FlyGoat's experiments. Because the LWC2 opcode is assigned to other valid instructions on 2E and 2F, no RI exception is raised for us to intercept. So compatibility is only extended back furthest to Loongson-3A1000. Loongson-2K is covered too, as it is basically a remix of various blocks from the 3A/3B models from a kernel perspective. This is lightly based on Loongson's work on their Linux 3.10 fork, for being the authority on the right feature flags to fill in, where things aren't otherwise discoverable. Signed-off-by: NWANG Xuerui <git@xen0n.name> Reviewed-by: NJiaxun Yang <jiaxun.yang@flygoat.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 22 5月, 2020 1 次提交
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由 Serge Semin 提交于
Commit 07d69579 ("MIPS: Don't register r4k sched clock when CPUFREQ enabled") disabled the r4k-clock usage for scheduler ticks counting due to the scheduler being non-tolerant for unstable clocks sources. For the same reason the clock should be used in the system clocksource framework with care. As soon as CPU frequency changes the clocksource framework should be notified about this by marking the R4K timer being unstable (which it really is, since the ticks rate has been changed synchronously with the CPU frequency). Signed-off-by: NSerge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
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