1. 31 12月, 2022 3 次提交
  2. 26 11月, 2022 3 次提交
  3. 08 11月, 2022 2 次提交
  4. 27 10月, 2022 3 次提交
  5. 22 10月, 2022 7 次提交
  6. 18 10月, 2022 1 次提交
  7. 23 8月, 2022 8 次提交
  8. 20 8月, 2022 1 次提交
  9. 02 8月, 2022 2 次提交
  10. 27 7月, 2022 2 次提交
  11. 19 7月, 2022 1 次提交
    • D
      scsi: ufs: core: Read device property for ref clock · ca452621
      Daniil Lunev 提交于
      UFS storage devices require bRefClkFreq attribute to be set to operate
      correctly at high speed mode. The necessary value is determined by what the
      SoC / board supports. The standard doesn't specify a method to query the
      value, so the information needs to be fed in separately.
      
      DT information feeds into setting up the clock framework, so platforms
      using DT can get the UFS reference clock frequency from the clock
      framework. A special node "ref_clk" from the clock array for the UFS
      controller node is used as the source for the information.
      
      On the platforms that do not use DT (e.g. Intel), the alternative mechanism
      to feed the intended reference clock frequency is necessary. Specifying the
      necessary information in DSD of the UFS controller ACPI node is an
      alternative mechanism proposed in this patch. Those can be accessed via
      firmware property facility in the kernel and in many ways simillar to
      querying properties defined in DT.
      
      This patch introduces a small helper function to query a predetermined ACPI
      supplied property of the UFS controller, and uses it to attempt retrieving
      reference clock value, unless that was already done by the clock
      infrastructure.
      
      Link: https://lore.kernel.org/r/20220715210230.1.I365d113d275117dee8fd055ce4fc7e6aebd0bce9@changeidReviewed-by: NAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: NDaniil Lunev <dlunev@chromium.org>
      Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
      ca452621
  12. 14 7月, 2022 3 次提交
  13. 08 7月, 2022 1 次提交
    • J
      scsi: ufs: Skip last hci reset to get valid register values · 174e909b
      Junwoo Lee 提交于
      Once the host link startup fails 3 times, all host registers are reset to
      default values except in ufshcd_hba_enable().
      
      The ufs host controller is disabled and enabled in ufshcd_hba_enable().
      Consequently we need to skip last hci reset to get valid host register
      values.
      
      e.g.
      [    1.898026] [2:  kworker/u16:2:  211] ufs: link startup failed 1
      [    1.898133] [2:  kworker/u16:2:  211] host_regs: 00000000: 1383ff1f 00000000 00000300 00000000
      [    1.898141] [2:  kworker/u16:2:  211] host_regs: 00000010: 00000106 000001ce 00000000 00000000
      [    1.898148] [2:  kworker/u16:2:  211] host_regs: 00000020: 00000000 00000470 00000000 00000000
      [    1.898155] [2:  kworker/u16:2:  211] host_regs: 00000030: 00000008 00000003 00000000 00000000
      [    1.898163] [2:  kworker/u16:2:  211] host_regs: 00000040: 00000000 00000000 00000000 00000000
      [    1.898171] [2:  kworker/u16:2:  211] host_regs: 00000050: 00000000 00000000 00000000 00000000
      [    1.898177] [2:  kworker/u16:2:  211] host_regs: 00000060: 00000000 00000000 00000000 00000000
      [    1.898186] [2:  kworker/u16:2:  211] host_regs: 00000070: 00000000 00000000 00000000 00000000
      [    1.898194] [2:  kworker/u16:2:  211] host_regs: 00000080: 00000000 00000000 00000000 00000000
      [    1.898201] [2:  kworker/u16:2:  211] host_regs: 00000090: 00000000 00000000 00000000 00000000
      
      Link: https://lore.kernel.org/r/20220705083538.15143-1-sh043.lee@samsung.comReviewed-by: NAvri Altman <avri.altman@wdc.com>
      Signed-off-by: NJunwoo Lee <junwoo80.lee@samsung.com>
      Signed-off-by: NSeunghui Lee <sh043.lee@samsung.com>
      Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
      174e909b
  14. 28 6月, 2022 2 次提交
  15. 22 6月, 2022 1 次提交