[Why]
The function currently skips overriding the drive
settings of the first lane.

[How]
Change for loop to start at 0 instead of 1.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NWenjing Liu <Wenjing.Liu@amd.com>
Acked-by: NAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: NGeorge Shen <george.shen@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why & How]
Change struct initializer from multiple brace to single brace.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Acked-by: NAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: NAric Cyr <aric.cyr@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
This is one of the major steps to decouple hw lane settings
from dpcd lane settings.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NJun Lei <Jun.Lei@amd.com>
Acked-by: NAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: NWenjing Liu <wenjing.liu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why & How]
Check always_match_dpcd_with_hw_lane_settings bit before
overriding the DP drive settings
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NWenjing Liu <Wenjing.Liu@amd.com>
Acked-by: NAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: NGeorge Shen <george.shen@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why & How]
Enrich the log to provide more informatio in MST payload update.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAriel Bernstein <Eric.Bernstein@amd.com>
Acked-by: NAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: NWenjing Liu <wenjing.liu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why & How]
Use dc_is_hdmi_signal to determine signal type.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Acked-by: NAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: NJinZe.Xu <JinZe.Xu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
Wrong index was checked for dcfclk_mhz, causing false warning.

[How]
Fix the assertion index.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[WHY]
Logging for SMU response value after the wait allows us to know
immediately what the response value was. Makes it easier to debug should
the value be anything other than OK.

[HOW]
Using the the already available DC SMU logging functions.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com>
Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NSaaem Rizvi <SyedSaaem.Rizvi@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
For VG, we want to turn off power/backlight of the intenral panel when
plugging in external monitor and going to "external monitor only" mode.

[how]
For turning off power of the internal panel, ignore the config flag whic
bypasses power sequencing for eDP panels.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com>
Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NSung Joon Kim <sungkim@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
Only on VG, if external display is disconnected during S3 suspend, the
internal panel doesn't light up on resume because we set the power state
using an unsupported DPCD register SET_POWER.  To check the register is
supported, we need to check SET_POWER_CAPABLE first which is
eDP-specific DPCD register field.

[how]
Check the SET_POWER_CAPABLE register field and decide the control of the
eDP power state based on the read register value.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAgustin Gutierrez <Agustin.Gutierrez@amd.com>
Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NSung Joon Kim <sungkim@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
when connect one 4k@144hz dp to dsc mst hub, 4k@144hz mode is in valid
mode list. but some mst hub port output bandwidth does not support
4k@144hz.

[How]
add mst port output bandwidth checks, include full_pbn, branch max
throughput mps.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NJerry Zuo <Jerry.Zuo@amd.com>
Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Nhersen wu <hersenxs.wu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Delete unnecessary codes in detect_link_and_local_sink. We already have
correct stop logic in dc_link_detect.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NWenjing Liu <Wenjing.Liu@amd.com>
Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NIan Chen <ian.chen@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
While updating the config of hdcp, we use the sink_singal type of the
dc_sink to decide the HDCP operation mode. However, it doesn't consider
the case when the sink is a emulated one.

[How]
Take dc_em_sink into account while updating HDCP config.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com>
Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NWayne Lin <Wayne.Lin@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
Observe that we have several problems while releasing remote dc_sink
under mst cases.

- When unplug mst branch device from the source, we now try to free all
  remote dc_sinks in dm_helpers_dp_mst_stop_top_mgr(). However, there are
  bugs while we're releasing dc_sinks here. First of all,
  link->remote_sinks[] array get shuffled within
  dc_link_remove_remote_sink(). As the result, increasing the array index
  within the releasing loop is wrong. Secondly, it tries to call
  dc_sink_release() to release the dc_sink of the same aconnector every
  time in the loop. Which can't release dc_sink of all aconnector in the
  mst topology.
- There is no code path for us to release remote dc_sink for disconnected
  sst monitor which unplug event is notified by CSN sideband message. Which
  means we'll use stale dc_sink data to represent later on connected
  monitor. Also, has chance to break the maximum remote dc_sink number
  constraint.

[How]
Distinguish unplug event of mst scenario into 2 cases.

* Unplug sst/legacy stream sink off the mst topology
- Release related remote dc_sink in detec_ctx().

* Unplug mst branch device off the mst topology
- Release related remote dc_sink in early_unregister()
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com>
Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: NLyude Paul <lyude@redhat.com>
Signed-off-by: NWayne Lin <Wayne.Lin@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This reverts commit 3c4d55c9.

Revert the commit because:
- It's incomplete of the function dm_set_dpms_off() for mst case.  For
  stream sinks whithin the same mst topology, they share the same dc_link.
  dm_set_dpms_off() tries to update one mst stream only which is
  incomplete.
- Setting dpms off should be triggered by usermode. Besdies, it seems
  usermode does release relevant resource for mst & non-mst case when
  unplug connecotr now.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com>
Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: NLyude Paul <lyude@redhat.com>
Signed-off-by: NWayne Lin <Wayne.Lin@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This reverts commit 035f5496.

The reverted commit was trying to fix side effect brought by
commit 3c4d55c9 ("drm/amd/display: turn DPMS off on connector unplug")

However,
* This reverted commit will have mst case never call dm_set_dpms_off()
  which conflicts the idea of original commit 3c4d55c9 ("drm/amd/display: turn DPMS off on connector unplug")
  That's due to dm_crtc_state is always null since the input parameter
  aconnector is the root device (source) of mst topology.  It's not an
  end stream sink within the mst topology.
* Setting dpms off should be triggered by usermode. Besdies, it seems
  usermode does release relevant resource for mst & non-mst case when
  unplug connecotr now. Which means we no longer need both commits now:
  commit 3c4d55c9 ("drm/amd/display: turn DPMS off on connector unplug")
  commit 035f5496 ("drm/amd/display: Add flag to detect dpms force off during HPD")
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com>
Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: NLyude Paul <lyude@redhat.com>
Signed-off-by: NWayne Lin <Wayne.Lin@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

A variety of Lenovo machines with Rembrandt APUs and OLED panels have
stopped showing the display at login.  This behavior clears up after
leaving it idle and moving the mouse or touching keyboard.

It was bisected to be caused by commit 559e2655 ("drm/amd/display:
keep eDP Vdd on when eDP stream is already enabled").  Revert this commit
to fix the issue.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2047Reported-by: NAaron Ma <aaron.ma@canonical.com>
Fixes: 559e2655 ("drm/amd/display: keep eDP Vdd on when eDP stream is already enabled")
Signed-off-by: NMario Limonciello <mario.limonciello@amd.com>
Tested-by: NMark Pearson <markpearson@lenovo.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAric Cyr <Aric.Cyr@amd.com>
Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NCruise Hung <Cruise.Hung@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This patch adds LSDMA ip block for LSDMA v6.0.1.
Signed-off-by: NYifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why&How]
The omitted register definition caused call traces like:

[    3.811215] WARNING: CPU: 7 PID: 794 at drivers/gpu/drm/amd/amdgpu/../display/dc/dc_helper.c:120 set_reg_field_values.constprop.0+0xc7/0xe0 [amdgpu]
[    3.811406] Modules linked in: amdgpu(+) drm_ttm_helper ttm iommu_v2 gpu_sched drm_kms_helper cfbfillrect syscopyarea cfbimgblt sysfillrect sysimgblt fb_sys_fops cfbcopyarea drm i2c_piix4 drm_panel_orientation_quirks
[    3.811419] CPU: 7 PID: 794 Comm: systemd-udevd Not tainted 5.16.0-kfd+ #132
[    3.811422] Hardware name: System manufacturer System Product Name/ROG STRIX B450-F GAMING, BIOS 3003 12/09/2019
[    3.811425] RIP: 0010:set_reg_field_values.constprop.0+0xc7/0xe0 [amdgpu]
[    3.811615] Code: 08 49 89 51 08 8b 08 48 8d 42 08 49 89 41 08 44 8b 02 48 8d 50 08 0f b6 c9 49 89 51 08 8b 00 45 85 c0 75 b3 0f 0b eb af 5d c3 <0f> 0b e9 48 ff ff ff 49 8b 51 08 eb d0 49 8b 41 08 eb d5 66 0f 1f
[    3.811619] RSP: 0018:ffffb8c1c04cf640 EFLAGS: 00010246
[    3.811621] RAX: 0000000000000000 RBX: ffff96f2100d8800 RCX: 0000000000000000
[    3.811623] RDX: 0000000000000000 RSI: 0000000000000001 RDI: ffffb8c1c04cf650
[    3.811625] RBP: ffffb8c1c04cf640 R08: 000000000000047f R09: ffffb8c1c04cf658
[    3.811627] R10: ffff96f5161ff000 R11: ffff96f5161ff000 R12: ffff96f204afb9c0
[    3.811629] R13: 0000000000000000 R14: ffff96f202b94c00 R15: ffffb8c1c04cf718
[    3.811631] FS:  00007fe07c2e2880(0000) GS:ffff96f5059c0000(0000) knlGS:0000000000000000
[    3.811634] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[    3.811636] CR2: 0000559634ab57b8 CR3: 0000000120674000 CR4: 00000000003506e0
[    3.811637] Call Trace:
[    3.811640]  <TASK>
[    3.811642]  generic_reg_update_ex+0x69/0x200 [amdgpu]
[    3.811831]  ? _printk+0x58/0x6f
[    3.811836]  dcn32_init_crb+0x18f/0x1b0 [amdgpu]
[    3.812031]  dcn32_init_hw+0x379/0x6a0 [amdgpu]
[    3.812223]  dc_hardware_init+0xba/0x100 [amdgpu]
[    3.812415]  amdgpu_dm_init.isra.0.cold+0x166/0x1867 [amdgpu]
[    3.812616]  ? dev_vprintk_emit+0x139/0x15d
[    3.812621]  ? dev_printk_emit+0x4e/0x65
[    3.812624]  dm_hw_init+0x12/0x30 [amdgpu]
[    3.812820]  amdgpu_device_init.cold+0x130d/0x178c [amdgpu]
[    3.813017]  ? pci_read_config_word+0x25/0x40
[    3.813021]  amdgpu_driver_load_kms+0x1a/0x130 [amdgpu]
[    3.813178]  amdgpu_pci_probe+0x130/0x330 [amdgpu]

Fixes: 4f29f9cf ("drm/amd: add register headers for DCN32/321")
Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Some APUs with SMU13 are showing the following message:
`amdgpu 0000:63:00.0: amdgpu: Unexpected and unhandled version: 3.1`

This warning isn't relevant for smu info 3.1, as no bootup information
is present in the table.

Fixes: 593a54f1 ("drm/amd/pm: correct the way for retrieving bootup clocks")
Signed-off-by: NMario Limonciello <mario.limonciello@amd.com>
Reviewed-by: NEvan Quan <evan.quan@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

set mp1 unload state will cause the SMC FW can't accept any SMU message,
skip to set mp1 unload state to avoid following case fail:
- runtime pm case.
- gpu reset case.

Fixes: 72aeb6ee ("drm/amd/pm: fix driver reload SMC firmware fail issue for smu13")
Signed-off-by: NYang Wang <KevinYang.Wang@amd.com>
Reviewed-by: NKenneth Feng <kenneth.feng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Due to gfxoff on, cpu accessing registers is not expected.
Signed-off-by: NJack Xiao <Jack.Xiao@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The EccInfo_t struct in driver_if.h is as below in official release
verion 68.55.0
 typedef struct {
   uint64_t mca_umc_status;
   uint64_t mca_umc_addr;

   uint16_t ce_count_lo_chip;
   uint16_t ce_count_hi_chip;

   uint32_t eccPadding;

   uint64_t mca_ceumc_addr;
 } EccInfo_t;
It's different from the debug version druing develop print correctable
error address, so adjust EccInfo_t struct.
Signed-off-by: NStanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Certain GL unit tests for large textures can cause problems
with the OOM killer since there is no way to link this memory
to a process.  This was originally mitigated (but not necessarily
eliminated) by limiting the GTT size.  The problem is this limit
is often too low for many modern games so just make the limit 1/2
of system memory. The OOM accounting needs to be addressed, but
we shouldn't prevent common 3D applications from being usable
just to potentially mitigate that corner case.

Set default GTT size to max(3G, 1/2 of system ram) by default.

v2: drop previous logic and default to 3/4 of ram
v3: default to half of ram to align with ttm
v4: fix spelling in comment (Kent)

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1942Reviewed-by: NMarek Olšák <marek.olsak@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

radeon is MIT.  This were incorrectly changed in
commit b2441318 ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license")
and
commit d198b34f (".gitignore: add SPDX License Identifier")
and:
commit ec8f24b7 ("treewide: Add SPDX license identifier - Makefile/Kconfig")

Fixes: d198b34f (".gitignore: add SPDX License Identifier")
Fixes: ec8f24b7 ("treewide: Add SPDX license identifier - Makefile/Kconfig")
Fixes: b2441318 ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license")
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2053Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Loop through all VMIDs for gmc_v10_0_flush_gpu_tlb_pasid and
gmc_v11_0_flush_gpu_tlb_pasid (only if using MES for gmc_v10). This is
required for MES due to use_different_vmid_compute causing SDMA queues
to be assigned different VMIDs than compute for the same PASID.
Signed-off-by: NGraham Sider <Graham.Sider@amd.com>
Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Fixed some errors and warnings found by checkpatch.pl.
Acked-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NRuijing Dong <ruijing.dong@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

- remove multiple queue support
- add unified queue related functions
Acked-by: NLeo Liu <leo.liu@amd.com>
Signed-off-by: NRuijing Dong <ruijing.dong@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

- add unified queue headers
- add unified queue ib tests
Acked-by: NLeo Liu <leo.liu@amd.com>
Signed-off-by: NRuijing Dong <ruijing.dong@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Use the same pattern as the DML Makefile and while we are here
add a missing x86 guard around the msse flags for DCN3.2.x.
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This reverts commit d8e4fb91.

This is no longer necessary as newer patches require these functions
without CONFIG_DRM_AMD_DC_DCN.
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c:1542:11:
warning: variable 'i' set but not used [-Wunused-but-set-variable]
Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com>
Acked-by: NChristian König <christian.koenig@amd.com>
Reported-by: Nkernel test robot <lkp@intel.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

enable_mes and enable_mes_kiq are set in both device init and
MES IP init. Leave the ones in MES IP init, since it is
a more accurate way to judge from GC IP version.
Signed-off-by: NYifan Zhang <yifan1.zhang@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NJack Xiao <Jack.Xiao@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
All displays need to be blanked during the uclk OC interface so that we can
guarantee pstate switching support. If the display config doesn't support
pstate switching, only using core_link_disable_stream will not enable it
as the front-end is untouched. We need to go through the full plane removal
sequence to properly program the pipe to allow pstate switching.

[How]
 - guard clk_mgr functions with non-NULL checks
Acked-by: NAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: NJoshua Aberback <joshua.aberback@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
dc_submit_i2c_oem could be called with ddc null

[how]
add null check and fail the call instead
Acked-by: NAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: NMartin Leung <martin.leung@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
need to add timing adjustment for fva.

[how]
add hook to optc and hwseq.
Acked-by: NAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: NCharlene Liu <Charlene.Liu@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[WHY]
The display driver on some OSes need to track it in order to
perform memory clock switching decisions.

[HOW]
Propagate the vrr active state to dirty bit so that on mode set it
disables dynamic memory clock switching.
Acked-by: NAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: NHarry VanZyllDeJong <harry.vanzylldejong@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[WHY]
New features will require knowing the vrr mode for their enablement.

[HOW]
Pass the state via a member of dc_stream.
Acked-by: NAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: NFelipe Clark <Felipe.Clark@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>