1. 09 9月, 2020 3 次提交
  2. 08 9月, 2020 12 次提交
  3. 07 9月, 2020 3 次提交
    • C
      enic: switch from 'pci_' to 'dma_' API · 02a20d4f
      Christophe JAILLET 提交于
      The wrappers in include/linux/pci-dma-compat.h should go away.
      
      The patch has been generated with the coccinelle script below and has been
      hand modified to replace GFP_ with a correct flag.
      It has been compile tested.
      
      When memory is allocated in 'vnic_dev_classifier()', 'vnic_dev_fw_info()',
      'vnic_dev_notify_set()' and 'vnic_dev_stats_dump()' (vnic_dev.c) GFP_ATOMIC
      must be used because its callers take a spinlock before calling these
      functions.
      
      When memory is allocated in '__enic_set_rsskey()' and 'enic_set_rsscpu()'
      GFP_ATOMIC must be used because they can be called with a spinlock.
      The call chain is:
        enic_reset                         <-- takes 'enic->enic_api_lock'
          --> enic_set_rss_nic_cfg
            --> enic_set_rsskey
              --> __enic_set_rsskey        <-- uses dma_alloc_coherent
            --> enic_set_rsscpu            <-- uses dma_alloc_coherent
      
      When memory is allocated in 'vnic_dev_init_prov2()' GFP_ATOMIC must be used
      because a spinlock is hidden in the ENIC_DEVCMD_PROXY_BY_INDEX macro, when
      this function is called in 'enic_set_port_profile()'.
      
      When memory is allocated in 'vnic_dev_alloc_desc_ring()' GFP_KERNEL can be
      used because it is only called from 5 functions ('vnic_dev_init_devcmd2()',
      'vnic_cq_alloc()', 'vnic_rq_alloc()', 'vnic_wq_alloc()' and
      'enic_wq_devcmd2_alloc()'.
      
        'vnic_dev_init_devcmd2()': already uses GFP_KERNEL and no lock is taken
           in the between.
        'enic_wq_devcmd2_alloc()': is called from ' vnic_dev_init_devcmd2()'
           which already uses GFP_KERNEL and no lock is taken in the between.
        'vnic_cq_alloc()', 'vnic_rq_alloc()', 'vnic_wq_alloc()': are called
           from 'enic_alloc_vnic_resources()'
      'enic_alloc_vnic_resources()' has only 2 call chains:
      
        1) enic_probe
            --> enic_dev_init
              --> enic_alloc_vnic_resources
      'enic_probe()' is a probe function and no lock is taken in the between
      
        2) enic_set_ringparam
            --> enic_alloc_vnic_resources
      'enic_set_ringparam()' is a .set_ringparam function (see struct
      ethtool_ops). It seems to only take a mutex and no spinlock.
      
      So all paths are safe to use GFP_KERNEL.
      
      @@
      @@
      -    PCI_DMA_BIDIRECTIONAL
      +    DMA_BIDIRECTIONAL
      
      @@
      @@
      -    PCI_DMA_TODEVICE
      +    DMA_TO_DEVICE
      
      @@
      @@
      -    PCI_DMA_FROMDEVICE
      +    DMA_FROM_DEVICE
      
      @@
      @@
      -    PCI_DMA_NONE
      +    DMA_NONE
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_alloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_zalloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_free_consistent(e1, e2, e3, e4)
      +    dma_free_coherent(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_single(e1, e2, e3, e4)
      +    dma_map_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_single(e1, e2, e3, e4)
      +    dma_unmap_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4, e5;
      @@
      -    pci_map_page(e1, e2, e3, e4, e5)
      +    dma_map_page(&e1->dev, e2, e3, e4, e5)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_page(e1, e2, e3, e4)
      +    dma_unmap_page(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_sg(e1, e2, e3, e4)
      +    dma_map_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_sg(e1, e2, e3, e4)
      +    dma_unmap_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
      +    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_device(e1, e2, e3, e4)
      +    dma_sync_single_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
      +    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
      +    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2;
      @@
      -    pci_dma_mapping_error(e1, e2)
      +    dma_mapping_error(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_dma_mask(e1, e2)
      +    dma_set_mask(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_consistent_dma_mask(e1, e2)
      +    dma_set_coherent_mask(&e1->dev, e2)
      Signed-off-by: NChristophe JAILLET <christophe.jaillet@wanadoo.fr>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      02a20d4f
    • L
      net: gemini: Clean up phy registration · 3e813d61
      Linus Walleij 提交于
      It's nice if the phy is online before we register the netdev
      so try to do that first.
      
      Stop trying to do "second tried" to register the phy, it
      works perfectly fine the first time.
      
      Stop remvoving the phy in uninit. Remove it when the
      driver is remove():d, symmetric to where it is added, in
      probe().
      Suggested-by: NAndrew Lunn <andrew@lunn.ch>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Reported-by: NDavid Miller <davem@davemloft.net>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      3e813d61
    • L
      net: dsa: rtl8366rb: Support setting MTU · 5f4a8ef3
      Linus Walleij 提交于
      This implements the missing MTU setting for the RTL8366RB
      switch.
      
      Apart from supporting jumboframes, this rids us of annoying
      boot messages like this:
      realtek-smi switch: nonfatal error -95 setting MTU on port 0
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      5f4a8ef3
  4. 06 9月, 2020 7 次提交
    • F
      net: dsa: bcm_sf2: Ensure that MDIO diversion is used · 771089c2
      Florian Fainelli 提交于
      Registering our slave MDIO bus outside of the OF infrastructure is
      necessary in order to avoid creating double references of the same
      Device Tree nodes, however it is not sufficient to guarantee that the
      MDIO bus diversion is used because of_phy_connect() will still resolve
      to a valid PHY phandle and it will connect to the PHY using its parent
      MDIO bus which is still the SF2 master MDIO bus. The reason for that is
      because BCM7445 systems were already shipped with a Device Tree blob
      looking like this (irrelevant parts omitted for simplicity):
      
      	ports {
      		#address-cells = <1>;
      		#size-cells = <0>;
      
      		port@1 {
      			phy-mode = "rgmii-txid";
      			phy-handle = <&phy0>;
                              reg = <1>;
      			label = "rgmii_1";
      		};
      	...
      
      	mdio@403c0 {
      		...
      
      		phy0: ethernet-phy@0 {
      			broken-turn-around;
      			device_type = "ethernet-phy";
      			max-speed = <0x3e8>;
      			reg = <0>;
      			compatible = "brcm,bcm53125", "ethernet-phy-ieee802.3-c22";
      		};
      	};
      
      There is a hardware issue with chip revisions (Dx) that lead to the
      development of the following commits:
      
      461cd1b0 ("net: dsa: bcm_sf2: Register our slave MDIO bus")
      536fab5b ("net: dsa: bcm_sf2: Do not register slave MDIO bus with OF")
      b8c6cd1d ("net: dsa: bcm_sf2: do not use indirect reads and writes for 7445E0")
      
      There should have been an internal MDIO bus node created for the chip
      revision (Dx) that suffers from this problem, but it did not happen back
      then.
      
      Had that happen, that we should have correctly parented phy@0 (bcm53125
      below) as child node of the internal MDIO bus, but the production Device
      Tree blob that was shipped with the firmware targeted the fixed version
      of the chip, despite both the affected and corrected chips being shipped
      into production.
      
      The problem is that of_phy_connect() for port@1 will happily resolve the
      'phy-handle' from the mdio@403c0 node, which bypasses the diversion
      completely. This results in this double programming that the diversion
      refers to and aims to avoid. In order to force of_phy_connect() to fail,
      and have DSA call to dsa_slave_phy_connect(), we must deactivate
      ethernet-phy@0 from mdio@403c0, and the best way to do that is by
      removing the phandle property completely.
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      771089c2
    • E
      sfc: remove efx_tx_queue_partner · 337792a2
      Edward Cree 提交于
      All users of this function are now gone.
      Signed-off-by: NEdward Cree <ecree@solarflare.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      337792a2
    • E
      sfc: rewrite efx_tx_may_pio · 8be41842
      Edward Cree 提交于
      Use efx_for_each_channel_tx_queue() rather than efx_tx_queue_partner().
      Make some related simplifications of efx_nic_tx_is_empty() to remove
       entry points that aren't used.
      Signed-off-by: NEdward Cree <ecree@solarflare.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      8be41842
    • E
      sfc: use efx_channel_tx_[old_]fill_level() in Siena/EF10 TX datapath · 0d8c1229
      Edward Cree 提交于
      Instead of open-coding the calculation with efx_tx_queue_partner(), use
       the functions that iterate over numbers of queues other than 2 with
       efx_for_each_channel_tx_queue().
      Signed-off-by: NEdward Cree <ecree@solarflare.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      0d8c1229
    • E
      sfc: use tx_queue->old_read_count in EF100 TX path · 5374d602
      Edward Cree 提交于
      As in the Siena/EF10 case, it minimises cacheline ping-pong between
       the TX and completion paths.
      Signed-off-by: NEdward Cree <ecree@solarflare.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      5374d602
    • E
      sfc: make ef100 xmit_more handling look more like ef10's · 8cb26756
      Edward Cree 提交于
      This should cause no functional change; merely make there only be one
       design of xmit_more handling to understand.  As with the EF10/Siena
       version, we set tx_queue->xmit_pending when we queue up a TX, and
       clear it when we ring the doorbell (in ef100_notify_tx_desc).
      While we're at it, make ef100_notify_tx_desc static since nothing
       outside of ef100_tx.c uses it.
      Signed-off-by: NEdward Cree <ecree@solarflare.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      8cb26756
    • E
      sfc: add and use efx_tx_send_pending in tx.c · 1c0544d2
      Edward Cree 提交于
      Instead of using efx_tx_queue_partner(), which relies on the assumption
       that tx_queues_per_channel is 2, efx_tx_send_pending() iterates over
       txqs with efx_for_each_channel_tx_queue().
      We unconditionally set tx_queue->xmit_pending (renamed from
       xmit_more_available), then condition on xmit_more for the call to
       efx_tx_send_pending(), which will clear xmit_pending.  Thus, after an
       xmit_more TX, the doorbell is un-rung and xmit_pending is true.
      Signed-off-by: NEdward Cree <ecree@solarflare.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      1c0544d2
  5. 04 9月, 2020 15 次提交