1. 30 9月, 2015 4 次提交
  2. 15 9月, 2015 6 次提交
  3. 21 8月, 2015 1 次提交
    • D
      drm/radeon: fix hotplug race at startup · 7f98ca45
      Dave Airlie 提交于
      We apparantly get a hotplug irq before we've initialised
      modesetting,
      
      [drm] Loading R100 Microcode
      BUG: unable to handle kernel NULL pointer dereference at   (null)
      IP: [<c125f56f>] __mutex_lock_slowpath+0x23/0x91
      *pde = 00000000
      Oops: 0002 [#1]
      Modules linked in: radeon(+) drm_kms_helper ttm drm i2c_algo_bit backlight pcspkr psmouse evdev sr_mod input_leds led_class cdrom sg parport_pc parport floppy intel_agp intel_gtt lpc_ich acpi_cpufreq processor button mfd_core agpgart uhci_hcd ehci_hcd rng_core snd_intel8x0 snd_ac97_codec ac97_bus snd_pcm usbcore usb_common i2c_i801 i2c_core snd_timer snd soundcore thermal_sys
      CPU: 0 PID: 15 Comm: kworker/0:1 Not tainted 4.2.0-rc7-00015-gbf674028 #111
      Hardware name: MicroLink                               /D850MV                         , BIOS MV85010A.86A.0067.P24.0304081124 04/08/2003
      Workqueue: events radeon_hotplug_work_func [radeon]
      task: f6ca5900 ti: f6d3e000 task.ti: f6d3e000
      EIP: 0060:[<c125f56f>] EFLAGS: 00010282 CPU: 0
      EIP is at __mutex_lock_slowpath+0x23/0x91
      EAX: 00000000 EBX: f5e900fc ECX: 00000000 EDX: fffffffe
      ESI: f6ca5900 EDI: f5e90100 EBP: f5e90000 ESP: f6d3ff0c
       DS: 007b ES: 007b FS: 0000 GS: 0000 SS: 0068
      CR0: 8005003b CR2: 00000000 CR3: 36f61000 CR4: 000006d0
      Stack:
       f5e90100 00000000 c103c4c1 f6d2a5a0 f5e900fc f6df394c c125f162 f8b0faca
       f6d2a5a0 c138ca00 f6df394c f7395600 c1034741 00d40000 00000000 f6d2a5a0
       c138ca00 f6d2a5b8 c138ca10 c1034b58 00000001 f6d40000 f6ca5900 f6d0c940
      Call Trace:
       [<c103c4c1>] ? dequeue_task_fair+0xa4/0xb7
       [<c125f162>] ? mutex_lock+0x9/0xa
       [<f8b0faca>] ? radeon_hotplug_work_func+0x17/0x57 [radeon]
       [<c1034741>] ? process_one_work+0xfc/0x194
       [<c1034b58>] ? worker_thread+0x18d/0x218
       [<c10349cb>] ? rescuer_thread+0x1d5/0x1d5
       [<c103742a>] ? kthread+0x7b/0x80
       [<c12601c0>] ? ret_from_kernel_thread+0x20/0x30
       [<c10373af>] ? init_completion+0x18/0x18
      Code: 42 08 e8 8e a6 dd ff c3 57 56 53 83 ec 0c 8b 35 48 f7 37 c1 8b 10 4a 74 1a 89 c3 8d 78 04 8b 40 08 89 63
      Reported-and-Tested-by: NMeelis Roos <mroos@linux.ee>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      7f98ca45
  4. 19 8月, 2015 4 次提交
  5. 18 8月, 2015 1 次提交
  6. 17 8月, 2015 1 次提交
  7. 14 8月, 2015 2 次提交
  8. 13 8月, 2015 5 次提交
    • M
      drm/i915: Commit planes on each crtc separately. · d2944cf2
      Maarten Lankhorst 提交于
      This patch is based on the upstream commit 5ac1c4bc and amended
      for v4.2 to make sure it works as intended.
      
      Repeated calls to begin_crtc_commit can cause warnings like this:
      [  169.127746] BUG: sleeping function called from invalid context at kernel/locking/mutex.c:616
      [  169.127835] in_atomic(): 0, irqs_disabled(): 1, pid: 1947, name: kms_flip
      [  169.127840] 3 locks held by kms_flip/1947:
      [  169.127843]  #0:  (&dev->mode_config.mutex){+.+.+.}, at: [<ffffffff814774bc>] __drm_modeset_lock_all+0x9c/0x130
      [  169.127860]  #1:  (crtc_ww_class_acquire){+.+.+.}, at: [<ffffffff814774cd>] __drm_modeset_lock_all+0xad/0x130
      [  169.127870]  #2:  (crtc_ww_class_mutex){+.+.+.}, at: [<ffffffff81477178>] drm_modeset_lock+0x38/0x110
      [  169.127879] irq event stamp: 665690
      [  169.127882] hardirqs last  enabled at (665689): [<ffffffff817ffdb5>] _raw_spin_unlock_irqrestore+0x55/0x70
      [  169.127889] hardirqs last disabled at (665690): [<ffffffffc0197a23>] intel_pipe_update_start+0x113/0x5c0 [i915]
      [  169.127936] softirqs last  enabled at (665470): [<ffffffff8108a766>] __do_softirq+0x236/0x650
      [  169.127942] softirqs last disabled at (665465): [<ffffffff8108ae75>] irq_exit+0xc5/0xd0
      [  169.127951] CPU: 1 PID: 1947 Comm: kms_flip Not tainted 4.1.0-rc4-patser+ #4039
      [  169.127954] Hardware name: LENOVO 2349AV8/2349AV8, BIOS G1ETA5WW (2.65 ) 04/15/2014
      [  169.127957]  ffff8800c49036f0 ffff8800cde5fa28 ffffffff817f6907 0000000080000001
      [  169.127964]  0000000000000000 ffff8800cde5fa58 ffffffff810aebed 0000000000000046
      [  169.127970]  ffffffff81c5d518 0000000000000268 0000000000000000 ffff8800cde5fa88
      [  169.127981] Call Trace:
      [  169.127992]  [<ffffffff817f6907>] dump_stack+0x4f/0x7b
      [  169.128001]  [<ffffffff810aebed>] ___might_sleep+0x16d/0x270
      [  169.128008]  [<ffffffff810aed38>] __might_sleep+0x48/0x90
      [  169.128017]  [<ffffffff817fc359>] mutex_lock_nested+0x29/0x410
      [  169.128073]  [<ffffffffc01635f0>] ? vgpu_write64+0x220/0x220 [i915]
      [  169.128138]  [<ffffffffc017fddf>] ? ironlake_update_primary_plane+0x2ff/0x410 [i915]
      [  169.128198]  [<ffffffffc0190e75>] intel_frontbuffer_flush+0x25/0x70 [i915]
      [  169.128253]  [<ffffffffc01831ac>] intel_finish_crtc_commit+0x4c/0x180 [i915]
      [  169.128279]  [<ffffffffc00784ac>] drm_atomic_helper_commit_planes+0x12c/0x240 [drm_kms_helper]
      [  169.128338]  [<ffffffffc0184264>] __intel_set_mode+0x684/0x830 [i915]
      [  169.128378]  [<ffffffffc018a84a>] intel_crtc_set_config+0x49a/0x620 [i915]
      [  169.128385]  [<ffffffff817fdd39>] ? mutex_unlock+0x9/0x10
      [  169.128391]  [<ffffffff81467b69>] drm_mode_set_config_internal+0x69/0x120
      [  169.128398]  [<ffffffff8119b547>] ? might_fault+0x57/0xb0
      [  169.128403]  [<ffffffff8146bf93>] drm_mode_setcrtc+0x253/0x620
      [  169.128409]  [<ffffffff8145c600>] drm_ioctl+0x1a0/0x6a0
      [  169.128415]  [<ffffffff810b3b41>] ? get_parent_ip+0x11/0x50
      [  169.128424]  [<ffffffff811e9ab8>] do_vfs_ioctl+0x2f8/0x530
      [  169.128429]  [<ffffffff810d0fcd>] ? trace_hardirqs_on+0xd/0x10
      [  169.128435]  [<ffffffff812e7676>] ? selinux_file_ioctl+0x56/0x100
      [  169.128439]  [<ffffffff811e9d71>] SyS_ioctl+0x81/0xa0
      [  169.128445]  [<ffffffff81800697>] system_call_fastpath+0x12/0x6f
      
      Solve it by using the newly introduced drm_atomic_helper_commit_planes_on_crtc.
      
      The problem here was that the drm_atomic_helper_commit_planes() helper
      we were using was basically designed to do
      
          begin_crtc_commit(crtc #1)
          begin_crtc_commit(crtc #2)
          ...
          commit all planes
          finish_crtc_commit(crtc #1)
          finish_crtc_commit(crtc #2)
      
      The problem here is that since our hardware relies on vblank evasion,
      our CRTC 'begin' function waits until we're out of the danger zone in
      which register writes might wind up straddling the vblank, then disables
      interrupts; our 'finish' function re-enables interrupts after the
      registers have been written.  The expectation is that the operations between
      'begin' and 'end' must be performed without sleeping (since interrupts
      are disabled) and should happen as quickly as possible.  By clumping all
      of the 'begin' calls together, we introducing a couple problems:
       * Subsequent 'begin' invocations might sleep (which is illegal)
       * The first 'begin' ensured that we were far enough from the vblank that
         we could write our registers safely and ensure they all fell within
         the same frame.  Adding extra delay waiting for subsequent CRTC's
         wasn't accounted for and could put us back into the 'danger zone' for
         CRTC #1.
      
      This commit solves the problem by using a new helper that allows an
      order of operations like:
      
         for each crtc {
              begin_crtc_commit(crtc)  // sleep (maybe), then disable interrupts
              commit planes for this specific CRTC
              end_crtc_commit(crtc)    // reenable interrupts
         }
      
      so that sleeps will only be performed while interrupts are enabled and
      we can be sure that registers for a CRTC will be written immediately
      once we know we're in the safe zone.
      
      The crtc->config->base.crtc update may seem unrelated, but the helper
      will use it to obtain the crtc for the state. Without the update it
      will dereference NULL and crash.
      
      Changes since v1:
      - Use Matt Roper's commit message.
      Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Reviewed-by: NMatt Roper <matthew.d.roper@intel.com>
      References: https://bugs.freedesktop.org/show_bug.cgi?id=90398Reviewed-by: NAnder Conselvan de Oliveira <conselvan2@gmail.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      d2944cf2
    • M
      drm/i915: calculate primary visibility changes instead of calling from set_config · f0fdc55d
      Maarten Lankhorst 提交于
      This should be much cleaner, with the same effects.
      
      (cherry picked for v4.2 from commit fb9d6cf8)
      Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Reviewed-by: NMatt Roper <matthew.d.roper@intel.com>
      References: https://bugs.freedesktop.org/show_bug.cgi?id=90398Reviewed-by: NAnder Conselvan de Oliveira <conselvan2@gmail.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      f0fdc55d
    • D
      drm/i915: Only dither on 6bpc panels · e8fa4270
      Daniel Vetter 提交于
      In
      
      commit d328c9d7
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Fri Apr 10 16:22:37 2015 +0200
      
          drm/i915: Select starting pipe bpp irrespective or the primary plane
      
      we started to select the pipe bpp from sink capabilities and not from
      the primary framebuffer - that one might change (and we don't want to
      incur a modeset) and sprites might contain higher bpp content too.
      
      We also selected dithering on a 8 bpc screen displaying a 24bpp rgb
      primary, because pipe_bpp is 24 for such a typical 8 bpc sink, but since
      the commit mentioned above, base_bpp is always the absolute maximum
      supported by the hardware, e.g., 36 bpp on my Ironlake chip. Iow. the
      only way to not get dithering would have been to connect a deep color 12
      bpc display, so pipe_bpp == 36 == base_bpp.
      
      Hence only enable dithering on 6bpc screens where we difinitely and
      always want it.
      
      Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
      Reported-by: NMario Kleiner <mario.kleiner.de@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      Reviewed-and-tested-by: NMario Kleiner <mario.kleiner.de@gmail.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      e8fa4270
    • A
      Revert "drm/amdgpu: Configure doorbell to maximum slots" · b8826b0c
      Alex Deucher 提交于
      This reverts commit 78ad5cdd.
      This commit breaks dpm and suspend/resume on CZ.
      b8826b0c
    • B
  9. 11 8月, 2015 7 次提交
  10. 07 8月, 2015 1 次提交
  11. 06 8月, 2015 6 次提交
  12. 05 8月, 2015 1 次提交
  13. 04 8月, 2015 1 次提交
    • D
      drm/atomic-helpers: Make encoder picking more robust · 6ea76f3c
      Daniel Vetter 提交于
      We've had a few issues with atomic where subtle bugs in the encoder
      picking logic lead to accidental self-stealing of the encoder,
      resulting in a NULL connector_state->crtc in update_connector_routing
      and subsequent.
      
      Linus applied some duct-tape for an mst regression in
      
      commit 27667f47
      Author: Linus Torvalds <torvalds@linux-foundation.org>
      Date:   Wed Jul 29 22:18:16 2015 -0700
      
          i915: temporary fix for DP MST docking station NULL pointer dereference
      
      But that was incomplete (the code will still oops when debuggin is
      enabled) and mangled the state even further. So instead WARN and bail
      out as the more future-proof option.
      
      Cc: Theodore Ts'o <tytso@mit.edu>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Reviewed-by: NThierry Reding <treding@nvidia.com>
      Reviewed-by: NAnder Conselvan de Oliveira <conselvan2@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      6ea76f3c