- 20 6月, 2013 1 次提交
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由 Philip Avinash 提交于
Replace /include/ by #include for da850 device tree files, in order to use the C pre-processor, making use of #define features possible. Signed-off-by: NPhilip Avinash <avinashphilip@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 11 6月, 2013 2 次提交
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由 Tomasz Figa 提交于
This patch makes legacy code on suspend/resume path being executed conditionally, on non-DT platforms only, to fix suspend/resume of DT-enabled systems, for which the code is inappropriate. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> [olof: add #include <linux/of.h>] Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Haojian Zhuang 提交于
In prima2, some functions of checking DT is registered in initcall level. If it doesn't match the compatible name of sirf, kernel will panic. It blocks the usage of multiplatform on other verndor. The error message is in below. Knic - not syncing: unable to find compatible pwrc node in dtb CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0-rc3-00006-gd7f26ea-dirty #86 [<c0013adc>] (unwind_backtrace+0x0/0xf8) from [<c0011430>] (show_stack+0x10/0x1) [<c0011430>] (show_stack+0x10/0x14) from [<c026f724>] (panic+0x90/0x1e8) [<c026f724>] (panic+0x90/0x1e8) from [<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x) [<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x58) from [<c0320864>] (do_one_initcal) [<c0320864>] (do_one_initcall+0x90/0x150) from [<c0320a20>] (kernel_init_freeab) [<c0320a20>] (kernel_init_freeable+0xfc/0x1c4) from [<c026b9e8>] (kernel_init+0) [<c026b9e8>] (kernel_init+0x8/0xe4) from [<c000e158>] (ret_from_fork+0x14/0x3c) Signen-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 08 6月, 2013 2 次提交
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由 Doug Anderson 提交于
If the early MMU mapping of the UART happens to get booted out of the TLB between the start of paging_init() and when we finally re-add the UART at the very end of s3c_init_cpu(), we'll get a hang at bootup if we've got early_printk enabled. Avoid this hang by calling debug_ll_io_init() early. Without this patch, you can reliably reproduce a hang when early printk is enabled by adding flush_tlb_all() at the start of exynos_init_io(). After this patch the hang goes away. Signed-off-by: NDoug Anderson <dianders@chromium.org> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Tushar Behera 提交于
Printing low-level debug messages make an assumption that the specified UART port has been preconfigured by the bootloader. Incorrectly specified UART port results in system getting stalled while printing the message "Uncompressing Linux... done, booting the kernel" This UART port number is specified through S3C_LOWLEVEL_UART_PORT. Since the UART port might different for different board, it is not possible to specify it correctly for every board that use a common defconfig file. Calling this print subroutine only when DEBUG_LL fixes the problem. By disabling DEBUG_LL in default config file, we would be able to boot multiple boards with different default UART ports. With this current approach, we miss the print "Uncompressing Linux... done, booting the kernel." when DEBUG_LL is not defined. Signed-off-by: NTushar Behera <tushar.behera@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 07 6月, 2013 2 次提交
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由 Thomas Petazzoni 提交于
The ranges DT entry needed by the PCIe controller is defined at the SoC .dtsi level. However, some boards have a NOR flash, and to support it, they need to override the SoC-level ranges property to add an additional range. Since PCIe and NOR support came separately, some boards were not properly changed to include the PCIe range in their ranges property at the .dts level. This commit fixes those platforms. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Nicolas Schichan 提交于
MPP_F6281_MASK would be previously be returned when on mv88f6282, which would disallow some valid MPP configurations. Commit 830f8b91 (arm: plat-orion: fix printing of "MPP config unavailable on this hardware") made this problem visible as an invalid MPP configuration is now correctly detected and not applied. Signed-off-by: NNicolas Schichan <nschichan@freebox.fr> Cc: <stable@vger.kernel.org> # v3.9.x Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 06 6月, 2013 7 次提交
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由 Jean-Philippe Francois 提交于
omap36xx_pwrdn_clk_enable_with_hsdiv_restore expects the parent hw of the clock to be a clk_hw_omap. However, looking at cclock3xxx_data.c, all concerned clock have parent defined as clk_divider. Fix the function to use clk_divider. Tested with 3.9 on dm3730. Signed-off-by: NJean-Philippe François <jp.francois@cynove.com> Cc: NeilBrown <neilb@suse.de> Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Peter Zijlstra 提交于
Since the introduction of preemptible mmu_gather TLB fast mode has been broken. TLB fast mode relies on there being absolutely no concurrency; it frees pages first and invalidates TLBs later. However now we can get concurrency and stuff goes *bang*. This patch removes all tlb_fast_mode() code; it was found the better option vs trying to patch the hole by entangling tlb invalidation with the scheduler. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Tony Luck <tony.luck@intel.com> Reported-by: NMax Filippov <jcmvbkbc@gmail.com> Signed-off-by: NPeter Zijlstra <peterz@infradead.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Will Deacon 提交于
__my_cpu_offset is non-volatile, since we want its value to be cached when we access several per-cpu variables in a row with preemption disabled. This means that we rely on preempt_{en,dis}able to hazard with the operation via the barrier() macro, so that we can't end up migrating CPUs without reloading the per-cpu offset. Unfortunately, GCC doesn't treat a "memory" clobber on a non-volatile asm block as a side-effect, and will happily re-order it before other memory clobbers (including those in prempt_disable()) and cache the value. This has been observed to break the cmpxchg logic in the slub allocator, leading to livelock in kmem_cache_alloc in mainline kernels. This patch adds a dummy memory input operand to __my_cpu_offset, forcing it to be ordered with respect to the barrier() macro. Cc: <stable@vger.kernel.org> Cc: Rob Herring <rob.herring@calxeda.com> Reviewed-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Marc C 提交于
The previous mask values for the legacy ARM CPU IDs were conflicting with the CPU ID assignments for late-generation CPUs (like the Qualcomm MSM/QSD or Broadcom Brahma-15 processors). This change corrects the legacy ARM CPU ID value so that the jump table can fall-through to the appropriate cache maintenance / MMU functions. Signed-off-by: NMarc C <marc.ceeeee@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Arnd Bergmann 提交于
In August 2012, Matthew Gretton-Dann checked a change into binutils labelled "Error on obsolete & warn on deprecated registers", apparently as part of ARMv8 support. Apparently, this was supposed to emit the message "Warning: This coprocessor register access is deprecated in ARMv8" when using certain mcr/mrc instructions and building for ARMv8. Unfortunately, the message that is actually emitted appears to be '(null)', which is less helpful in comparison. Even more unfortunately, this is biting us on every single kernel build with a new gas, because arch/arm/boot/compressed/head.S and some other files in that directory are built with -march=all since kernel commit 80cec14a "[ARM] Add -march=all to assembly file build in arch/arm/boot/compressed" back in v2.6.28. This patch reverts Russell's nice solution and instead marks the head.S file to be built for armv7-a, which fortunately lets us build all instructions in that file without warnings even on the broken binutils. Without this patch, building anything results in: arch/arm/boot/compressed/head.S: Assembler messages: arch/arm/boot/compressed/head.S:565: Warning: (null) arch/arm/boot/compressed/head.S:676: Warning: (null) arch/arm/boot/compressed/head.S:698: Warning: (null) arch/arm/boot/compressed/head.S:722: Warning: (null) arch/arm/boot/compressed/head.S:726: Warning: (null) arch/arm/boot/compressed/head.S:957: Warning: (null) arch/arm/boot/compressed/head.S:996: Warning: (null) arch/arm/boot/compressed/head.S:997: Warning: (null) arch/arm/boot/compressed/head.S:1027: Warning: (null) arch/arm/boot/compressed/head.S:1035: Warning: (null) arch/arm/boot/compressed/head.S:1046: Warning: (null) arch/arm/boot/compressed/head.S:1060: Warning: (null) arch/arm/boot/compressed/head.S:1092: Warning: (null) arch/arm/boot/compressed/head.S:1094: Warning: (null) arch/arm/boot/compressed/head.S:1095: Warning: (null) arch/arm/boot/compressed/head.S:1102: Warning: (null) arch/arm/boot/compressed/head.S:1134: Warning: (null) Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: stable@vger.kernel.org Cc: Matthew Gretton-Dann <matthew.gretton-dann@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Arnd Bergmann 提交于
The cpu_topology symbol is required by any driver using the topology interfaces, which leads to a couple of build errors: ERROR: "cpu_topology" [drivers/net/ethernet/sfc/sfc.ko] undefined! ERROR: "cpu_topology" [drivers/cpufreq/arm_big_little.ko] undefined! ERROR: "cpu_topology" [drivers/block/mtip32xx/mtip32xx.ko] undefined! The obvious solution is to export this symbol. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NWill Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Cc: Nicolas Pitre <nico@linaro.org> Cc: Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Nicolas Pitre 提交于
Selecting this option produces: AS arch/arm/boot/compressed/debug.o arch/arm/boot/compressed/debug.S:4:33: fatal error: mach/debug-macro.S: No such file or directory compilation terminated. make[3]: *** [arch/arm/boot/compressed/debug.o] Error 1 The semihosting support cannot be modelled into a senduart macro as it requires memory space for argument passing. So the CONFIG_DEBUG_LL_INCLUDE may not have any sensible value and the include directive should be omitted. While at it, let's add proper semihosting output support to the decompressor. Signed-off-by: NNicolas Pitre <nico@linaro.org> Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 04 6月, 2013 1 次提交
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由 Simon Horman 提交于
Update the CMT clockevent rating from 125 to 80. This resolves a boot-failure regression for kzm9g-reference in v3.10-rc1 introduced by f7db706b ("ARM: 7674/1: smp: Avoid dummy clockevent being preferred over real"). The patch noted above reduces the rating of dummy clockevent from 400 to 100. This patch reduces the rating of CMT so that it is once again less than that of the dummy clockevent. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 03 6月, 2013 8 次提交
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由 Suman Anna 提交于
OMAP5 has 6 timers (GPTimers 5, 6, 8 to 11) that are capable of PWM. The PWM capability property is missing from the node definitions of couple of timers. Add ti,timer-pwm attribute for timer 5, 6, 8 and 11. Signed-off-by: NSuman Anna <s-anna@ti.com> [benoit.cousson@linaro.org: Update changelog and subject to highlight the fix] Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Kevin Hilman 提交于
Earlier commits ensured proper muxing of pins related to proper TWL6030 behavior: see commit 265a2bc8 (ARM: OMAP3: TWL4030: ensure sys_nirq1 is mux'd and wakeup enabled) and commit 1ef43369 (ARM: OMAP4: TWL: mux sys_drm_msecure as output for PMIC). However these only fixed legacy boot and not DT boot. For DT boot, the default mux values need to be set properly in DT. Special thanks to Nishanth Menon for the review and catching some major flaws in earlier versions. Tested on OMAP4430/Panda and OMAP4460/Panda-ES. Cc: Nishanth Menon <nm@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NKevin Hilman <khilman@linaro.org> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> [benoit.cousson@linaro.org: Slightly change the subject to align board name with file name] Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Lars Poeschel 提交于
The gpmc driver is actually looking for "gpmc,num-cs" and "gpmc,num-waitpins" properties in DT. The binding doc also states this. Correct the properties in the dts to provide the right values for the gpmc driver. Signed-off-by: NLars Poeschel <poeschel@lemonage.de> Acked-by: NPeter Korsgaard <jacmet@sunsite.dk> Acked-by: NPekon Gupta <pekon@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Thomas Petazzoni 提交于
The UART2 hwmod structure is pointing to the EDMA channels of UART1, which doesn't look right. This patch fixes this by making the UART2 hwmod structure to a new structure that lists the EDMA channels to be used by the UART2. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NVaibhav Hiremath <hvaibhav@ti.com> [paul@pwsan.com: updated to apply] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Marc Zyngier 提交于
The KVM/ARM MMU code doesn't take care of invalidating TLBs before freeing a {pte,pmd} table. This could cause problems if the page is reallocated and then speculated into by another CPU. Reported-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Andre Przywara 提交于
Some ARM KVM VCPU ioctls require the vCPU to be properly initialized with the KVM_ARM_VCPU_INIT ioctl before being used with further requests. KVM_RUN checks whether this initialization has been done, but other ioctls do not. Namely KVM_GET_REG_LIST will dereference an array with index -1 without initialization and thus leads to a kernel oops. Fix this by adding checks before executing the ioctl handlers. [ Removed superflous comment from static function - Christoffer ] Changes from v1: * moved check into a static function with a meaningful name Signed-off-by: NAndre Przywara <andre.przywara@linaro.org> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Anson Huang 提交于
The AXI clock mux should be as below: 00: periph; 01: pll2_pfd2_396m; 10: periph; 11: pll3_pfd1_540m; Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Jongsung Kim 提交于
Stephen Warren reported the recent commit 78506f22 (add support for extended FIFO-size of PL011-r1p5) breaks the serial port on the BCM2835 ARM SoC. A UART compatible with the ARM PL011-r1p5 should have 32-deep FIFOs. The BCM2835 UART just looks like an ARM PL011-r1p5, but has 16-deep FIFOs just like PL011-r1p4 or earlier revisions. As a workaround for this compatibility issue, this patch overrides the HW UART periphid register values with the actually compatible UART periphid 0x00241011 (r1p3 or r1p4). Reported-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NJongsung Kim <neidhard.kim@lge.com> Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 31 5月, 2013 1 次提交
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由 Tony Lindgren 提交于
Commit a819c4f1 (ARM: OMAP3: PM: Only access IVA if one exists) changed PM to not access IVA registers on omaps that don't have them. Turns out we still need to idle iva2 as otherwise iva2_pwrdm will stay on and block deeper idle states. It seems that the only part of the reset that may not be needed is the setting of the iva2 boot mode to idle. But as that register seems to be there and is harmless if no iva2 is on the SoC, it's probably safest to do the complete reset. Acked-by: NMark A. Greer <mgreer@animalcreek.com> Acked-by: NKevin Hilman <khilman@linaro.org> Tested-by: NYegor Yefremov <yegorslists@googlemail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 29 5月, 2013 1 次提交
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由 Olof Johansson 提交于
This turns on a number of configs that are useful on the Chromebook, but also good to have on in general: * USB host and MMC drivers(!) * I2C GPIO arbitration driver * CYAPA trackpad driver * simplefb * CROS EC and keyboard drivers * S5M8767 driver * MAX77686 drivers * MAX8997 driver * DEVTMPFS + mount * DM_CRYPT (as module) * CRYPTOLOOP * HIGHMEM * PRINTK timestamps This also turns off DEBUG_LL, and switches the hardcoded Samsung lowlevel uart to uart 3 (which is only used to show the "uncompressing kernel" message at boot, it seems). Signed-off-by: NOlof Johansson <olof@lixom.net> Reviewed-by: NDoug Anderson <dianders@chromium.org> Tested-by: NTushar Behera <tushar.behera@linaro.org> Acked-by: NKukjin Kim <kgene.kim@samsung.com>
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- 28 5月, 2013 2 次提交
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由 Nadav Haklai 提交于
When adding CPU to the SMP group and enabling the coherency on this CPU we must protect the register access. The previous implementation claims to be atomic but doesn't provide any protection against parallel access to the coherency fabric control and configuration registers. This patch fixes this by using the ldrex and strex mechanism. This method should be used in all accesses to those registers. [gregory.clement@free-electrons.com: fixed the commit's topic] Signed-off-by: NNadav Haklai <nadavh@marvell.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Andrew Lunn 提交于
When creating the DT based boards-ts219.c the none DT ts219-setup.c was used as a template. This includes a lateinit() call to initialize the PCIe bus. The code makes use of machine_is_ts219() which is never true on DT, so a FIXME was added and the code left as is. This was unproblematic until b73690c8: "ARM: Kirkwood: Support basic hotplug for PCI-E" which changes the way the PCIe bus is initialized. The non-DT ts219-setup.c now crashes during boot. The lateinit() call in the DT boards-ts219.c is being called, machine_is_ts219() is true and so the PCIe is initialized a second time. This patch removes the useless, and now clearly dangerous, code from boards-ts219.c, making ts219-setup.c work again. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Cc: <stable@vger.kernel.org> # v3.9.x Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 27 5月, 2013 3 次提交
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由 Tomasz Figa 提交于
On DT-enabled systems pinctrl-exynos driver is responsible for handling of wake-up EINT interrupts. This patch adjusts wake-up mask configuration code to take wake-up mask value from pinctrl-exynos driver on DT-enabled systems. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Tested-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Lee Jones 提交于
This patch fixes a bug introduced in the v3.10 merge window. The AB8500 External Regulator driver has recently landed upstream, which registers each of the 3 external regulators located on the AB8500. If these regulators are marked as 'always on', there is a potential for power-loss. If they're not and are seemingly unused the Regulator subsystem will attempt to disable them to save power. This causes an issue for AUX1, AUX2 and AUX3 as they obtain their power from EXT3. So we're specifying that here to prevent EXT3 from being powered down. Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Lee Jones 提交于
Multiplatform calls all enabled platforms' initcalls. In the ux500_idle_init() initcall we call into the DBx500-PRCMU which in turn executes some ux500 specific register reads/writes. When running on some !ux500 platforms this ends up causing a kernel Oops. This patch ensures the PRCMU call is only invoked when running on ux500 based platforms. Reported-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 25 5月, 2013 3 次提交
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由 Tomasz Figa 提交于
Since commit 1977e6d8 (drm/exynos: change the method for getting the interrupt) the Exynos DRM FIMD driver requires IRQ resources to be named. This patch fixes probe failure in non-DT cases by adding appropriate resource names to fimd0 platform device. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Jungseok Lee 提交于
This patch fixes software reset logic. Software reset applies only to powered-on domains in SOC because software reset to all domains causes reboot failure. Signed-off-by: NJungseok Lee <jays.lee@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
This patch extends exynos_init_time() function to handle Exynos4210 rev0 SoC, which differs in availability of system timers and needs different clocksource initialization. This makes it possible to use exynos_init_time() function as init_time callback for all Exynos-based boards, including Universal_C210, which originally had to use samsung_timer_init(). Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 24 5月, 2013 4 次提交
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由 Josh Wu 提交于
Signed-off-by: NJosh Wu <josh.wu@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Boris BREZILLON 提交于
The PA24 pin is wrongly assigned to peripheral B. In the current config there is 2 ETX3 pins (PA11 and PA24) and no ETXER pin (PA22). Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> # 3.8+
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Jonas Andersson 提交于
The CSPI controller has only one clock, but the driver spi-imx.c needs clock "per" to calculate bitrate divisor. Signed-off-by: NJonas Andersson <jonas@microbit.se> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 23 5月, 2013 3 次提交
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由 Jiada Wang 提交于
As pll5_video_div has been introduced to represent the clock generated from post-divider for video. Instead of pll5_video, pll5_video_div should be proper root clock for ldb_di_sel. Signed-off-by: NJiada Wang <jiada_wang@mentor.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Will Deacon 提交于
Commit d3f79584 ("ARM: cleanup undefined instruction entry code") improved the register scheduling when handling undefined instructions. A side effect of this is that r5 is now used as a temporary, whilst the VFP probing code relies on r5 containing a non-zero value when VFP is not supported. This patch fixes the VFP detection code so that we don't rely on the contents of r5. Without this patch, Linux dies loudly on CPUs without VFP support. Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Steven Capper 提交于
If one reads /proc/$PID/smaps, the mmap_sem belonging to the address space of the task being examined is locked for reading. All the pages of the vmas belonging to the task's address space are then walked with this lock held. If a gate_vma is present in the architecture, it too is examined by the fs/proc/task_mmu.c code. As gate_vma doesn't belong to the address space of the task though, its pages are not walked. A recent cleanup (commit f6604efe) of the gate_vma initialisation code set the vm_mm value to &init_mm. Unfortunately a non-NULL vm_mm value in the gate_vma will cause the task_mmu code to attempt to walk the pages of the gate_vma (with no mmap-sem lock held). If one enables Transparent Huge Page support and vm debugging, this will then cause OOPses as pmd_trans_huge_lock is called without mmap_sem being locked. This patch removes the .vm_mm value from gate_vma, restoring the original behaviour of the task_mmu code. Signed-off-by: NSteve Capper <steve.capper@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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