When booting with device tree static clkdev aliases should not be used.
This patch modifies the samsung_pwm_timer driver to use DT-based clock
lookup when booting with device tree.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Since pwm-samsung bindings require at least one clock to be specified,
this patch adds the missing clocks and clock-names properties to specify
clocks used by PWM block on Exynos4 SoCs.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

PWM driver consumes at least one and up to three clocks, which need to be
specified in device tree when used. This patch updates bindings
documentation to add information about clocks.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The __clk_get_flags() symbol is exported immediately following the
clk_unprepare_unused_subtree() function. This is unusual, since a symbol
export typically follows body of the function that it exports.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Commit 71472c0c (clk: add support for clock reparent on set_rate) added a
dereference of the new_parent pointer in clk_reparent(), but as detected
by smatch clk_reparent() later checks whether new_parent is NULL.

The dereference was in order to clear the new parent's new_child pointer
to avoid duplicate POST_RATE_CHANGE notifications, so clearly isn't
necessary if the new parent is NULL, so move it inside the "if
(new_parent)" block.
Reported-by: NDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Otherwise any attempt to interact with the hardware will crash. This is
what happens when drivers get written blind.
Signed-off-by: NMark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: NMike Turquette <mturquette@linaro.org>

dout_pixel is a new ID allocated for pixel clock divider. It is
queried in the driver to pass as the parent to hdmi clock while
switching between parents.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

hdmi driver needs to change the parent of hdmi clock
to pixel clock or hdmiphy clock, based on the stability
of hdmiphy. This patch is exposing the mux for changing
the parent.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Listing sclk_hdmiphy at 0th position in the list of parents is
causing wrong configuration in reg SRC_DISP10.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Adding sysmmu clock for mixer for exynos5420.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Add sclk_hdmiphy to the list of exposed clocks. This is required
by hdmi driver to change the parent of hdmi clock.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Since the driver was written an is_prepared() operation has been made
possible. Since the driver uses I2C I/O only prepare operations are
provided so move the is_enabled() operation over to is_prepared().
Signed-off-by: NMark Brown <broonie@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

parent of hdmi and mixer block is mentioned as aclk200 which is
not correct. It is clocked by the ouput of aclk200_disp1. Hence
parent for mixer and hdmi clocks is changed to aclk200_disp1.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The lock bit on PLL_U does not seem to be working correctly and
sometimes never gets set when waiting for the PLL to come up.
Remove the TEGRA_PLL_USE_LOCK flag to use a constant delay.
Signed-off-by: NTuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Cc: Emilio López <emilio@elopez.com.ar>
Signed-off-by: NMike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: refreshed patch based on sunxi changes]

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NGregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NGregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NGregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NGregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

While at it also make 'u300_clk_lookup' static as it is used only
in this file.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

__initconst should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Allwinner clock changes for 3.12

These patches mostly do some cleanup to introduce the basic gated clocks for
the Allwinner A10s, A20 and A31 SoCs.

Conflicts:
	drivers/clk/sunxi/clk-sunxi.c

the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals

wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms
Signed-off-by: NGerhard Sittig <gsi@denx.de>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Currently of_clk_init() finds a matching device node while holding
the device tree spinlock.  When a matching device node is found, the
lock is dropped and then re-acquired in order to get a reference
to the matching device id structure.

Acquiring the spinlock twice is unnecessary (and it opens a
vulnerable window that could conceivably lead to errors).

There already exists an interface for both finding and taking a
reference to a device id under lock, so use it.
Signed-off-by: NAlex Elder <elder@linaro.org>
Reviewed-by: NChristian Daudt <csd@broadcom.com>
Reviewed-by: NMarkus Mayer <markus.mayer@linaro.org>
Reviewed-by: NMatt Porter <matt.porter@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

With the recent move towards CLK_OF_DECLARE(...), the driver stopped
initializing osc32k, which is compatible "fixed-clock". This is because
we never called of_clk_init(NULL). Fix this by moving the only other
simple clock (osc24M) to use CLK_OF_DECLARE(...) and call of_clk_init(NULL)
to initialize both of them.
Signed-off-by: NEmilio López <emilio@elopez.com.ar>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This patch modifies PLL6552 and PLL6553 clock drivers to use recently
added common Samsung PLL registration method.
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The Allwinner A20 is almost identical to the earlier A10 SoC from
Allwinner on many aspects, including the clocks tree. However, since the
A20 has some additionnal IPs compared to the A10, the clock tree isn't
exactly the same, especially when it comes to the gated clocks
available. We thus need to register different clock gates for the A20.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NEmilio López <emilio@elopez.com.ar>

The A31 has a mostly different clock set compared to the other older
SoCs currently supported in the Allwinner clock driver.

Add support for the basic useful clocks. The other ones will come in
eventually.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NEmilio López <emilio@elopez.com.ar>

The divider width used to be hardcoded. Some A31 dividers are no longer
with the hardcoded width, so we need to make it specific to each divider
and set it in the dividers data.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NEmilio López <emilio@elopez.com.ar>

Rename all the generic-named structure to sun4i to avoid confusion when
we will introduce the sun6i (A31) clocks.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NEmilio López <emilio@elopez.com.ar>

With the recent move towards CLK_OF_DECLARE(...), the driver stopped
initializing osc32k, which is compatible "fixed-clock". This is because
we never called of_clk_init(NULL). Fix this by moving the only other
simple clock (osc24M) to use CLK_OF_DECLARE(...) and call of_clk_init(NULL)
to initialize both of them.
Signed-off-by: NEmilio López <emilio@elopez.com.ar>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Cc: Mike Turquette <mturquette@linaro.org>

The Allwinner A10s has a slightly different gates set than the A10 and
A13, so add these gates to the clk driver.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: NEmilio López <emilio@elopez.com.ar>
Reviewed-by: NEmilio López <emilio@elopez.com.ar>

Add missing iounmap to setup error path.
Signed-off-by: NJisheng Zhang <jszhang@marvell.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

At some point changes to clk_set_rate and clk_set_parent introduced a
bug whereby NULL struct clk pointers were treated as an error. This is
in violation of the API in include/linux/clk.h. Reintroduce graceful
handling of NULL clk's by bailing from clk_set_rate and clk_set_parent
with return codes of zero.
Signed-off-by: NMike Turquette <mturquette@linaro.org>

arm: Xilinx Zynq clock changes for v3.12

Just small two changes where the first fixes
documentation and the second improves
code readability.

Use more descriptive #defines for the minimum and maximum PLL
feedback divider.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>