This patch updates the Intel Ibex Peak (PCH) LPC and SMBus Controller
DeviceIDs.

The LPC Controller ID is set by Firmware within the range of
0x3b00-3b1f.  This range is included in pci_ids.h using min and max
values, and irq.c now has code to handle the range (in lieu of 32
additions to a SWITCH statement).

The SMBus Controller ID is a fixed-value and will not change.
Signed-off-by: NSeth Heasley <seth.heasley@intel.com>
Acked-by: NJean Delvare <khali@linux-fr.org>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Support the Matrox G200eV chip, based on timings that I found in the X.org
matrox driver.
Signed-off-by: NDarrick J. Wong <djwong@us.ibm.com>
Acked-by: NKrzysztof Helt <krzysztof.h1@wp.pl>
Cc: Petr Vandrovec <vandrove@vc.cvut.cz>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NRobert Richter <robert.richter@amd.com>
Cc: oprofile-list <oprofile-list@lists.sourceforge.net>
Cc: Barry Kasindorf <barry.kasindorf@amd.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Define old and new pci vendor and device ids.
Signed-off-by: NDhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>

Signed-off-by: NScott Feldman <scofeldm@cisco.com>
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>

Driver for Atheros L2 10/100 network device. Includes necessary
changes for Kconfig, Makefile, and pci_ids.h.
Signed-off-by: NChris Snook <csnook@redhat.com>
Signed-off-by: NJay Cliburn <jacliburn@bellsouth.net>
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>

The PCI device ids for AMD family 0x11 processors are missing in pci_ids.h.
This patch adds them.
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Also, stop looking at the NAND controller (0x4100) and checking the
device class. For a while during development, all three functions on the
chip had the same ID. We made them fix that fairly promptly, and we can
forget about it now.
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
Acked-by: NJonathan Corbet <corbet@lwn.net>

Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Probably better to use the official designation.
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
Acked-by: NPierre Ossman <drzeus@drzeus.cx>

This patch adds the Intel Ibex Peak (PCH) LPC and SMBus Controller DeviceIDs.
Signed-off-by: NSeth Heasley <seth.heasley@intel.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

pci.ids.h: remove a duplicated symbol

Cc: Doug Thompson <dougthompson@xmission.com>
Signed-off-by: NGrant Coady <gcoady.lk@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Enable support for cards with Cologne Chip AG's HFC multiport
chip.
Signed-off-by: NKarsten Keil <kkeil@suse.de>

Signed-off-by: NRobert Richter <robert.richter@amd.com>
Cc: oprofile-list <oprofile-list@lists.sourceforge.net>
Cc: Barry Kasindorf <barry.kasindorf@amd.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Preliminary support for the Intel 5100 MCH.  CE and UE errors are reported
along with the current DIMM label information and other memory parameters.

Reasons why this is preliminary:

1) This chip has 2 independent memory controllers which, for best
   perforance, use interleaved accesses to the DDR2 memory.  This
   architecture does not map very well to the current edac data structures
   which depend on symmetric channel access to the interleaved data.
   Without core changes, the best I could do for now is to map both memory
   controllers to different csrows (first all ranks of controller 0, then
   all ranks of controller 1).  Someone much more familiar with the edac
   core than I will probably need to come up with a more general data
   structure to handle the interleaving and de-interleaving of the two
   memory controllers.

2) I have not yet tackled the de-interleaving of the rank/controller
   address space into the physical address space of the CPU.  There is
   nothing fundamentally missing, it is just ending up to be a lot of
   code, and I'd rather keep it separate for now, esp since it doesn't
   work yet...

3) The code depends on a particular i5100 chip select to DIMM mainboard
   chip select mapping.  This mapping seems obvious to me in order to
   support dual and single ranked memory, but it is not unique and DIMM
   labels could be wrong on other mainboards.  There is no way to query
   this mapping that I know of.

4) The code requires that the i5100 is in 32GB mode.  Only 4 ranks per
   controller, 2 ranks per DIMM are supported.  I do not have hardware
   (nor do I expect to have hardware anytime soon) for the 48GB (6 ranks
   per controller) mode.

5) The serial presence detect code should be broken out into a "real"
   i2c driver so that decode-dimms.pl can work.
Signed-off-by: NArthur Jones <ajones@riverbed.com>
Signed-off-by: NDoug Thompson <dougthompson@xmission.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Isochronous reception in dualbuffer mode is reportedly broken with
TI TSB43AB22A on x86-64.  Descriptor addresses above 2G have been
determined as the trigger:
https://bugzilla.redhat.com/show_bug.cgi?id=435550

Two fixes are possible:
  - pci_set_consistent_dma_mask(pdev, DMA_31BIT_MASK);
    at least when IR descriptors are allocated, or
  - simply don't use dualbuffer.
This fix implements the latter workaround.

But we keep using dualbuffer on x86-32 which won't give us highmen (and
thus physical addresses outside the 31bit range) in coherent DMA memory
allocations.  Right now we could for example also whitelist PPC32, but
DMA mapping implementation details are expected to change there.
Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
Signed-off-by: NJarod Wilson <jwilson@redhat.com>

This patch adds to ioatdma and dca modules
support for Intel I/OAT DMA engine ver.3 (aka CB3 device).
The main features of I/OAT ver.3 are:
 * 8 single channel DMA devices (8 channels total)
 * 8 DCA providers, each can accept 2 requesters
 * 8-bit TAG values and 32-bit extended APIC IDs
Signed-off-by: NMaciej Sosnowski <maciej.sosnowski@intel.com>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>

JMicron chips sometimes have two interfaces to work around limitations
in Microsoft's sdhci driver. This patch allows us to use either interface.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Add support for the MPC8536 process and MPC8536DS reference board.  The
MPC8536 is an e500v2 based SoC which eTSEC, USB, SATA, PCI, and PCIe.

The USB and SATA IP blocks are similiar to those on the PQ2 Pro SoCs and
thus use the same drivers.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This has been sitting around unloved for way too long..

The Marvell CaFe chip's SD implementation chokes during card insertion
if one attempts to set the voltage and power up in the same
SDHCI_POWER_CONTROL register write.  This adds a quirk that does
that particular dance in two steps.

It also adds an entry to pci_ids.h for the CaFe chip's SD device.
Signed-off-by: NAndres Salomon <dilinger@debian.org>
Cc: Pierre Ossman <drzeus-list@drzeus.cx>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Supporting the 57711 and 57711E - refers to in the code as E1H. The
57710 is referred to as E1.

To support the new members in the family, the bnx2x structure was
divided to 3 parts: common, port and function. These changes caused some
rearrangement in the bnx2x.h file.

A set of accessories macros were added to make access to the bnx2x
structure more readable
Signed-off-by: NEilon Greenstein <eilong@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add support for the next generation of HP Smart Array SAS/SATA
controllers.  Shipping date is late Fall 2008.

Bump the driver version to 3.6.20 to reflect the new hardware support from
patch 1 of this set.
Signed-off-by: NMike Miller <mike.miller@hp.com>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: <stable@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This patch added the 5785 device ID and ASIC revision to the code.
Signed-off-by: NMatt Carlson <mcarlson@broadcom.com>
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Signed-off-by: NBenjamin Li <benli@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add support for the InstaShield IS-400 four port RS-232 PCI card.
Signed-off-by: NIgnacio García Pérez <iggarpe@t2i.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Minor rework to support the Intel 5400 chipset.
Signed-off-by: NDarrick J. Wong <djwong@us.ibm.com>
Cc: "Mark M. Hoffman" <mhoffman@lightlink.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Add new PCI Express Neo/JSM board to the supported list of drivers in
the JSM driver.
Signed-off-by: NScott Kilau <scottk@digi.com>
Acked-by: NAnanda V <avenkat@us.ibm.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This patch adds Intel SCH chipsets (US15W, US15L, UL11L) PCI IDs, these
IDs will be used by following SCH driver patches.
Signed-off-by: NAlek Du <alek.du@intel.com>
Signed-off-by: NJesse Barnes <jbarnes@jbarnes-t61.(none)>

Signed-off-by: NAlex Dubov <oakad@yahoo.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This patch adds the Intel ICH10 LPC and SMBus Controller DeviceID's.
Signed-off-by: NJason Gaston <jason.d.gaston@intel.com>
Cc: Jean Delvare <khali@linux-fr.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

[bart: manually ported it over via82cxxx changes]

From: Andrew Smith <asmith@tranquility.fsbusiness.co.uk>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>

Added pci device id for the Quatech SPPXP-100 ExpressCard - 0x278 - to
include/linux/pci_id.h

Modified drivers/parport/parport_pc.c to support the Quatech SPPXP-100 Parallel port PCI ExpressCard

[akpm@linux-foundation.org: build fix]
Signed-off-by: NLuís P Mendes <luis.p.mendes@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Add ADDI-DATA GmbH communication cards to 8250_pci driver.  Supported cards
are:

APCI-7300, APCI-7420, APCI-7500, APCI-7800 APCI-7300-2, APCI-7420-2,
APCI-7500-2 APCI-7300-3, APCI-7420-3, APCI-7500-3, APCI-7800-3

[akpm@linux-foundation.org: coding-style fixes]
Signed-off-by: NKrauth J. <krauth.julien@addi-data.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Alan Cox <alan@redhat.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This patch defines the PCI identifiers found in
the RDC R-321x System-on-Chip.
Signed-off-by: NFlorian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: NIngo Molnar <mingo@elte.hu>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

This patch adds a mac80211 based wireless driver for the rtl8180 and
rtl8185 PCI wireless cards.  Also included are some rtl8187 changes
required due to the relationship between that driver and this one.

Michael Wu is primarily responsible for the initial driver and rtl8185
support.  Andreas Merello provided the additional rtl8180 support.

Thanks to Jukka Ruohonen for the donating a rtl8185 card! It was very
helpful for the rtl8225z2 code.

The Signed-off-by information below is collected from the individual
patches submitted to wireless-2.6 before merging this driver upstream.
Signed-off-by: NAndrea Merello <andreamrl@tiscali.it>
Signed-off-by: NJohannes Berg <johannes@sipsolutions.net>
Signed-off-by: NPavel Roskin <proski@gnu.org>
Signed-off-by: NMichael Wu <flamingice@sourmilk.net>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

- whitespaces vs tabs
- use 80 cols
- use if_mii
- use netdev_priv
- remove useless cast to void *
- PCI device id does not need to be globally available
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>

- checkpatch fixes

- fix bogus and uninitialized return codes in r6040_start_xmit()

- netdev_get_settings() fix obvious locking bug flagged by compiler warning

- set DMA consistent mask

- remove unnecessary setting of dev->base_addr
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>

Signed-off-by: NEliezer Tamir <eliezert@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Not much to do here. It's an ata memory as disk.
Signed-off-by: NAlan Cox <alan@redhat.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

It is important that these resources be reserved
to avoid conflicts with well known ACPI registers.
Signed-off-by: NZhao Yakui <yakui.zhao@intel.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

The JMicron JMB38x chip doesn't support transfers that aren't 32-bit
aligned (both size and start address). It also doesn't like switching
between PIO and DMA mode, so it needs to be reset after each request.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>