- 21 12月, 2013 1 次提交
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由 Pratyush Anand 提交于
The cfg_read/write functions are DesignWare-specific. Add dw_pcie prefix to avoid collision in global name space. Tested-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Acked-by: NJingoo Han <jg1.han@samsung.com>
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- 09 10月, 2013 3 次提交
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由 Pratyush Anand 提交于
Without irq_create_mapping(), the correct IRQ number cannot be provided. In this case, it makes problems such as NULL dereference. Thus, irq_create_mapping() should be added for MSI. Suggested-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
The following variables and functions are used only in pcie-designware.c, so make them static: global_io_offset dw_pcie_rd_own_conf() dw_pcie_wr_own_conf() dw_pcie_setup() dw_pcie_scan_bus() dw_pcie_map_irq() Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NJingoo Han <jg1.han@samsung.com>
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由 Seungwon Jeon 提交于
Add header guards to prevent redundant inclusion. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 26 9月, 2013 1 次提交
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由 Jingoo Han 提交于
This patch adds support for Message Signaled Interrupt in the Exynos PCIe driver using Synopsys designware PCIe core IP. Signed-off-by: NSiva Reddy Kallam <siva.kallam@samsung.com> Signed-off-by: NSrikanth T Shivanand <ts.srikanth@samsung.com> Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Pratyush Anand <pratyush.anand@st.com> Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
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- 13 8月, 2013 1 次提交
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由 Jingoo Han 提交于
Exynos PCIe IP consists of Synopsys specific part and Exynos specific part. Only core block is a Synopsys Designware part; other parts are Exynos specific. Also, the Synopsys Designware part can be shared with other platforms; thus, it can be split two parts such as Synopsys Designware part and Exynos specific part. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Pratyush Anand <pratyush.anand@st.com> Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
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