1. 20 11月, 2018 33 次提交
  2. 19 11月, 2018 7 次提交
    • M
      tuntap: fix multiqueue rx · 8ebebcba
      Matthew Cover 提交于
      When writing packets to a descriptor associated with a combined queue, the
      packets should end up on that queue.
      
      Before this change all packets written to any descriptor associated with a
      tap interface end up on rx-0, even when the descriptor is associated with a
      different queue.
      
      The rx traffic can be generated by either of the following.
        1. a simple tap program which spins up multiple queues and writes packets
           to each of the file descriptors
        2. tx from a qemu vm with a tap multiqueue netdev
      
      The queue for rx traffic can be observed by either of the following (done
      on the hypervisor in the qemu case).
        1. a simple netmap program which opens and reads from per-queue
           descriptors
        2. configuring RPS and doing per-cpu captures with rxtxcpu
      
      Alternatively, if you printk() the return value of skb_get_rx_queue() just
      before each instance of netif_receive_skb() in tun.c, you will get 65535
      for every skb.
      
      Calling skb_record_rx_queue() to set the rx queue to the queue_index fixes
      the association between descriptor and rx queue.
      Signed-off-by: NMatthew Cover <matthew.cover@stackpath.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8ebebcba
    • D
      ipv6: Fix PMTU updates for UDP/raw sockets in presence of VRF · 7ddacfa5
      David Ahern 提交于
      Preethi reported that PMTU discovery for UDP/raw applications is not
      working in the presence of VRF when the socket is not bound to a device.
      The problem is that ip6_sk_update_pmtu does not consider the L3 domain
      of the skb device if the socket is not bound. Update the function to
      set oif to the L3 master device if relevant.
      
      Fixes: ca254490 ("net: Add VRF support to IPv6 stack")
      Reported-by: NPreethi Ramachandra <preethir@juniper.net>
      Signed-off-by: NDavid Ahern <dsahern@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      7ddacfa5
    • S
      mlxsw: spectrum: Expose discard counters via ethtool · bae4e109
      Shalom Toledo 提交于
      Expose packets discard counters via ethtool to help with debugging.
      Signed-off-by: NShalom Toledo <shalomt@mellanox.com>
      Reviewed-by: NJiri Pirko <jiri@mellanox.com>
      Signed-off-by: NIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      bae4e109
    • E
      tun: use netdev_alloc_frag() in tun_napi_alloc_frags() · aa6daaca
      Eric Dumazet 提交于
      In order to cook skbs in the same way than Ethernet drivers,
      it is probably better to not use GFP_KERNEL, but rather
      use the GFP_ATOMIC and PFMEMALLOC mechanisms provided by
      netdev_alloc_frag().
      
      This would allow to use tun driver even in memory stress
      situations, especially if swap is used over this tun channel.
      
      Fixes: 90e33d45 ("tun: enable napi_gro_frags() for TUN/TAP driver")
      Signed-off-by: NEric Dumazet <edumazet@google.com>
      Cc: Petar Penkov <peterpenkov96@gmail.com>
      Cc: Mahesh Bandewar <maheshb@google.com>
      Cc: Willem de Bruijn <willemb@google.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      aa6daaca
    • D
      Merge branch 'IP101GR-devicetree-based-configuration-of-SEL_INTR32' · 05b0e1d6
      David S. Miller 提交于
      Martin Blumenstingl says:
      
      ====================
      IP101GR: devicetree based configuration of SEL_INTR32
      
      The IP101GR is a 32-pin QFN package variant of the IP101G/IP101GA
      Ethernet PHY. Due to it's limited amount of pins the RXER (receive
      error) and INTR32 (interrupt) functions share pin 21.
      
      The goal of this series is:
      - some small cleanups in patches 3, 4 and 5
      - allowing the kernel to detect IRQ floods on boards where the IP101GR
        is configured in RXER mode but the RXER line is configured on the
        host SoC as interrupt line (patch 6)
      - configuration of the SEL_INTR32 register so we can use the interrupt
        function on boards where the RXER/INTR32 pin (pin 21) is routed to
        one of the host SoC's interrupt inputs (patches 1, 2, 7)
      
      A use-case where this is needed is the Endless Mini (EC-100). I have
      tested my changes on that board. This also confirms that Heiner
      Kallweit's recent icplus.c PHY driver changes are working (at least on
      my setup).
      
      This series is based on net-next commit 7c460cf9 ("net: aquantia:
      fix spelling mistake "specfield" -> "specified"")
      
      Changes since v1 at [0]:
      - collected Andrew's Reviewed-by's (thank you!)
      - updated description of patch #2 to explain why two properties were
        added instead of adding an "this is a IP101GR" property
      - validate that there's no conflicting configuration in patch #7
      - rebased on top of latest net-next
      
      [0] https://patchwork.ozlabs.org/cover/999371/
      ====================
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      05b0e1d6
    • M
      net: phy: icplus: allow configuring the interrupt function on IP101GR · f2f1a847
      Martin Blumenstingl 提交于
      The IP101GR is a 32-pin QFN package variant of the IP101G/IP101GA
      Ethernet PHY. Due to it's limited amount of pins the RXER (receive
      error) and INTR32 (interrupt) functions share pin 21.
      By default the PHY is configured to output the "receive error" status on
      pin 21. Depending on the board layout and requirements we may want to
      re-configure the PHY to output the interrupt signal there.
      
      The mode of pin 21 can be configured in the "Digital I/O Specific
      Control Register" (register 29), bit 2:
      - 0 = RXER function
      - 1 = INTR(32) function
      
      Depending on the devicetree configuration we will now:
      - change the mode to either ther RXER or INTR32 function
      - keep the SEL_INTR32 value set by the bootloader (default) if no
        configuration is provided (to ensure that we're not breaking existing
        boards)
      - error out if conflicting configuration is given (RXER and INTR32 mode
        are enabled at the same time)
      Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f2f1a847
    • M
      net: phy: icplus: implement .did_interrupt for IP101A/G · f7e290fb
      Martin Blumenstingl 提交于
      The IP101A_G_IRQ_CONF_STATUS register has bits to detect which
      interrupts have fired. Implement the .did_interrupt callback to let the
      PHY core know whether the interrupt was for this specific PHY.
      
      This is useful for debugging interrupt problems with 32-pin IP101GR PHYs
      where the interrupt line is shared with the RX_ERR (receive error
      status) signal. The default values are:
      - RX_ERR is enabled by default (LOW means that there is no receive
        error)
      - the PHY's interrupt line is configured "active low" by default
      
      Without any additional changes there is a flood of interrupts if the
      RX_ERR/INTR32 signal is configured in RX_ERR mode (which is the
      default). Having a did_interrupt ensures that the PHY core returns
      IRQ_NONE instead of endlessly triggering the PHY state machine.
      Additionally the kernel will report this after a while:
        irq 28: nobody cared (try booting with the "irqpoll" option)
      Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f7e290fb