This switches the two members of struct gpio_chip that were
defined as unsigned foo:1 to bool, because that is indeed what
they are. Switch all users in the gpio and pinctrl subsystems
to assign these values with true/false instead of 0/1. The
users outside these subsystems will survive since true/false
is 1/0, atleast we set some kind of more strict typing example.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Remove unneeded error handling on the result of a call to
platform_get_resource when the value is passed to devm_ioremap_resource.

Move the call to platform_get_resource adjacent to the call to
devm_ioremap_resource to make the connection between them more clear.

A simplified version of the semantic patch that makes this change is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@@
expression pdev,res,n,e,e1;
expression ret != 0;
identifier l;
@@

- res = platform_get_resource(pdev, IORESOURCE_MEM, n);
  ... when != res
- if (res == NULL) { ... \(goto l;\|return ret;\) }
  ... when != res
+ res = platform_get_resource(pdev, IORESOURCE_MEM, n);
  e = devm_ioremap_resource(e1, res);
// </smpl>
Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Use irq_get_trigger_type() to get the IRQ trigger type flags
instead calling irqd_get_trigger_type(irq_get_irq_data(irq))
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: NGrant Likely <grant.likely@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mips@linux-mips.org
Link: http://lkml.kernel.org/r/1371228049-27080-3-git-send-email-javier.martinez@collabora.co.ukSigned-off-by: NThomas Gleixner <tglx@linutronix.de>

devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Acked-by: NStephen Warren <swarren@nvidia.com>

This patch adds a dedicated dbg_show function to the gpio-mvebu driver.
In addition to the generic gpiolib informations, this function displays
informations related with the specific Marvell registers (blink enable,
data in polarity, interrupt masks and cause).
Signed-off-by: NSimon Guinot <simon.guinot@sequanux.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Fix :
 gpio/gpio-mvebu.c:120: ERROR: space required before the open parenthesis '('
 gpio/gpio-mvebu.c:136: ERROR: space required before the open parenthesis '('
 gpio/gpio-mvebu.c:154: ERROR: space required before the open parenthesis '('
 gpio/gpio-mvebu.c:404: ERROR: space required before the open parenthesis '('
 gpio/gpio-mvebu.c:476: ERROR: "(foo*)" should be "(foo *)"
 gpio/gpio-mvebu.c:480: ERROR: "(foo*)" should be "(foo *)"
 gpio/gpio-mvebu.c:484: ERROR: "(foo*)" should be "(foo *)"
 gpio/gpio-mvebu.c:512: ERROR: space prohibited after that '!' (ctx:BxW)
 gpio/gpio-mvebu.c:518: ERROR: space prohibited after that '!' (ctx:BxW)
 gpio/gpio-mvebu.c:518: ERROR: space required before the open brace '{'
 gpio/gpio-mvebu.c:563: ERROR: space prohibited after that '!' (ctx:BxW)
 gpio/gpio-mvebu.c:570: ERROR: trailing whitespace
 gpio/gpio-mvebu.c:577: ERROR: space required before the open parenthesis '('
 gpio/gpio-mvebu.c:635: ERROR: space prohibited after that '!' (ctx:BxW)
Signed-off-by: NLaurent Navet <laurent.navet@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The kirkwood SoC GPIO cores use the runit clock. Add code to
clk_prepare_enable() runit, otherwise there is a danger of locking up
the SoC by accessing the GPIO registers when runit clock is not
ticking.
Reported-by: NSimon Baatz <gmbnomis@gmail.com>
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by: NSimon Baatz <gmbnomis@gmail.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Cc: <stable@vger.kernel.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.

devm_ioremap_resource() provides its own error messages so all explicit
error messages can be removed from the failure code paths.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Tested-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The gpio_chip.label field is a const char * and assigned the value of a
call to dev_name(). Memory obtained from dev_name() should not be freed
by drivers.
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

When building without device tree support (for the mv78x00 SoCs for
example), the build failed because of_irq_count is undeclared. However
mvebu-gpio is not designed to build without device tree support. So
make it depends on OF_CONFIG, remove the #ifdef OF_CONFIG line and the
platform_device_id.

Tested on RD-78x00-mASA, DB-78460-BP, DB-88F6710-BP-DDR3,
DB-MV784MP-GP, Mirabox and OpenBlocks AX3.
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

CONFIG_HOTPLUG is going away as an option so __devinitdata is no
longer needed.
Signed-off-by: NBill Pemberton <wfp5p@virginia.edu>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

CONFIG_HOTPLUG is going away as an option so __devinit is no longer
needed.
Signed-off-by: NBill Pemberton <wfp5p@virginia.edu>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The plat-orion GPIO driver would disable any pin blinking whenever
using a pin for output. Do the same here, as a blinking LED will
continue to blink regardless of what the GPIO pin level is.
Signed-off-by: NJamie Lentin <jm@lentin.co.uk>
Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

We call pinctrl_request_gpio() in request callback, thus we need to call
pinctrl_free_gpio() in free callback.

Both mvebu_gpio_request() and mvebu_gpio_free() are not referenced outside of
this file, make them static.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Due to the SMP nature of some of the chips, which have per CPU
registers, the driver does not use the generic irq_gc_mask_set_bit() &
irq_gc_mask_clr_bit() functions, which only support a single register.
The driver has its own implementation of these functions, which can
pick the correct register depending on the CPU being used. The
functions do however use the gc->mask_cache value.

The call to irq_setup_generic_chip() was passing
IRQ_GC_INIT_MASK_CACHE, which caused the gc->mask_cache to be
initialized to the contents of some random register. This resulted in
unexpected interrupts been delivered from random GPIO lines.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by: NJamie Lentin <jm@lentin.co.uk>
Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: NMichael Walle <michael@walle.cc>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The MVEBU driver probably just wants a few IRQs. Using the simple
domain has the upside of allocating IRQ descriptors if need be,
especially in a SPARSE_IRQ environment.

Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The ->direction_output() operation of gpio_chip is supposed to set the
direction to output but also to set the GPIO to an initial
value. Unfortunately, this last part was not done until now, causing
for example the LEDs to not be properly set to their default initial
value. This patch fixes this by calling the mvebu_gpio_set() function
from mvebu_gpio_direction_output() before configuring the GPIO as an
output GPIO.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This driver aims at replacing the arch/arm/plat-orion/gpio.c driver,
and is designed to be compatible with all Marvell EBU SoCs: Orion,
Kirkwood, Dove, Armada 370/XP and Discovery.

It has been successfully tested on Dove and Armada XP at the moment.

Compared to the plat-orion driver, this new driver has the following
added benefits:

 *) Support for Armada 370 and Armada XP
 *) It is integrated with the mvebu pinctrl driver so that GPIO pins
    are properly muxed, and the GPIO driver knows which GPIO pins are
    output-only or input-only.
 *) Properly placed in drivers/gpio
 *) More extensible mechanism to support platform differences. The
    plat-orion driver uses a simple mask-offset DT property, which
    works fine for Discovery MV78200 but not for Armada XP. The new
    driver uses different compatible strings to identify the different
    variants of the GPIO controllers.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Tested-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>