- 28 4月, 2014 3 次提交
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由 Leilei Zhao 提交于
The length shoule be 64 bit alignment and the block size shoule be 64 bit in aes cfb64 mode. Signed-off-by: NLeilei Zhao <leilei.zhao@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Leilei Zhao 提交于
The block size of aes cfb8 mode shoule be 8 bit. Signed-off-by: NLeilei Zhao <leilei.zhao@atmel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Horia Geanta 提交于
In case hash key is bigger than algorithm block size, it is hashed. In this case, memory is allocated to keep this hash in hashed_key. hashed_key has to be freed on the key_dma dma mapping error path. Signed-off-by: NHoria Geanta <horia.geanta@freescale.com> Reviewed-by: NMarek Vasut <marex@denx.de> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 16 4月, 2014 7 次提交
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由 Nishanth Menon 提交于
pm_runtime_get_sync may not always succeed depending on SoC involved. So handle the error appropriately ensuring usage_count is accurate in case of failure. Signed-off-by: NNishanth Menon <nm@ti.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Reported-by: NJoachim Eastwood <manabian@gmail.com> Tested-by: NJoachim Eastwood <manabian@gmail.com> Acked-by: NJoel Fernandes <joelf@ti.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Alexander Gordeev 提交于
As result of deprecation of MSI-X/MSI enablement functions pci_enable_msix() and pci_enable_msi_block() all drivers using these two interfaces need to be updated to use the new pci_enable_msi_range() or pci_enable_msi_exact() and pci_enable_msix_range() or pci_enable_msix_exact() interfaces. Signed-off-by: NAlexander Gordeev <agordeev@redhat.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: linux-crypto@vger.kernel.org Cc: linux-pci@vger.kernel.org Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Sonic Zhang 提交于
- The 4-byte sg_mid_buf is located in the middle of the coherence memory sg_cpu. Don't call dma_map_single to get its physical address. Get the its base physical address from the physical address of sg_cpu instead. - Should set up the dma descriptor data after the 4-byte sg_mid_buf is filled in completely from next sg buffer. - memory copy from sg buffer should be done via virtual address. - Remove unused reference to blackfin header Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Reviewed-by: NMarek Vasut <marex@denx.de> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Sonic Zhang 提交于
in case of multiple crc devices are probed. Call platform_set_drvdata() before adding new CRC device into the list. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Reviewed-by: NMarek Vasut <marex@denx.de> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Sonic Zhang 提交于
Move architecture independant crc header file out of the blackfin folder. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Reviewed-by: NMarek Vasut <marex@denx.de> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jingoo Han 提交于
Use devm_ioremap_resource() because devm_request_and_ioremap() is obsoleted by devm_ioremap_resource(). Signed-off-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NJoel Fernandes <joelf@ti.com> Reviewed-by: NMarek Vasut <marex@denx.de> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Monam Agarwal 提交于
This patch replaces rcu_assign_pointer(x, NULL) with RCU_INIT_POINTER(x, NULL) The rcu_assign_pointer() ensures that the initialization of a structure is carried out before storing a pointer to that structure. And in the case of the NULL pointer, there is no structure to initialize. So, rcu_assign_pointer(p, NULL) can be safely converted to RCU_INIT_POINTER(p, NULL) Signed-off-by: NMonam Agarwal <monamagarwal123@gmail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 21 3月, 2014 4 次提交
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由 Horia Geanta 提交于
(struct caam_ctx) ctx->key_dma needs to be unmapped when context is cleaned up. Signed-off-by: NHoria Geanta <horia.geanta@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Horia Geanta 提交于
Add support for the following combinations: -encryption: null -authentication: md5, sha* (1, 224, 256, 384, 512) Signed-off-by: NTudor Ambarus <tudor.ambarus@freescale.com> Signed-off-by: NHoria Geanta <horia.geanta@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Horia Geanta 提交于
Commit 61bb86bb ("crypto: caam - set descriptor sharing type to SERIAL") changed the descriptor sharing mode from SHARE_WAIT to SHARE_SERIAL. All descriptor commands that handle the "ok to share" and "error propagation" settings should also go away, since they have no meaning for SHARE_SERIAL. Signed-off-by: NHoria Geanta <horia.geanta@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Herbert Xu 提交于
Found by the kbuild test robot, the first argument to caam_init_rng has a spurious ampersand. Reported-by: Nkbuild test robot <fengguang.wu@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 10 3月, 2014 10 次提交
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由 Joel Fernandes 提交于
HIGHMEM pages may not be mapped so we must kmap them before accessing. This resolves a random OOPs error that was showing up during OpenSSL SHA tests. Signed-off-by: NJoel Fernandes <joelf@ti.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Nitesh Lal 提交于
This patch allocates memory from DMAable region to the caam_rng_ctx object, earlier it had been statically allocated which resulted in errorneous behaviour on inserting the caamrng module at the runtime. Signed-off-by: NNitesh Lal <NiteshNarayanLal@freescale.com> Acked-by: NRuchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Marek Vasut 提交于
Optimize the hashing operation in the MXS-DCP by doing two adjustments: 1) Given that the output buffer for the hash is now always correctly aligned, we can just use the buffer for the DCP DMA to store the resulting hash. We thus get rid of one copying of data. Moreover, we remove an entry from dcp_coherent_block{} and thus lower the memory footprint of the driver. 2) We map the output buffer for the hash for DMA only in case we will output the hash, not always, as it was now. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: David S. Miller <davem@davemloft.net> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Marek Vasut 提交于
The DCP needs the bounce buffers, DMA descriptors and result buffers aligned to 64 bytes (yet another hardware limitation). Make sure they are aligned by properly aligning the structure which contains them during allocation. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: David S. Miller <davem@davemloft.net> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jingoo Han 提交于
Make omap_des_copy_needed(), omap_des_copy_sgs(), because these functions are used only in this file. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NJoel Fernandes <joelf@ti.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jingoo Han 提交于
Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jingoo Han 提交于
Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jingoo Han 提交于
Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NNishanth Menon <nm@ti.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Sonic Zhang 提交于
1) SSYNC instruction is blackfin specific and takes no effect in this driver. 2) DMA descriptor and SG middle buffer are in DMA coherent memory. No need to flush. 3) Turn kzalloc, ioremap and request_irq into managed device APIs respectively. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Alexander Shiyan 提交于
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 27 2月, 2014 11 次提交
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由 Tom Lendacky 提交于
When the crypto layer is able to queue up a command for processing by the CCP on the initial call to ccp_crypto_enqueue_request and the CCP returns -EBUSY, then if the backlog flag is not set the command needs to be freed and not added to the active command list. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tom Lendacky 提交于
Invoke the callback routine associated with the crypto context if an error is encountered sending the command to the CCP during backlog processing. This is needed to free any resources used by the command. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tom Lendacky 提交于
If a CCP command has been queued for processing at the crypto layer then, when dequeueing it for processing, the "can backlog" flag must be set so that the request isn't lost if the CCP backlog queue limit is reached. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dan Carpenter 提交于
My guess is that this little endian configuration is never found in real life, but if it were then the writel() arguments are in the wrong order so the driver would crash immediately. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Acked-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Stephen Warren 提交于
This driver has never been hooked up in any board file, and cannot be instantiated via device tree. I've been told that, at least on Tegra20, the HW is slower at crypto than the main CPU. I have no test-case for it. Hence, remove it. Cc: Varun Wadekar <vwadekar@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Joel Fernandes 提交于
Add config and build options for the omap-des driver. Signed-off-by: NJoel Fernandes <joelf@ti.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Joel Fernandes 提交于
Add omap-des driver with platform data for OMAP4/AM43xx. Support added for DES ECB and CBC modes. Also add support for 3DES operation where 3 64-bit keys are used to perform a DES encrypt-decrypt-encrypt (des3_ede) operation on a buffer. Tests have been conducted with the CRYPTO test manager, and functionality is verified at different page length alignments. Signed-off-by: NJoel Fernandes <joelf@ti.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Fabio Estevam 提交于
We should test the error case for each platform_get_irq() assignment and propagate the error accordingly. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NMarek Vasut <marex@denx.de> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jingoo Han 提交于
Use devm_ioremap_resource() in order to make the code simpler, and remove redundant return value check of platform_get_resource() because the value is checked by devm_ioremap_resource(). Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jingoo Han 提交于
Use devm_ioremap_resource() in order to make the code simpler, and remove redundant return value check of platform_get_resource() because the value is checked by devm_ioremap_resource(). Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jingoo Han 提交于
Use devm_ioremap_resource() in order to make the code simpler, and remove redundant return value check of platform_get_resource() because the value is checked by devm_ioremap_resource(). Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 11 2月, 2014 1 次提交
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由 Nathan Fontenot 提交于
The powerpc specific nx-842 compression driver does not currently handle translating a vmalloc address to a physical address. The current driver uses __pa() for all addresses which does not properly handle vmalloc addresses and thus causes a failure since we do not pass a proper physical address to the hypervisor. This patch adds a routine to convert an address to a physical address by checking for vmalloc addresses and handling them properly. Signed-off-by: NNathan Fontenot <nfont@linux.vnet.ibm.com> --- drivers/crypto/nx/nx-842.c | 29 +++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 09 2月, 2014 4 次提交
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由 Alex Porosanu 提交于
SEC ERA has to be retrieved by reading the "fsl,sec-era" property from the device tree. This property is updated/filled in by u-boot. Signed-off-by: NAlex Porosanu <alexandru.porosanu@freescale.com> Reviewed-by: NHoria Geanta <horia.geanta@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Fabio Estevam 提交于
stmp_reset_block() may fail, so check its return value and propagate it in the case of error. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NMarek Vasut <marex@denx.de> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Fabio Estevam 提交于
Using devm_kzalloc() can make the code cleaner. While at it, remove the devm_kzalloc error message as there is standard OOM message done by the core. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NMarek Vasut <marex@denx.de> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kevin Hao 提交于
In function talitos_probe(), it will jump to err_out when getting an error in talitos_probe_irq(). Then the uninitialized list head priv->alg_list will be used in function talitos_remove(). In this case we would get a call trace like the following. So move up the initialization of priv->alg_list. Unable to handle kernel paging request for data at address 0x00000000 Faulting instruction address: 0xc0459ff4 Oops: Kernel access of bad area, sig: 11 [#1] SMP NR_CPUS=8 P1020 RDB Modules linked in: CPU: 1 PID: 1 Comm: swapper/0 Tainted: G W 3.13.0-08789-g54c0a4b4 #33 task: cf050000 ti: cf04c000 task.ti: cf04c000 NIP: c0459ff4 LR: c0459fd4 CTR: c02f2438 REGS: cf04dcb0 TRAP: 0300 Tainted: G W (3.13.0-08789-g54c0a4b4) MSR: 00029000 <CE,EE,ME> CR: 82000028 XER: 20000000 DEAR: 00000000 ESR: 00000000 GPR00: c045ac28 cf04dd60 cf050000 cf2579c0 00021000 00000000 c02f35b0 0000014e GPR08: c07e702c cf104300 c07e702c 0000014e 22000024 00000000 c0002a3c 00000000 GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 c082e4e0 000000df GPR24: 00000000 00100100 00200200 cf257a2c cf0efe10 cf2579c0 cf0efe10 00000000 NIP [c0459ff4] talitos_remove+0x3c/0x1c8 LR [c0459fd4] talitos_remove+0x1c/0x1c8 Call Trace: [cf04dd60] [c07485d8] __func__.13331+0x1241c8/0x1391c0 (unreliable) [cf04dd90] [c045ac28] talitos_probe+0x244/0x998 [cf04dde0] [c0306a74] platform_drv_probe+0x28/0x68 [cf04ddf0] [c0304d38] really_probe+0x78/0x250 [cf04de10] [c030505c] __driver_attach+0xc8/0xcc [cf04de30] [c0302e98] bus_for_each_dev+0x6c/0xb8 [cf04de60] [c03043cc] bus_add_driver+0x168/0x220 [cf04de80] [c0305798] driver_register+0x88/0x130 [cf04de90] [c0002458] do_one_initcall+0x14c/0x198 [cf04df00] [c079f904] kernel_init_freeable+0x138/0x1d4 [cf04df30] [c0002a50] kernel_init+0x14/0x124 [cf04df40] [c000ec40] ret_from_kernel_thread+0x5c/0x64 Signed-off-by: NKevin Hao <haokexin@gmail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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